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From: Dave Hansen <dave@sr71.net>
To: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com>
Cc: "kexec@lists.infradead.org" <kexec@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Thomas Renninger <trenn@suse.de>,
	Simon Horman <horms@verge.net.au>,
	"Eric W. Biederman" <ebiederm@xmission.com>,
	"H. Peter Anvin" <hpa@zytor.com>, Yinghai Lu <yinghai@kernel.org>,
	Cliff Wickman <cpw@sgi.com>, Vivek Goyal <vgoyal@redhat.com>
Subject: Re: [PATCH 5/5] kexec: X86: Pass memory ranges via e820 table instead of memmap= boot parameter
Date: Sun, 14 Apr 2013 22:58:44 -0700	[thread overview]
Message-ID: <516B9714.80007@sr71.net> (raw)
In-Reply-To: <516B87A6.9080708@jp.fujitsu.com>

On 04/14/2013 09:52 PM, HATAYAMA Daisuke wrote:
> This sounds like there's no such issue on x86 cache mechanism. Is it
> correct? If so, what is the difference between ia64 and x86 cache
> mechanisms?

I'm just going by the code comments:

drivers/char/mem.c
>                 /*
>                  * On ia64 if a page has been mapped somewhere as uncached, then
>                  * it must also be accessed uncached by the kernel or data
>                  * corruption may occur.
>                  */


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WARNING: multiple messages have this Message-ID (diff)
From: Dave Hansen <dave@sr71.net>
To: HATAYAMA Daisuke <d.hatayama@jp.fujitsu.com>
Cc: "H. Peter Anvin" <hpa@zytor.com>,
	"kexec@lists.infradead.org" <kexec@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	Cliff Wickman <cpw@sgi.com>, Simon Horman <horms@verge.net.au>,
	"Eric W. Biederman" <ebiederm@xmission.com>,
	Yinghai Lu <yinghai@kernel.org>, Thomas Renninger <trenn@suse.de>,
	Vivek Goyal <vgoyal@redhat.com>
Subject: Re: [PATCH 5/5] kexec: X86: Pass memory ranges via e820 table instead of memmap= boot parameter
Date: Sun, 14 Apr 2013 22:58:44 -0700	[thread overview]
Message-ID: <516B9714.80007@sr71.net> (raw)
In-Reply-To: <516B87A6.9080708@jp.fujitsu.com>

On 04/14/2013 09:52 PM, HATAYAMA Daisuke wrote:
> This sounds like there's no such issue on x86 cache mechanism. Is it
> correct? If so, what is the difference between ia64 and x86 cache
> mechanisms?

I'm just going by the code comments:

drivers/char/mem.c
>                 /*
>                  * On ia64 if a page has been mapped somewhere as uncached, then
>                  * it must also be accessed uncached by the kernel or data
>                  * corruption may occur.
>                  */


  reply	other threads:[~2013-04-15  5:57 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-04-11 12:26 Cleanups and passing memory ranges via e820 table instead of memmap= Thomas Renninger
2013-04-11 12:26 ` [PATCH 1/5] kexec: X86: Show e820 table which gets passed in debug mode Thomas Renninger
2013-04-11 12:26 ` [PATCH 2/5] kexec: X86: Enhance crash range debug output Thomas Renninger
2013-04-11 12:26 ` [PATCH 3/5] kexec: X86: Do not exclude memory regions in each get_xy_memory_range() func Thomas Renninger
2013-04-11 12:26 ` [PATCH 4/5] kexec: X86: make crash_memory_range global and store its no of elements in crash_ranges Thomas Renninger
2013-04-11 12:26 ` [PATCH 5/5] kexec: X86: Pass memory ranges via e820 table instead of memmap= boot parameter Thomas Renninger
2013-04-11 14:55   ` Yinghai Lu
2013-04-11 14:55     ` Yinghai Lu
2013-04-11 15:06     ` H. Peter Anvin
2013-04-11 15:06       ` H. Peter Anvin
2013-04-12 14:31       ` Vivek Goyal
2013-04-12 14:31         ` Vivek Goyal
2013-04-12 14:56         ` H. Peter Anvin
2013-04-12 14:56           ` H. Peter Anvin
2013-04-12 22:17           ` Dave Hansen
2013-04-12 22:17             ` Dave Hansen
2013-04-12 23:17             ` H. Peter Anvin
2013-04-12 23:17               ` H. Peter Anvin
2013-04-15  4:52             ` HATAYAMA Daisuke
2013-04-15  4:52               ` HATAYAMA Daisuke
2013-04-15  5:58               ` Dave Hansen [this message]
2013-04-15  5:58                 ` Dave Hansen
2013-04-15  7:58                 ` HATAYAMA Daisuke
2013-04-15  7:58                   ` HATAYAMA Daisuke
2013-04-15 14:49                 ` H. Peter Anvin
2013-04-15 14:49                   ` H. Peter Anvin
2013-04-12 12:24     ` Thomas Renninger
2013-04-12 12:24       ` Thomas Renninger
2013-04-12  9:56   ` Zhang Yanfei
2013-04-12 11:12     ` Thomas Renninger
2013-04-15  9:05     ` Thomas Renninger
2013-04-15 12:20       ` H. Peter Anvin
2013-04-15 19:48         ` Thomas Renninger
2013-04-15 19:54           ` H. Peter Anvin
2013-04-16  7:52             ` Thomas Renninger
2013-04-16 11:59               ` H. Peter Anvin
2013-04-16 12:41               ` Zhang Yanfei
2013-04-12 15:24   ` Eric W. Biederman
2013-04-15 11:48     ` Thomas Renninger

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