* [PATCH v3 0/2] arm64: rockchip: support RK3399 Ficus board
@ 2018-07-05 15:08 ` Ezequiel Garcia
0 siblings, 0 replies; 14+ messages in thread
From: Ezequiel Garcia @ 2018-07-05 15:08 UTC (permalink / raw)
To: linux-rockchip, linux-arm-kernel, devicetree
Cc: Mark Rutland, kernel, Ezequiel Garcia, Heiko Stuebner,
Rob Herring
Here's the third spin for the RK3399 Ficus support.
Changes from v2:
* Dropped rk3399.dtsi changes and rebased on top of Randy's patch.
* Removed double empty line.
* Coalesced schematics comment
Changes from v1:
* Dropoed USB support as it's not working.
* Added schematics.
* Splitted rk3399.dtsi from new ficus.dts file.
* Added new vendor.
* Cleaned regulators syntax and stlye.
Series based on: 600b359d2b98 ("arm64: dts: rockchip: add some common pin-settings to rk3399").
Ezequiel Garcia (2):
dt-bindings: Add vendor prefix for Vamrs Ltd.
arm64: dts: rockchip: add 96boards RK3399 Ficus board
.../devicetree/bindings/arm/rockchip.txt | 5 +
.../devicetree/bindings/vendor-prefixes.txt | 1 +
arch/arm64/boot/dts/rockchip/Makefile | 1 +
arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 514 ++++++++++++++++++
4 files changed, 521 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-ficus.dts
--
2.18.0.rc2
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH v3 0/2] arm64: rockchip: support RK3399 Ficus board @ 2018-07-05 15:08 ` Ezequiel Garcia 0 siblings, 0 replies; 14+ messages in thread From: Ezequiel Garcia @ 2018-07-05 15:08 UTC (permalink / raw) To: linux-arm-kernel Here's the third spin for the RK3399 Ficus support. Changes from v2: * Dropped rk3399.dtsi changes and rebased on top of Randy's patch. * Removed double empty line. * Coalesced schematics comment Changes from v1: * Dropoed USB support as it's not working. * Added schematics. * Splitted rk3399.dtsi from new ficus.dts file. * Added new vendor. * Cleaned regulators syntax and stlye. Series based on: 600b359d2b98 ("arm64: dts: rockchip: add some common pin-settings to rk3399"). Ezequiel Garcia (2): dt-bindings: Add vendor prefix for Vamrs Ltd. arm64: dts: rockchip: add 96boards RK3399 Ficus board .../devicetree/bindings/arm/rockchip.txt | 5 + .../devicetree/bindings/vendor-prefixes.txt | 1 + arch/arm64/boot/dts/rockchip/Makefile | 1 + arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 514 ++++++++++++++++++ 4 files changed, 521 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-ficus.dts -- 2.18.0.rc2 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 1/2] dt-bindings: Add vendor prefix for Vamrs Ltd. 2018-07-05 15:08 ` Ezequiel Garcia @ 2018-07-05 15:08 ` Ezequiel Garcia -1 siblings, 0 replies; 14+ messages in thread From: Ezequiel Garcia @ 2018-07-05 15:08 UTC (permalink / raw) To: linux-rockchip, linux-arm-kernel, devicetree Cc: Mark Rutland, kernel, Ezequiel Garcia, Heiko Stuebner, Rob Herring Vamrs Ltd. is a hardware solutions provider based in China. Website: http://vamrs.com/ Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 7cad066191ee..5dc2c5f49e37 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -393,6 +393,7 @@ urt United Radiant Technology Corporation usi Universal Scientific Industrial Co., Ltd. v3 V3 Semiconductor variscite Variscite Ltd. +vamrs Vamrs Ltd. via VIA Technologies, Inc. virtio Virtual I/O Device Specification, developed by the OASIS consortium vivante Vivante Corporation -- 2.18.0.rc2 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v3 1/2] dt-bindings: Add vendor prefix for Vamrs Ltd. @ 2018-07-05 15:08 ` Ezequiel Garcia 0 siblings, 0 replies; 14+ messages in thread From: Ezequiel Garcia @ 2018-07-05 15:08 UTC (permalink / raw) To: linux-arm-kernel Vamrs Ltd. is a hardware solutions provider based in China. Website: http://vamrs.com/ Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index 7cad066191ee..5dc2c5f49e37 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -393,6 +393,7 @@ urt United Radiant Technology Corporation usi Universal Scientific Industrial Co., Ltd. v3 V3 Semiconductor variscite Variscite Ltd. +vamrs Vamrs Ltd. via VIA Technologies, Inc. virtio Virtual I/O Device Specification, developed by the OASIS consortium vivante Vivante Corporation -- 2.18.0.rc2 ^ permalink raw reply related [flat|nested] 14+ messages in thread
[parent not found: <20180705150818.29931-2-ezequiel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>]
* Re: [PATCH v3 1/2] dt-bindings: Add vendor prefix for Vamrs Ltd. 2018-07-05 15:08 ` Ezequiel Garcia @ 2018-07-05 23:38 ` Rob Herring -1 siblings, 0 replies; 14+ messages in thread From: Rob Herring @ 2018-07-05 23:38 UTC (permalink / raw) To: Ezequiel Garcia Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA, Heiko Stuebner, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, kernel-ZGY8ohtN/8qB+jHODAdFcQ, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r On Thu, Jul 05, 2018 at 12:08:17PM -0300, Ezequiel Garcia wrote: > Vamrs Ltd. is a hardware solutions provider based in China. > > Website: http://vamrs.com/ > > Signed-off-by: Ezequiel Garcia <ezequiel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org> > --- > Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt > index 7cad066191ee..5dc2c5f49e37 100644 > --- a/Documentation/devicetree/bindings/vendor-prefixes.txt > +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt > @@ -393,6 +393,7 @@ urt United Radiant Technology Corporation > usi Universal Scientific Industrial Co., Ltd. > v3 V3 Semiconductor > variscite Variscite Ltd. > +vamrs Vamrs Ltd. Alphabetical order please. > via VIA Technologies, Inc. > virtio Virtual I/O Device Specification, developed by the OASIS consortium > vivante Vivante Corporation > -- > 2.18.0.rc2 > ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 1/2] dt-bindings: Add vendor prefix for Vamrs Ltd. @ 2018-07-05 23:38 ` Rob Herring 0 siblings, 0 replies; 14+ messages in thread From: Rob Herring @ 2018-07-05 23:38 UTC (permalink / raw) To: linux-arm-kernel On Thu, Jul 05, 2018 at 12:08:17PM -0300, Ezequiel Garcia wrote: > Vamrs Ltd. is a hardware solutions provider based in China. > > Website: http://vamrs.com/ > > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> > --- > Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt > index 7cad066191ee..5dc2c5f49e37 100644 > --- a/Documentation/devicetree/bindings/vendor-prefixes.txt > +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt > @@ -393,6 +393,7 @@ urt United Radiant Technology Corporation > usi Universal Scientific Industrial Co., Ltd. > v3 V3 Semiconductor > variscite Variscite Ltd. > +vamrs Vamrs Ltd. Alphabetical order please. > via VIA Technologies, Inc. > virtio Virtual I/O Device Specification, developed by the OASIS consortium > vivante Vivante Corporation > -- > 2.18.0.rc2 > ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 2/2] arm64: dts: rockchip: add 96boards RK3399 Ficus board 2018-07-05 15:08 ` Ezequiel Garcia @ 2018-07-05 15:08 ` Ezequiel Garcia -1 siblings, 0 replies; 14+ messages in thread From: Ezequiel Garcia @ 2018-07-05 15:08 UTC (permalink / raw) To: linux-rockchip, linux-arm-kernel, devicetree Cc: Mark Rutland, kernel, Ezequiel Garcia, Heiko Stuebner, Rob Herring The RK3399 Ficus board is an Enterprise Edition board manufactured by Vamrs Ltd., based on the Rockchip RK3399 SoC. The board exposes a bunch of nice peripherals, including SATA, HDMI, MIPI CSI, Ethernet, WiFi, and PCIe. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> --- .../devicetree/bindings/arm/rockchip.txt | 5 + arch/arm64/boot/dts/rockchip/Makefile | 1 + arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 514 ++++++++++++++++++ 3 files changed, 520 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-ficus.dts diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index 1c1d62d03c4f..d46c5d43e27f 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -1,5 +1,10 @@ Rockchip platforms device tree bindings --------------------------------------- + +- 96boards RK3399 Ficus (ROCK960 Enterprise Edition) + Required root node properties: + - compatible = "vamrs,ficus", "rockchip,rk3399"; + - Amarula Vyasa RK3288 board Required root node properties: - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 48a83f882947..2811fb701f12 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ficus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts new file mode 100644 index 000000000000..b17b831df90e --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts @@ -0,0 +1,514 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Collabora Ltd. + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. + * + * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw + */ + +/dts-v1/; +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model = "96boards RK3399 Ficus"; + compatible = "vamrs,ficus", "rockchip,rk3399"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + vcc1v8_s0: vcc1v8-s0 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_s0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <&vcc_sys>; + }; + + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_drv>; + regulator-boot-on; + regulator-name = "vcc3v3_pcie"; + vin-supply = <&vcc3v3_sys>; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 0>; + regulator-name = "vdd_log"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + + /* for rockchip boot on */ + rockchip,pwm_id= <2>; + rockchip,pwm_voltage = <900000>; + + vin-supply = <&vcc_sys>; + }; + +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc3v3_sys>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x28>; + rx_delay = <0x11>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c3>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + vdd_cpu_b: syr827@40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + status = "okay"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator@41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc_sys>; + vcc10-supply = <&vcc_sys>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc_1v8>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name = "vdd_cpu_l"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v8_dvp: LDO_REG1 { + regulator-name = "vcc1v8_dvp"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_hdmi: LDO_REG2 { + regulator-name = "vcca1v8_hdmi"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca_1v8: LDO_REG3 { + regulator-name = "vcca_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sd: LDO_REG4 { + regulator-name = "vcc_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc3v0_sd: LDO_REG5 { + regulator-name = "vcc3v0_sd"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcca0v9_hdmi: LDO_REG7 { + regulator-name = "vcca0v9_hdmi"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name = "vcc_3v0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc3v3_s3: SWITCH_REG1 { + regulator-name = "vcc3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc3v3_s0: SWITCH_REG2 { + regulator-name = "vcc3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; +}; + +&io_domains { + bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ + audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ + sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ + gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + +&pcie0 { + ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; + num-lanes = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_clkreqn_cpm>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + +&pmu_io_domains { + pmu1830-supply = <&vcc_1v8>; + status = "okay"; +}; + +&pinctrl { + gmac { + rgmii_sleep_pins: rgmii-sleep-pins { + rockchip,pins = + <3 15 RK_FUNC_GPIO &pcfg_output_low>; + }; + }; + + sdmmc { + sdmmc_bus1: sdmmc-bus1 { + rockchip,pins = + <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; + }; + + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = + <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, + <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, + <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, + <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; + }; + + sdmmc_clk: sdmmc-clk { + rockchip,pins = + <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = + <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; + }; + }; + + pcie { + pcie_drv: pcie-drv { + rockchip,pins = + <1 24 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = + <1 21 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_gpio: vsel1-gpio { + rockchip,pins = + <1 17 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = + <1 14 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + clock-frequency = <100000000>; + clock-freq-min-max = <100000 100000000>; + disable-wp; + sd-uhs-sdr104; + vqmmc-supply = <&vcc_sd>; + card-detect-delay = <800>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; -- 2.18.0.rc2 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v3 2/2] arm64: dts: rockchip: add 96boards RK3399 Ficus board @ 2018-07-05 15:08 ` Ezequiel Garcia 0 siblings, 0 replies; 14+ messages in thread From: Ezequiel Garcia @ 2018-07-05 15:08 UTC (permalink / raw) To: linux-arm-kernel The RK3399 Ficus board is an Enterprise Edition board manufactured by Vamrs Ltd., based on the Rockchip RK3399 SoC. The board exposes a bunch of nice peripherals, including SATA, HDMI, MIPI CSI, Ethernet, WiFi, and PCIe. Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> --- .../devicetree/bindings/arm/rockchip.txt | 5 + arch/arm64/boot/dts/rockchip/Makefile | 1 + arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 514 ++++++++++++++++++ 3 files changed, 520 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-ficus.dts diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt index 1c1d62d03c4f..d46c5d43e27f 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.txt +++ b/Documentation/devicetree/bindings/arm/rockchip.txt @@ -1,5 +1,10 @@ Rockchip platforms device tree bindings --------------------------------------- + +- 96boards RK3399 Ficus (ROCK960 Enterprise Edition) + Required root node properties: + - compatible = "vamrs,ficus", "rockchip,rk3399"; + - Amarula Vyasa RK3288 board Required root node properties: - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index 48a83f882947..2811fb701f12 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ficus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts new file mode 100644 index 000000000000..b17b831df90e --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts @@ -0,0 +1,514 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Collabora Ltd. + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. + * + * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw + */ + +/dts-v1/; +#include "rk3399.dtsi" +#include "rk3399-opp.dtsi" + +/ { + model = "96boards RK3399 Ficus"; + compatible = "vamrs,ficus", "rockchip,rk3399"; + + chosen { + stdout-path = "serial2:1500000n8"; + }; + + clkin_gmac: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "clkin_gmac"; + #clock-cells = <0>; + }; + + vcc1v8_s0: vcc1v8-s0 { + compatible = "regulator-fixed"; + regulator-name = "vcc1v8_s0"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <&vcc_sys>; + }; + + vcc3v3_pcie: vcc3v3-pcie-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_drv>; + regulator-boot-on; + regulator-name = "vcc3v3_pcie"; + vin-supply = <&vcc3v3_sys>; + }; + + vdd_log: vdd-log { + compatible = "pwm-regulator"; + pwms = <&pwm2 0 25000 0>; + regulator-name = "vdd_log"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1400000>; + regulator-always-on; + regulator-boot-on; + + /* for rockchip boot on */ + rockchip,pwm_id= <2>; + rockchip,pwm_voltage = <900000>; + + vin-supply = <&vcc_sys>; + }; + +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_l>; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_b>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_b>; +}; + +&emmc_phy { + status = "okay"; +}; + +&gmac { + assigned-clocks = <&cru SCLK_RMII_SRC>; + assigned-clock-parents = <&clkin_gmac>; + clock_in_out = "input"; + phy-supply = <&vcc3v3_sys>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 50000>; + tx_delay = <0x28>; + rx_delay = <0x11>; + status = "okay"; +}; + +&hdmi { + ddc-i2c-bus = <&i2c3>; + pinctrl-names = "default"; + pinctrl-0 = <&hdmi_cec>; + status = "okay"; +}; + +&i2c0 { + clock-frequency = <400000>; + i2c-scl-rising-time-ns = <168>; + i2c-scl-falling-time-ns = <4>; + status = "okay"; + + vdd_cpu_b: syr827 at 40 { + compatible = "silergy,syr827"; + reg = <0x40>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_b"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + status = "okay"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: regulator at 41 { + compatible = "silergy,syr828"; + reg = <0x41>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_gpu"; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1500000>; + regulator-ramp-delay = <1000>; + regulator-always-on; + regulator-boot-on; + vin-supply = <&vcc_sys>; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk808: pmic at 1b { + compatible = "rockchip,rk808"; + reg = <0x1b>; + interrupt-parent = <&gpio1>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk808-clkout2"; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc6-supply = <&vcc_sys>; + vcc7-supply = <&vcc_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc_sys>; + vcc10-supply = <&vcc_sys>; + vcc11-supply = <&vcc_sys>; + vcc12-supply = <&vcc3v3_sys>; + vddio-supply = <&vcc_1v8>; + + regulators { + vdd_center: DCDC_REG1 { + regulator-name = "vdd_center"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_l: DCDC_REG2 { + regulator-name = "vdd_cpu_l"; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG4 { + regulator-name = "vcc_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc1v8_dvp: LDO_REG1 { + regulator-name = "vcc1v8_dvp"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_hdmi: LDO_REG2 { + regulator-name = "vcca1v8_hdmi"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca_1v8: LDO_REG3 { + regulator-name = "vcca_1v8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc_sd: LDO_REG4 { + regulator-name = "vcc_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc3v0_sd: LDO_REG5 { + regulator-name = "vcc3v0_sd"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc_1v5: LDO_REG6 { + regulator-name = "vcc_1v5"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1500000>; + }; + }; + + vcca0v9_hdmi: LDO_REG7 { + regulator-name = "vcca0v9_hdmi"; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vcc_3v0: LDO_REG8 { + regulator-name = "vcc_3v0"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3000000>; + }; + }; + + vcc3v3_s3: SWITCH_REG1 { + regulator-name = "vcc3v3_s3"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc3v3_s0: SWITCH_REG2 { + regulator-name = "vcc3v3_s0"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + }; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; +}; + +&i2c4 { + status = "okay"; +}; + +&io_domains { + bt656-supply = <&vcc1v8_s0>; /* bt656_gpio2ab_ms */ + audio-supply = <&vcc1v8_s0>; /* audio_gpio3d4a_ms */ + sdmmc-supply = <&vcc_sd>; /* sdmmc_gpio4b_ms */ + gpio1830-supply = <&vcc_3v0>; /* gpio1833_gpio4cd_ms */ + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + +&pcie0 { + ep-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>; + num-lanes = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_clkreqn_cpm>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + +&pmu_io_domains { + pmu1830-supply = <&vcc_1v8>; + status = "okay"; +}; + +&pinctrl { + gmac { + rgmii_sleep_pins: rgmii-sleep-pins { + rockchip,pins = + <3 15 RK_FUNC_GPIO &pcfg_output_low>; + }; + }; + + sdmmc { + sdmmc_bus1: sdmmc-bus1 { + rockchip,pins = + <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>; + }; + + sdmmc_bus4: sdmmc-bus4 { + rockchip,pins = + <4 8 RK_FUNC_1 &pcfg_pull_up_8ma>, + <4 9 RK_FUNC_1 &pcfg_pull_up_8ma>, + <4 10 RK_FUNC_1 &pcfg_pull_up_8ma>, + <4 11 RK_FUNC_1 &pcfg_pull_up_8ma>; + }; + + sdmmc_clk: sdmmc-clk { + rockchip,pins = + <4 12 RK_FUNC_1 &pcfg_pull_none_18ma>; + }; + + sdmmc_cmd: sdmmc-cmd { + rockchip,pins = + <4 13 RK_FUNC_1 &pcfg_pull_up_8ma>; + }; + }; + + pcie { + pcie_drv: pcie-drv { + rockchip,pins = + <1 24 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = + <1 21 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + vsel1_gpio: vsel1-gpio { + rockchip,pins = + <1 17 RK_FUNC_GPIO &pcfg_pull_down>; + }; + + vsel2_gpio: vsel2-gpio { + rockchip,pins = + <1 14 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&pwm2 { + status = "okay"; +}; + +&pwm3 { + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + non-removable; + status = "okay"; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + clock-frequency = <100000000>; + clock-freq-min-max = <100000 100000000>; + disable-wp; + sd-uhs-sdr104; + vqmmc-supply = <&vcc_sd>; + card-detect-delay = <800>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; +}; + +&uart2 { + status = "okay"; +}; + +&vopb { + status = "okay"; +}; + +&vopb_mmu { + status = "okay"; +}; + +&vopl { + status = "okay"; +}; + +&vopl_mmu { + status = "okay"; +}; -- 2.18.0.rc2 ^ permalink raw reply related [flat|nested] 14+ messages in thread
[parent not found: <20180705150818.29931-3-ezequiel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>]
* Re: [PATCH v3 2/2] arm64: dts: rockchip: add 96boards RK3399 Ficus board 2018-07-05 15:08 ` Ezequiel Garcia @ 2018-07-05 23:41 ` Rob Herring -1 siblings, 0 replies; 14+ messages in thread From: Rob Herring @ 2018-07-05 23:41 UTC (permalink / raw) To: Ezequiel Garcia Cc: Mark Rutland, devicetree-u79uwXL29TY76Z2rM5mHXA, Heiko Stuebner, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, kernel-ZGY8ohtN/8qB+jHODAdFcQ, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r On Thu, Jul 05, 2018 at 12:08:18PM -0300, Ezequiel Garcia wrote: > The RK3399 Ficus board is an Enterprise Edition board > manufactured by Vamrs Ltd., based on the Rockchip RK3399 SoC. > > The board exposes a bunch of nice peripherals, including > SATA, HDMI, MIPI CSI, Ethernet, WiFi, and PCIe. > > Signed-off-by: Ezequiel Garcia <ezequiel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org> > --- > .../devicetree/bindings/arm/rockchip.txt | 5 + > arch/arm64/boot/dts/rockchip/Makefile | 1 + > arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 514 ++++++++++++++++++ > 3 files changed, 520 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-ficus.dts > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt > index 1c1d62d03c4f..d46c5d43e27f 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.txt > +++ b/Documentation/devicetree/bindings/arm/rockchip.txt > @@ -1,5 +1,10 @@ > Rockchip platforms device tree bindings > --------------------------------------- > + > +- 96boards RK3399 Ficus (ROCK960 Enterprise Edition) > + Required root node properties: > + - compatible = "vamrs,ficus", "rockchip,rk3399"; > + > - Amarula Vyasa RK3288 board > Required root node properties: > - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile > index 48a83f882947..2811fb701f12 100644 > --- a/arch/arm64/boot/dts/rockchip/Makefile > +++ b/arch/arm64/boot/dts/rockchip/Makefile > @@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ficus.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts > new file mode 100644 > index 000000000000..b17b831df90e > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts > @@ -0,0 +1,514 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2018 Collabora Ltd. > + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. > + * > + * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw > + */ > + > +/dts-v1/; > +#include "rk3399.dtsi" > +#include "rk3399-opp.dtsi" > + > +/ { > + model = "96boards RK3399 Ficus"; > + compatible = "vamrs,ficus", "rockchip,rk3399"; > + > + chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + clkin_gmac: external-gmac-clock { > + compatible = "fixed-clock"; > + clock-frequency = <125000000>; > + clock-output-names = "clkin_gmac"; > + #clock-cells = <0>; > + }; > + > + vcc1v8_s0: vcc1v8-s0 { > + compatible = "regulator-fixed"; > + regulator-name = "vcc1v8_s0"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + vcc_sys: vcc-sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_sys"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-always-on; > + }; > + > + vcc3v3_sys: vcc3v3-sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc3v3_sys"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + vin-supply = <&vcc_sys>; > + }; > + > + vcc3v3_pcie: vcc3v3-pcie-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie_drv>; > + regulator-boot-on; > + regulator-name = "vcc3v3_pcie"; > + vin-supply = <&vcc3v3_sys>; > + }; > + > + vdd_log: vdd-log { > + compatible = "pwm-regulator"; > + pwms = <&pwm2 0 25000 0>; > + regulator-name = "vdd_log"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1400000>; > + regulator-always-on; > + regulator-boot-on; > + > + /* for rockchip boot on */ > + rockchip,pwm_id= <2>; > + rockchip,pwm_voltage = <900000>; > + > + vin-supply = <&vcc_sys>; > + }; > + > +}; > + > +&cpu_l0 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l1 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l2 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l3 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_b0 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&cpu_b1 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&emmc_phy { > + status = "okay"; > +}; > + > +&gmac { > + assigned-clocks = <&cru SCLK_RMII_SRC>; > + assigned-clock-parents = <&clkin_gmac>; > + clock_in_out = "input"; > + phy-supply = <&vcc3v3_sys>; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&rgmii_pins>; > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + snps,reset-delays-us = <0 10000 50000>; > + tx_delay = <0x28>; > + rx_delay = <0x11>; > + status = "okay"; > +}; > + > +&hdmi { > + ddc-i2c-bus = <&i2c3>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hdmi_cec>; > + status = "okay"; > +}; > + > +&i2c0 { > + clock-frequency = <400000>; > + i2c-scl-rising-time-ns = <168>; > + i2c-scl-falling-time-ns = <4>; > + status = "okay"; > + > + vdd_cpu_b: syr827@40 { regulator@40 > + compatible = "silergy,syr827"; > + reg = <0x40>; > + fcs,suspend-voltage-selector = <1>; Strange to have a different vendor for this property... Otherwise, Reviewed-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> > + regulator-name = "vdd_cpu_b"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1500000>; > + regulator-ramp-delay = <1000>; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc_sys>; > + status = "okay"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 2/2] arm64: dts: rockchip: add 96boards RK3399 Ficus board @ 2018-07-05 23:41 ` Rob Herring 0 siblings, 0 replies; 14+ messages in thread From: Rob Herring @ 2018-07-05 23:41 UTC (permalink / raw) To: linux-arm-kernel On Thu, Jul 05, 2018 at 12:08:18PM -0300, Ezequiel Garcia wrote: > The RK3399 Ficus board is an Enterprise Edition board > manufactured by Vamrs Ltd., based on the Rockchip RK3399 SoC. > > The board exposes a bunch of nice peripherals, including > SATA, HDMI, MIPI CSI, Ethernet, WiFi, and PCIe. > > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> > --- > .../devicetree/bindings/arm/rockchip.txt | 5 + > arch/arm64/boot/dts/rockchip/Makefile | 1 + > arch/arm64/boot/dts/rockchip/rk3399-ficus.dts | 514 ++++++++++++++++++ > 3 files changed, 520 insertions(+) > create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-ficus.dts > > diff --git a/Documentation/devicetree/bindings/arm/rockchip.txt b/Documentation/devicetree/bindings/arm/rockchip.txt > index 1c1d62d03c4f..d46c5d43e27f 100644 > --- a/Documentation/devicetree/bindings/arm/rockchip.txt > +++ b/Documentation/devicetree/bindings/arm/rockchip.txt > @@ -1,5 +1,10 @@ > Rockchip platforms device tree bindings > --------------------------------------- > + > +- 96boards RK3399 Ficus (ROCK960 Enterprise Edition) > + Required root node properties: > + - compatible = "vamrs,ficus", "rockchip,rk3399"; > + > - Amarula Vyasa RK3288 board > Required root node properties: > - compatible = "amarula,vyasa-rk3288", "rockchip,rk3288"; > diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile > index 48a83f882947..2811fb701f12 100644 > --- a/arch/arm64/boot/dts/rockchip/Makefile > +++ b/arch/arm64/boot/dts/rockchip/Makefile > @@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb > +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ficus.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb > dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb > diff --git a/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts > new file mode 100644 > index 000000000000..b17b831df90e > --- /dev/null > +++ b/arch/arm64/boot/dts/rockchip/rk3399-ficus.dts > @@ -0,0 +1,514 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright (c) 2018 Collabora Ltd. > + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd. > + * > + * Schematics available at https://dl.vamrs.com/products/ficus/docs/hw > + */ > + > +/dts-v1/; > +#include "rk3399.dtsi" > +#include "rk3399-opp.dtsi" > + > +/ { > + model = "96boards RK3399 Ficus"; > + compatible = "vamrs,ficus", "rockchip,rk3399"; > + > + chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + clkin_gmac: external-gmac-clock { > + compatible = "fixed-clock"; > + clock-frequency = <125000000>; > + clock-output-names = "clkin_gmac"; > + #clock-cells = <0>; > + }; > + > + vcc1v8_s0: vcc1v8-s0 { > + compatible = "regulator-fixed"; > + regulator-name = "vcc1v8_s0"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + regulator-always-on; > + }; > + > + vcc_sys: vcc-sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc_sys"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + regulator-always-on; > + }; > + > + vcc3v3_sys: vcc3v3-sys { > + compatible = "regulator-fixed"; > + regulator-name = "vcc3v3_sys"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-always-on; > + vin-supply = <&vcc_sys>; > + }; > + > + vcc3v3_pcie: vcc3v3-pcie-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pcie_drv>; > + regulator-boot-on; > + regulator-name = "vcc3v3_pcie"; > + vin-supply = <&vcc3v3_sys>; > + }; > + > + vdd_log: vdd-log { > + compatible = "pwm-regulator"; > + pwms = <&pwm2 0 25000 0>; > + regulator-name = "vdd_log"; > + regulator-min-microvolt = <800000>; > + regulator-max-microvolt = <1400000>; > + regulator-always-on; > + regulator-boot-on; > + > + /* for rockchip boot on */ > + rockchip,pwm_id= <2>; > + rockchip,pwm_voltage = <900000>; > + > + vin-supply = <&vcc_sys>; > + }; > + > +}; > + > +&cpu_l0 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l1 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l2 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_l3 { > + cpu-supply = <&vdd_cpu_l>; > +}; > + > +&cpu_b0 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&cpu_b1 { > + cpu-supply = <&vdd_cpu_b>; > +}; > + > +&emmc_phy { > + status = "okay"; > +}; > + > +&gmac { > + assigned-clocks = <&cru SCLK_RMII_SRC>; > + assigned-clock-parents = <&clkin_gmac>; > + clock_in_out = "input"; > + phy-supply = <&vcc3v3_sys>; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&rgmii_pins>; > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + snps,reset-delays-us = <0 10000 50000>; > + tx_delay = <0x28>; > + rx_delay = <0x11>; > + status = "okay"; > +}; > + > +&hdmi { > + ddc-i2c-bus = <&i2c3>; > + pinctrl-names = "default"; > + pinctrl-0 = <&hdmi_cec>; > + status = "okay"; > +}; > + > +&i2c0 { > + clock-frequency = <400000>; > + i2c-scl-rising-time-ns = <168>; > + i2c-scl-falling-time-ns = <4>; > + status = "okay"; > + > + vdd_cpu_b: syr827 at 40 { regulator at 40 > + compatible = "silergy,syr827"; > + reg = <0x40>; > + fcs,suspend-voltage-selector = <1>; Strange to have a different vendor for this property... Otherwise, Reviewed-by: Rob Herring <robh@kernel.org> > + regulator-name = "vdd_cpu_b"; > + regulator-min-microvolt = <712500>; > + regulator-max-microvolt = <1500000>; > + regulator-ramp-delay = <1000>; > + regulator-always-on; > + regulator-boot-on; > + vin-supply = <&vcc_sys>; > + status = "okay"; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v3 2/2] arm64: dts: rockchip: add 96boards RK3399 Ficus board 2018-07-05 23:41 ` Rob Herring @ 2018-07-06 13:46 ` Ezequiel Garcia -1 siblings, 0 replies; 14+ messages in thread From: Ezequiel Garcia @ 2018-07-06 13:46 UTC (permalink / raw) To: Rob Herring Cc: Mark Rutland, devicetree, Heiko Stuebner, linux-rockchip, kernel, linux-arm-kernel On Thu, 2018-07-05 at 17:41 -0600, Rob Herring wrote: > On Thu, Jul 05, 2018 at 12:08:18PM -0300, Ezequiel Garcia wrote: > > The RK3399 Ficus board is an Enterprise Edition board > > manufactured by Vamrs Ltd., based on the Rockchip RK3399 SoC. > > > > The board exposes a bunch of nice peripherals, including > > SATA, HDMI, MIPI CSI, Ethernet, WiFi, and PCIe. > > > > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> > > [snip] > > + > > +&i2c0 { > > + clock-frequency = <400000>; > > + i2c-scl-rising-time-ns = <168>; > > + i2c-scl-falling-time-ns = <4>; > > + status = "okay"; > > + > > + vdd_cpu_b: syr827@40 { > > regulator@40 > OK. > > + compatible = "silergy,syr827"; > > + reg = <0x40>; > > + fcs,suspend-voltage-selector = <1>; > > Strange to have a different vendor for this property... > It's because this driver has also a Fairchild compatible "fcs,fan53555". > Otherwise, > > Reviewed-by: Rob Herring <robh@kernel.org> > Thanks Rob! ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 2/2] arm64: dts: rockchip: add 96boards RK3399 Ficus board @ 2018-07-06 13:46 ` Ezequiel Garcia 0 siblings, 0 replies; 14+ messages in thread From: Ezequiel Garcia @ 2018-07-06 13:46 UTC (permalink / raw) To: linux-arm-kernel On Thu, 2018-07-05 at 17:41 -0600, Rob Herring wrote: > On Thu, Jul 05, 2018 at 12:08:18PM -0300, Ezequiel Garcia wrote: > > The RK3399 Ficus board is an Enterprise Edition board > > manufactured by Vamrs Ltd., based on the Rockchip RK3399 SoC. > > > > The board exposes a bunch of nice peripherals, including > > SATA, HDMI, MIPI CSI, Ethernet, WiFi, and PCIe. > > > > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> > > [snip] > > + > > +&i2c0 { > > + clock-frequency = <400000>; > > + i2c-scl-rising-time-ns = <168>; > > + i2c-scl-falling-time-ns = <4>; > > + status = "okay"; > > + > > + vdd_cpu_b: syr827 at 40 { > > regulator at 40 > OK. > > + compatible = "silergy,syr827"; > > + reg = <0x40>; > > + fcs,suspend-voltage-selector = <1>; > > Strange to have a different vendor for this property... > It's because this driver has also a Fairchild compatible "fcs,fan53555". > Otherwise, > > Reviewed-by: Rob Herring <robh@kernel.org> > Thanks Rob! ^ permalink raw reply [flat|nested] 14+ messages in thread
[parent not found: <cceccdfefbcf9a5dcc5d683e7c7d4a2d16949344.camel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>]
* Re: [PATCH v3 2/2] arm64: dts: rockchip: add 96boards RK3399 Ficus board 2018-07-06 13:46 ` Ezequiel Garcia @ 2018-07-06 13:49 ` Heiko Stuebner -1 siblings, 0 replies; 14+ messages in thread From: Heiko Stuebner @ 2018-07-06 13:49 UTC (permalink / raw) To: Ezequiel Garcia Cc: Mark Rutland, Rob Herring, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, kernel-ZGY8ohtN/8qB+jHODAdFcQ, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r Am Freitag, 6. Juli 2018, 15:46:55 CEST schrieb Ezequiel Garcia: > On Thu, 2018-07-05 at 17:41 -0600, Rob Herring wrote: > > On Thu, Jul 05, 2018 at 12:08:18PM -0300, Ezequiel Garcia wrote: > > > The RK3399 Ficus board is an Enterprise Edition board > > > manufactured by Vamrs Ltd., based on the Rockchip RK3399 SoC. > > > > > > The board exposes a bunch of nice peripherals, including > > > SATA, HDMI, MIPI CSI, Ethernet, WiFi, and PCIe. > > > > > > Signed-off-by: Ezequiel Garcia <ezequiel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org> > > > > [snip] > > > + > > > +&i2c0 { > > > + clock-frequency = <400000>; > > > + i2c-scl-rising-time-ns = <168>; > > > + i2c-scl-falling-time-ns = <4>; > > > + status = "okay"; > > > + > > > + vdd_cpu_b: syr827@40 { > > > > regulator@40 > > > > OK. > > > > + compatible = "silergy,syr827"; > > > + reg = <0x40>; > > > + fcs,suspend-voltage-selector = <1>; > > > > Strange to have a different vendor for this property... > > > > It's because this driver has also a Fairchild compatible > "fcs,fan53555". The Silergy regulators seem to be some sort of clone of the Fairchild fan53555. ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v3 2/2] arm64: dts: rockchip: add 96boards RK3399 Ficus board @ 2018-07-06 13:49 ` Heiko Stuebner 0 siblings, 0 replies; 14+ messages in thread From: Heiko Stuebner @ 2018-07-06 13:49 UTC (permalink / raw) To: linux-arm-kernel Am Freitag, 6. Juli 2018, 15:46:55 CEST schrieb Ezequiel Garcia: > On Thu, 2018-07-05 at 17:41 -0600, Rob Herring wrote: > > On Thu, Jul 05, 2018 at 12:08:18PM -0300, Ezequiel Garcia wrote: > > > The RK3399 Ficus board is an Enterprise Edition board > > > manufactured by Vamrs Ltd., based on the Rockchip RK3399 SoC. > > > > > > The board exposes a bunch of nice peripherals, including > > > SATA, HDMI, MIPI CSI, Ethernet, WiFi, and PCIe. > > > > > > Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> > > > > [snip] > > > + > > > +&i2c0 { > > > + clock-frequency = <400000>; > > > + i2c-scl-rising-time-ns = <168>; > > > + i2c-scl-falling-time-ns = <4>; > > > + status = "okay"; > > > + > > > + vdd_cpu_b: syr827 at 40 { > > > > regulator at 40 > > > > OK. > > > > + compatible = "silergy,syr827"; > > > + reg = <0x40>; > > > + fcs,suspend-voltage-selector = <1>; > > > > Strange to have a different vendor for this property... > > > > It's because this driver has also a Fairchild compatible > "fcs,fan53555". The Silergy regulators seem to be some sort of clone of the Fairchild fan53555. ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2018-07-06 13:49 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz follow: Atom feed
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2018-07-05 15:08 [PATCH v3 0/2] arm64: rockchip: support RK3399 Ficus board Ezequiel Garcia
2018-07-05 15:08 ` Ezequiel Garcia
2018-07-05 15:08 ` [PATCH v3 1/2] dt-bindings: Add vendor prefix for Vamrs Ltd Ezequiel Garcia
2018-07-05 15:08 ` Ezequiel Garcia
[not found] ` <20180705150818.29931-2-ezequiel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
2018-07-05 23:38 ` Rob Herring
2018-07-05 23:38 ` Rob Herring
2018-07-05 15:08 ` [PATCH v3 2/2] arm64: dts: rockchip: add 96boards RK3399 Ficus board Ezequiel Garcia
2018-07-05 15:08 ` Ezequiel Garcia
[not found] ` <20180705150818.29931-3-ezequiel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
2018-07-05 23:41 ` Rob Herring
2018-07-05 23:41 ` Rob Herring
2018-07-06 13:46 ` Ezequiel Garcia
2018-07-06 13:46 ` Ezequiel Garcia
[not found] ` <cceccdfefbcf9a5dcc5d683e7c7d4a2d16949344.camel-ZGY8ohtN/8qB+jHODAdFcQ@public.gmane.org>
2018-07-06 13:49 ` Heiko Stuebner
2018-07-06 13:49 ` Heiko Stuebner
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