From: marc.zyngier@arm.com (Marc Zyngier)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH v3 02/17] Documentation: devicetree: arm: cpus/cpu nodes bindings updates
Date: Fri, 26 Apr 2013 13:16:12 +0100 [thread overview]
Message-ID: <517A700C.2030102@arm.com> (raw)
In-Reply-To: <20130426114811.GD11648@e106331-lin.cambridge.arm.com>
On 26/04/13 12:48, Mark Rutland wrote:
> On Fri, Apr 26, 2013 at 11:18:40AM +0100, Lorenzo Pieralisi wrote:
>> On Fri, Apr 26, 2013 at 03:51:10AM +0100, Rob Herring wrote:
>>> On Wed, Apr 24, 2013 at 12:28 PM, Lorenzo Pieralisi
>>> <lorenzo.pieralisi@arm.com> wrote:
>>>> In order to extend the current cpu nodes bindings to newer CPUs
>>>> inclusive of AArch64 and to update support for older ARM CPUs this
>>>> patch updates device tree documentation for the cpu nodes bindings.
>>>>
>>>> Main changes:
>>>> - adds 64-bit bindings
>>>> - define usage of #address-cells
>>>> - define 32/64 dts compatibility settings
>>>> - defines behaviour on pre and post v7 uniprocessor systems
>>>> - adds ARM 11MPcore specific reg property definition
>>>>
>>>> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>>>> ---
>>>
>>> [...]
>>>
>>>> + - enable-method
>>>> + Value type: <stringlist>
>>>> + Usage and definition depend on ARM architecture version and
>>>> + configuration:
>>>> + # On ARM v8 64-bit systems running the OS in AArch64,
>>>> + this property is required and must be "spin-table".
>>>
>>> What about PSCI?
>>
>> I should add it, at least for ARM v8.
>
> It's worth noting KVM uses it on v7 too, so it should be available for CPUs
> that are v7+.
>
>>
>>> I don't think the ePAPR spin-table definition is sufficient for ARM.
>>> How do you define wake up by SGI or sev instruction.
>>
>> I think Will described the wfe/sev mechanism in:
>>
>> Documentation/arm64/booting.txt
>>
>> and the ePAPR does the same in 5.5.2.2/5.5.2.3. Since this is a document
>> describing cpus/cpu nodes bindings I assume that description does not
>> belong here. Question is: do we need to specify an ARM implementation
>> specific enable-method to describe SGI/sev wake-up (ePAPR 5.5.3) ?
>>
>>>> + # On ARM 32-bit systems or ARM v8 systems running
>>>> + the OS in AArch32 this property is prohibited.
>>>
>>> Why?
>>
>> Because if we define it optional with no possible set of values basically
>> it can be whatever string. I could define it optional with the same
>> allowed values as ARM v8 even if it is currently ignored, at least in Linux,
>> until PSCI implementations get merged.
>
> I believe kvmtool sets the enable-method to "psci" on v7, though I may be
> mistaken. Adding Marc to Cc as he knows better.
Indeed, kvmtool feeds the exact same DT to an ARMv7 guest:
[...]
cpu at 1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
enable-method = "psci";
reg = <0x1>;
};
[...]
The 32bit kernel doesn't check it, though.
M.
--
Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <marc.zyngier@arm.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>,
Jon Medhurst <tixy@linaro.org>, Andrew Lunn <andrew@lunn.ch>,
Viresh Kumar <viresh.kumar@linaro.org>,
Will Deacon <Will.Deacon@arm.com>,
Kukjin Kim <kgene.kim@samsung.com>,
Lennert Buytenhek <kernel@wantstofly.org>,
Lorenzo Pieralisi <Lorenzo.Pieralisi@arm.com>,
Russell King <linux@arm.linux.org.uk>,
Magnus Damm <magnus.damm@gmail.com>,
Catalin Marinas <Catalin.Marinas@arm.com>,
"grant.likely@linaro.org" <grant.likely@linaro.org>,
David Brown <davidb@codeaurora.org>, Sekhar Nori <nsekhar@ti.com>,
"devicetree-discuss@lists.ozlabs.org"
<devicetree-discuss@lists.ozlabs.org>,
"rob.herring@calxeda.com" <rob.herring@calxeda.com>,
Simon Horman <horms@verge.net.au>,
Barry Song <baohua.song@csr.com>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Amit Kucheria <amit.kucheria@linaro.org>, Vinayak Kale <vkale>
Subject: Re: [RFC PATCH v3 02/17] Documentation: devicetree: arm: cpus/cpu nodes bindings updates
Date: Fri, 26 Apr 2013 13:16:12 +0100 [thread overview]
Message-ID: <517A700C.2030102@arm.com> (raw)
In-Reply-To: <20130426114811.GD11648@e106331-lin.cambridge.arm.com>
On 26/04/13 12:48, Mark Rutland wrote:
> On Fri, Apr 26, 2013 at 11:18:40AM +0100, Lorenzo Pieralisi wrote:
>> On Fri, Apr 26, 2013 at 03:51:10AM +0100, Rob Herring wrote:
>>> On Wed, Apr 24, 2013 at 12:28 PM, Lorenzo Pieralisi
>>> <lorenzo.pieralisi@arm.com> wrote:
>>>> In order to extend the current cpu nodes bindings to newer CPUs
>>>> inclusive of AArch64 and to update support for older ARM CPUs this
>>>> patch updates device tree documentation for the cpu nodes bindings.
>>>>
>>>> Main changes:
>>>> - adds 64-bit bindings
>>>> - define usage of #address-cells
>>>> - define 32/64 dts compatibility settings
>>>> - defines behaviour on pre and post v7 uniprocessor systems
>>>> - adds ARM 11MPcore specific reg property definition
>>>>
>>>> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
>>>> ---
>>>
>>> [...]
>>>
>>>> + - enable-method
>>>> + Value type: <stringlist>
>>>> + Usage and definition depend on ARM architecture version and
>>>> + configuration:
>>>> + # On ARM v8 64-bit systems running the OS in AArch64,
>>>> + this property is required and must be "spin-table".
>>>
>>> What about PSCI?
>>
>> I should add it, at least for ARM v8.
>
> It's worth noting KVM uses it on v7 too, so it should be available for CPUs
> that are v7+.
>
>>
>>> I don't think the ePAPR spin-table definition is sufficient for ARM.
>>> How do you define wake up by SGI or sev instruction.
>>
>> I think Will described the wfe/sev mechanism in:
>>
>> Documentation/arm64/booting.txt
>>
>> and the ePAPR does the same in 5.5.2.2/5.5.2.3. Since this is a document
>> describing cpus/cpu nodes bindings I assume that description does not
>> belong here. Question is: do we need to specify an ARM implementation
>> specific enable-method to describe SGI/sev wake-up (ePAPR 5.5.3) ?
>>
>>>> + # On ARM 32-bit systems or ARM v8 systems running
>>>> + the OS in AArch32 this property is prohibited.
>>>
>>> Why?
>>
>> Because if we define it optional with no possible set of values basically
>> it can be whatever string. I could define it optional with the same
>> allowed values as ARM v8 even if it is currently ignored, at least in Linux,
>> until PSCI implementations get merged.
>
> I believe kvmtool sets the enable-method to "psci" on v7, though I may be
> mistaken. Adding Marc to Cc as he knows better.
Indeed, kvmtool feeds the exact same DT to an ARMv7 guest:
[...]
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
enable-method = "psci";
reg = <0x1>;
};
[...]
The 32bit kernel doesn't check it, though.
M.
--
Jazz is not dead. It just smells funny...
next prev parent reply other threads:[~2013-04-26 12:16 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-24 17:28 [RFC PATCH v3 00/17] ARM: DT cpu bindings updates Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 01/17] ARM: DT: kernel: move temporary cpu map stack array to static data Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 02/17] Documentation: devicetree: arm: cpus/cpu nodes bindings updates Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 19:58 ` Jean-Christophe PLAGNIOL-VILLARD
2013-04-24 19:58 ` Jean-Christophe PLAGNIOL-VILLARD
2013-04-25 9:09 ` Lorenzo Pieralisi
2013-04-25 9:09 ` Lorenzo Pieralisi
2013-04-26 2:51 ` Rob Herring
2013-04-26 2:51 ` Rob Herring
2013-04-26 10:18 ` Lorenzo Pieralisi
2013-04-26 10:18 ` Lorenzo Pieralisi
2013-04-26 11:48 ` Mark Rutland
2013-04-26 11:48 ` Mark Rutland
2013-04-26 12:16 ` Marc Zyngier [this message]
2013-04-26 12:16 ` Marc Zyngier
2013-04-24 17:28 ` [RFC PATCH v3 03/17] ARM: dts: am33xx: cpus/cpu nodes dts updates Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 04/17] ARM: dts: armada-370-xp: cpus/cpu node " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 05/17] ARM: dts: at91: " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-29 9:54 ` Nicolas Ferre
2013-04-29 9:54 ` Nicolas Ferre
2013-05-14 9:20 ` Nicolas Ferre
2013-05-14 9:20 ` Nicolas Ferre
2013-05-14 9:34 ` Lorenzo Pieralisi
2013-05-14 9:34 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 06/17] ARM: dts: exynos5440: cpus/cpu nodes " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 07/17] ARM: dts: imx: " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-25 5:44 ` Shawn Guo
2013-04-25 5:44 ` Shawn Guo
2013-04-25 8:59 ` Lorenzo Pieralisi
2013-04-25 8:59 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 08/17] ARM: dts: lpc32xx: " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 09/17] ARM: dts: omap: " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 10/17] ARM: dts: picoxcell: " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 11/17] ARM: dts: prima2: cpus/cpu node " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-05-14 9:16 ` Barry Song
2013-05-14 9:16 ` Barry Song
2013-04-24 17:28 ` [RFC PATCH v3 12/17] ARM: dts: pxa2xx: cpus/cpu nodes " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 13/17] ARM: dts: r8a7740: " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-25 0:07 ` Simon Horman
2013-04-25 0:07 ` Simon Horman
2013-04-24 17:28 ` [RFC PATCH v3 14/17] ARM: dts: sh7372: " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-25 0:06 ` Simon Horman
2013-04-25 0:06 ` Simon Horman
2013-04-24 17:28 ` [RFC PATCH v3 15/17] ARM: dts: spear: " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 16/17] ARM: dts: sunxi: " Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
2013-04-24 17:28 ` [RFC PATCH v3 17/17] ARM: DT: kernel: DT cpus/cpu node bindings update Lorenzo Pieralisi
2013-04-24 17:28 ` Lorenzo Pieralisi
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