From: Suravee Suthikulanit <suravee.suthikulpanit@amd.com>
To: Jan Beulich <JBeulich@suse.com>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
Jacob Shin <jacob.shin@amd.com>,
xiantao.zhang@intel.com, xen-devel <xen-devel@lists.xen.org>
Subject: Re: [PATCH 5/6] x86: enable multi-vector MSI
Date: Fri, 26 Apr 2013 16:16:58 -0500 [thread overview]
Message-ID: <517AEECA.7020907@amd.com> (raw)
In-Reply-To: <517645D202000078000CFC3C@nat28.tlf.novell.com>
On 4/23/2013 1:26 AM, Jan Beulich wrote:
>>>> On 23.04.13 at 02:55, Suravee Suthikulanit <suravee.suthikulpanit@amd.com>
> wrote:
>> On 4/19/2013 5:59 AM, Jan Beulich wrote:
>>> --- a/xen/arch/x86/msi.c
>>> +++ b/xen/arch/x86/msi.c
>>> @@ -238,6 +238,11 @@ static int write_msi_msg(struct msi_desc
>>> u8 bus = dev->bus;
>>> u8 slot = PCI_SLOT(dev->devfn);
>>> u8 func = PCI_FUNC(dev->devfn);
>>> + int nr = entry->msi_attrib.entry_nr;
>>> +
>>> + ASSERT((msg->data & (entry[-nr].msi.nvec - 1)) == nr);
>>> + if ( nr )
>>> + return 0;
>> This logic seems incorrect. Do you meant to write --nr?
> No, this indeed has to be -nr (i.e. the "masterkj" entry, which is the
> first on in the array.
>
>> This causes assertion here. Also, investigation showing the
>> value of nr is 0 here.
> nr being 0 here is perfectly fine, meaning this is the first ("master")
> entry of a multi-vector device (it can't be a single-vector one, as in
> that case entry[0].msi.nvec == 1, i.e. the & yields zero regardless
> of msg->data).
>
> And the assertion should hold, due to
>
> *data = (msg->data & ~(INTREMAP_ENTRIES - 1)) | offset;
>
> in update_intremap_entry_from_msi_msg(), and
> alloc_intremap_entry() returning only aligned blocks.
>
> So the question isn't just what value nr there has, but also what
> the other involved values are.
>
> Jan
Ok, thanks for explanation. Do you think you could add comment in the
code?kkk It was not quite clear at the beginning why we need this
assertion.
The problem occurs when the function
"xen/driver/passthrough/amd/iommu_init.c: enable_iommu()" trying to
initialize IOMMU and calling the "set_msi_affinity", which in turn
calling "write_msi_msg". At this point, "nvec" is still zero. So, the
following code should fix it.
unsigned int nvec = entry[-nr].msi.nvec;
if ( nvec > 0 )
ASSERT((msg->data & (nvec - 1)) == nr);
Suravee
next prev parent reply other threads:[~2013-04-26 21:16 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-19 10:50 [PATCH 0/6] x86/IOMMU: multi-vector MSI Jan Beulich
2013-04-19 10:57 ` [PATCH 1/6] AMD IOMMU: allocate IRTE entries instead of using a static mapping Jan Beulich
2013-04-23 13:21 ` Suravee Suthikulanit
2013-04-23 15:06 ` Suravee Suthikulanit
2013-04-24 13:34 ` Jan Beulich
2013-04-24 21:52 ` suravee suthikulpanit
2013-04-26 10:39 ` Jan Beulich
2013-04-26 17:13 ` Suravee Suthikulanit
2013-04-29 7:31 ` Jan Beulich
2013-04-29 7:33 ` Suthikulpanit, Suravee
2013-04-29 7:42 ` Jan Beulich
2013-04-19 10:57 ` [PATCH 2/6] AMD IOMMU: untie remap and vector maps Jan Beulich
2013-04-19 10:58 ` [PATCH 3/6] VT-d: enable for multi‑vector MSI Jan Beulich
2013-04-19 10:59 ` [PATCH 4/6] AMD IOMMU: enable for multi-vector MSI Jan Beulich
2013-04-19 10:59 ` [PATCH 5/6] x86: enable " Jan Beulich
2013-04-23 0:55 ` Suravee Suthikulanit
2013-04-23 6:26 ` Jan Beulich
2013-04-26 21:16 ` Suravee Suthikulanit [this message]
2013-04-19 11:00 ` [PATCH 6/6] pciif: add multi-vector-MSI command Jan Beulich
2013-04-19 14:48 ` [PATCH 0/6] x86/IOMMU: multi-vector MSI Jan Beulich
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