From: "H. Peter Anvin" <hpa@zytor.com>
To: Kees Cook <keescook@chromium.org>
Cc: linux-kernel@vger.kernel.org,
kernel-hardening@lists.openwall.com,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
x86@kernel.org, Jarkko Sakkinen <jarkko.sakkinen@intel.com>,
Matthew Garrett <mjg@redhat.com>,
Matt Fleming <matt.fleming@intel.com>,
Eric Northup <digitaleric@google.com>,
Dan Rosenberg <drosenberg@vsecurity.com>,
Julien Tinnes <jln@google.com>, Will Drewry <wad@chromium.org>
Subject: [kernel-hardening] Re: [PATCH 2/6] x86: kaslr: move CPU flags out of cpucheck
Date: Fri, 26 Apr 2013 15:14:16 -0700 [thread overview]
Message-ID: <517AFC38.5090500@zytor.com> (raw)
In-Reply-To: <517AF5D6.1040800@zytor.com>
On 04/26/2013 02:47 PM, H. Peter Anvin wrote:
> On 04/26/2013 12:03 PM, Kees Cook wrote:
>> +
>> +static inline void cpuid(u32 id, u32 *a, u32 *b, u32 *c, u32 *d)
>> +{
>> + /* Handle x86_32 PIC using ebx. */
>> + asm volatile("movl %%ebx, %%edi \n\t"
>> + "cpuid \n\t"
>> + "xchgl %%edi, %%ebx\n\t"
>> + : "=a" (*a),
>> + "=D" (*b),
>> + "=c" (*c),
>> + "=d" (*d)
>> + : "a" (id)
>> + );
>> +}
>
> Please don't constrain registers unnecessarily.
>
> You can use "=r" there and let gcc assign whatever free register it pleases.
>
> You can also limit that to only:
>
> #if defined(__i386__) && defined(__PIC__)
>
How is this for a "beauty":
#if defined(__i386__) && defined (__PIC__)
# define EBX_REG "=r"
#else
# define EBX_REG "=b"
#endif
asm volatile(".ifnc %%ebx,%3 ; movl %%ebx,%3 ; .endif ; "
"cpuid ; "
".ifnc %%ebx,%3 ; xchgl %%ebx,%3 ; .endif"
: "=a" (*a), "=c" (*c), "=d" (*d),
EBX_REG (*b)
: "a" (leaf), "c" (subleaf));
WARNING: multiple messages have this Message-ID (diff)
From: "H. Peter Anvin" <hpa@zytor.com>
To: Kees Cook <keescook@chromium.org>
Cc: linux-kernel@vger.kernel.org,
kernel-hardening@lists.openwall.com,
Thomas Gleixner <tglx@linutronix.de>,
Ingo Molnar <mingo@redhat.com>,
x86@kernel.org, Jarkko Sakkinen <jarkko.sakkinen@intel.com>,
Matthew Garrett <mjg@redhat.com>,
Matt Fleming <matt.fleming@intel.com>,
Eric Northup <digitaleric@google.com>,
Dan Rosenberg <drosenberg@vsecurity.com>,
Julien Tinnes <jln@google.com>, Will Drewry <wad@chromium.org>
Subject: Re: [PATCH 2/6] x86: kaslr: move CPU flags out of cpucheck
Date: Fri, 26 Apr 2013 15:14:16 -0700 [thread overview]
Message-ID: <517AFC38.5090500@zytor.com> (raw)
In-Reply-To: <517AF5D6.1040800@zytor.com>
On 04/26/2013 02:47 PM, H. Peter Anvin wrote:
> On 04/26/2013 12:03 PM, Kees Cook wrote:
>> +
>> +static inline void cpuid(u32 id, u32 *a, u32 *b, u32 *c, u32 *d)
>> +{
>> + /* Handle x86_32 PIC using ebx. */
>> + asm volatile("movl %%ebx, %%edi \n\t"
>> + "cpuid \n\t"
>> + "xchgl %%edi, %%ebx\n\t"
>> + : "=a" (*a),
>> + "=D" (*b),
>> + "=c" (*c),
>> + "=d" (*d)
>> + : "a" (id)
>> + );
>> +}
>
> Please don't constrain registers unnecessarily.
>
> You can use "=r" there and let gcc assign whatever free register it pleases.
>
> You can also limit that to only:
>
> #if defined(__i386__) && defined(__PIC__)
>
How is this for a "beauty":
#if defined(__i386__) && defined (__PIC__)
# define EBX_REG "=r"
#else
# define EBX_REG "=b"
#endif
asm volatile(".ifnc %%ebx,%3 ; movl %%ebx,%3 ; .endif ; "
"cpuid ; "
".ifnc %%ebx,%3 ; xchgl %%ebx,%3 ; .endif"
: "=a" (*a), "=c" (*c), "=d" (*d),
EBX_REG (*b)
: "a" (leaf), "c" (subleaf));
next prev parent reply other threads:[~2013-04-26 22:14 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-04-26 19:03 [kernel-hardening] [PATCH v4 0/6] kernel ASLR Kees Cook
2013-04-26 19:03 ` Kees Cook
2013-04-26 19:03 ` [kernel-hardening] [PATCH 1/6] x86: kaslr: move ELF relocation handling to C Kees Cook
2013-04-26 19:03 ` Kees Cook
2013-04-26 19:03 ` [kernel-hardening] [PATCH 2/6] x86: kaslr: move CPU flags out of cpucheck Kees Cook
2013-04-26 19:03 ` Kees Cook
2013-04-26 21:47 ` [kernel-hardening] " H. Peter Anvin
2013-04-26 21:47 ` H. Peter Anvin
2013-04-26 22:14 ` H. Peter Anvin [this message]
2013-04-26 22:14 ` H. Peter Anvin
2013-04-29 17:49 ` [kernel-hardening] " Kees Cook
2013-04-29 17:49 ` Kees Cook
2013-04-29 17:52 ` [kernel-hardening] " Kees Cook
2013-04-29 17:52 ` Kees Cook
2013-04-26 19:03 ` [kernel-hardening] [PATCH 3/6] x86: kaslr: return location from decompress_kernel Kees Cook
2013-04-26 19:03 ` Kees Cook
2013-04-26 21:47 ` [kernel-hardening] " H. Peter Anvin
2013-04-26 21:47 ` H. Peter Anvin
2013-04-29 1:25 ` [kernel-hardening] " James Morris
2013-04-29 17:43 ` Kees Cook
2013-04-26 19:03 ` [kernel-hardening] [PATCH 4/6] x86: kaslr: select random base offset Kees Cook
2013-04-26 19:03 ` Kees Cook
2013-04-26 21:50 ` [kernel-hardening] " H. Peter Anvin
2013-04-26 21:50 ` H. Peter Anvin
2013-04-29 19:15 ` [kernel-hardening] " Kees Cook
2013-04-29 19:15 ` Kees Cook
2013-04-26 19:03 ` [kernel-hardening] [PATCH 5/6] x86: kaslr: select memory region from e820 maps Kees Cook
2013-04-26 19:03 ` Kees Cook
2013-04-26 21:51 ` [kernel-hardening] " Yinghai Lu
2013-04-26 21:51 ` Yinghai Lu
2013-04-26 22:01 ` [kernel-hardening] " H. Peter Anvin
2013-04-26 22:01 ` H. Peter Anvin
2013-04-26 22:01 ` [kernel-hardening] " Kees Cook
2013-04-26 22:01 ` Kees Cook
2013-04-26 19:03 ` [kernel-hardening] [PATCH 6/6] x86: kaslr: report kernel offset on panic Kees Cook
2013-04-26 19:03 ` Kees Cook
2013-04-26 22:13 ` [kernel-hardening] " Borislav Petkov
2013-04-26 22:13 ` Borislav Petkov
2013-04-26 22:15 ` [kernel-hardening] " H. Peter Anvin
2013-04-26 22:15 ` H. Peter Anvin
2013-04-26 22:19 ` [kernel-hardening] " Borislav Petkov
2013-04-26 22:19 ` Borislav Petkov
-- strict thread matches above, loose matches on Subject: below --
2013-04-25 21:54 [kernel-hardening] [PATCH v3 0/6] kernel ASLR Kees Cook
2013-04-25 21:54 ` [kernel-hardening] [PATCH 2/6] x86: kaslr: move CPU flags out of cpucheck Kees Cook
2013-04-25 22:00 ` [kernel-hardening] " H. Peter Anvin
2013-04-26 15:28 ` Kees Cook
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