* [PATCH v3 3/3] sh-pfc: r8a7779: add Ether pin groups
@ 2013-04-26 22:48 Sergei Shtylyov
2013-04-27 0:45 ` Laurent Pinchart
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Sergei Shtylyov @ 2013-04-26 22:48 UTC (permalink / raw)
To: linux-sh
Add Ether RMII/LINK/MAGIC pin groups to R8A7779 PFC driver.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
Changes from the original posting:
- moved all pin groups to stay in the alphabetical order with the others.
drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 42 +++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
Index: renesas/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
=================================--- renesas.orig/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
+++ renesas/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
@@ -1640,6 +1640,38 @@ static const unsigned int du1_cde_pins[]
static const unsigned int du1_cde_mux[] = {
DU1_CDE_MARK
};
+/* - Ether ------------------------------------------------------------------ */
+static const unsigned int ether_rmii_pins[] = {
+ /*
+ * ETH_TXD0, ETH_TXD1, ETH_TX_EN, ETH_REFCLK,
+ * ETH_RXD0, ETH_RXD1, ETH_CRS_DV, ETH_RX_ER,
+ * ETH_MDIO, ETH_MDC
+ */
+ RCAR_GP_PIN(2, 27), RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 18),
+ RCAR_GP_PIN(2, 26),
+ RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 17),
+ RCAR_GP_PIN(2, 19),
+ RCAR_GP_PIN(2, 29), RCAR_GP_PIN(2, 28),
+};
+static const unsigned int ether_rmii_mux[] = {
+ ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REFCLK_MARK,
+ ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_CRS_DV_MARK, ETH_RX_ER_MARK,
+ ETH_MDIO_MARK, ETH_MDC_MARK,
+};
+static const unsigned int ether_link_pins[] = {
+ /* ETH_LINK */
+ RCAR_GP_PIN(2, 24),
+};
+static const unsigned int ether_link_mux[] = {
+ ETH_LINK_MARK,
+};
+static const unsigned int ether_magic_pins[] = {
+ /* ETH_MAGIC */
+ RCAR_GP_PIN(2, 25),
+};
+static const unsigned int ether_magic_mux[] = {
+ ETH_MAGIC_MARK,
+};
/* - HSPI0 ------------------------------------------------------------------ */
static const unsigned int hspi0_pins[] = {
/* CLK, CS, RX, TX */
@@ -2537,6 +2569,9 @@ static const struct sh_pfc_pin_group pin
SH_PFC_PIN_GROUP(du1_sync_1),
SH_PFC_PIN_GROUP(du1_oddf),
SH_PFC_PIN_GROUP(du1_cde),
+ SH_PFC_PIN_GROUP(ether_rmii),
+ SH_PFC_PIN_GROUP(ether_link),
+ SH_PFC_PIN_GROUP(ether_magic),
SH_PFC_PIN_GROUP(hspi0),
SH_PFC_PIN_GROUP(hspi1),
SH_PFC_PIN_GROUP(hspi1_b),
@@ -2679,6 +2714,12 @@ static const char * const du1_groups[] "du1_cde",
};
+static const char * const ether_groups[] = {
+ "ether_rmii",
+ "ether_link",
+ "ether_magic",
+};
+
static const char * const hspi0_groups[] = {
"hspi0",
};
@@ -2871,6 +2912,7 @@ static const char * const vin3_groups[]
static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(du0),
SH_PFC_FUNCTION(du1),
+ SH_PFC_FUNCTION(ether),
SH_PFC_FUNCTION(hspi0),
SH_PFC_FUNCTION(hspi1),
SH_PFC_FUNCTION(hspi2),
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3 3/3] sh-pfc: r8a7779: add Ether pin groups
2013-04-26 22:48 [PATCH v3 3/3] sh-pfc: r8a7779: add Ether pin groups Sergei Shtylyov
@ 2013-04-27 0:45 ` Laurent Pinchart
2013-04-27 14:33 ` Sergei Shtylyov
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Laurent Pinchart @ 2013-04-27 0:45 UTC (permalink / raw)
To: linux-sh
Hi Sergei,
Thank you for the patch.
On Saturday 27 April 2013 02:48:22 Sergei Shtylyov wrote:
> Add Ether RMII/LINK/MAGIC pin groups to R8A7779 PFC driver.
>
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>
> ---
> Changes from the original posting:
> - moved all pin groups to stay in the alphabetical order with the others.
>
> drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 42 +++++++++++++++++++++++++++++++
> 1 file changed, 42 insertions(+)
>
> Index: renesas/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
> =================================> --- renesas.orig/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
> +++ renesas/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
> @@ -1640,6 +1640,38 @@ static const unsigned int du1_cde_pins[]
> static const unsigned int du1_cde_mux[] = {
> DU1_CDE_MARK
> };
> +/* - Ether
> ------------------------------------------------------------------ */
> +static const unsigned int ether_rmii_pins[] = {
> + /*
> + * ETH_TXD0, ETH_TXD1, ETH_TX_EN, ETH_REFCLK,
> + * ETH_RXD0, ETH_RXD1, ETH_CRS_DV, ETH_RX_ER,
> + * ETH_MDIO, ETH_MDC
> + */
> + RCAR_GP_PIN(2, 27), RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 18),
> + RCAR_GP_PIN(2, 26),
> + RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 17),
> + RCAR_GP_PIN(2, 19),
> + RCAR_GP_PIN(2, 29), RCAR_GP_PIN(2, 28),
> +};
> +static const unsigned int ether_rmii_mux[] = {
> + ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REFCLK_MARK,
> + ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_CRS_DV_MARK, ETH_RX_ER_MARK,
> + ETH_MDIO_MARK, ETH_MDC_MARK,
> +};
> +static const unsigned int ether_link_pins[] = {
> + /* ETH_LINK */
> + RCAR_GP_PIN(2, 24),
> +};
> +static const unsigned int ether_link_mux[] = {
> + ETH_LINK_MARK,
> +};
> +static const unsigned int ether_magic_pins[] = {
> + /* ETH_MAGIC */
> + RCAR_GP_PIN(2, 25),
> +};
> +static const unsigned int ether_magic_mux[] = {
> + ETH_MAGIC_MARK,
> +};
I wonder whether we should rename MAGIC to WOL (Wake On LAN), but that's out
of scope for this patch.
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
> /* - HSPI0
> ------------------------------------------------------------------ */
> static const unsigned int hspi0_pins[] = {
> /* CLK, CS, RX, TX */
> @@ -2537,6 +2569,9 @@ static const struct sh_pfc_pin_group pin
> SH_PFC_PIN_GROUP(du1_sync_1),
> SH_PFC_PIN_GROUP(du1_oddf),
> SH_PFC_PIN_GROUP(du1_cde),
> + SH_PFC_PIN_GROUP(ether_rmii),
> + SH_PFC_PIN_GROUP(ether_link),
> + SH_PFC_PIN_GROUP(ether_magic),
> SH_PFC_PIN_GROUP(hspi0),
> SH_PFC_PIN_GROUP(hspi1),
> SH_PFC_PIN_GROUP(hspi1_b),
> @@ -2679,6 +2714,12 @@ static const char * const du1_groups[] > "du1_cde",
> };
>
> +static const char * const ether_groups[] = {
> + "ether_rmii",
> + "ether_link",
> + "ether_magic",
> +};
> +
> static const char * const hspi0_groups[] = {
> "hspi0",
> };
> @@ -2871,6 +2912,7 @@ static const char * const vin3_groups[]
> static const struct sh_pfc_function pinmux_functions[] = {
> SH_PFC_FUNCTION(du0),
> SH_PFC_FUNCTION(du1),
> + SH_PFC_FUNCTION(ether),
> SH_PFC_FUNCTION(hspi0),
> SH_PFC_FUNCTION(hspi1),
> SH_PFC_FUNCTION(hspi2),
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3 3/3] sh-pfc: r8a7779: add Ether pin groups
2013-04-26 22:48 [PATCH v3 3/3] sh-pfc: r8a7779: add Ether pin groups Sergei Shtylyov
2013-04-27 0:45 ` Laurent Pinchart
@ 2013-04-27 14:33 ` Sergei Shtylyov
2013-04-28 16:57 ` Sergei Shtylyov
2013-04-28 20:47 ` Laurent Pinchart
3 siblings, 0 replies; 5+ messages in thread
From: Sergei Shtylyov @ 2013-04-27 14:33 UTC (permalink / raw)
To: linux-sh
Hello.
On 27-04-2013 4:45, Laurent Pinchart wrote:
> Thank you for the patch.
Not at all. :-)
>> Add Ether RMII/LINK/MAGIC pin groups to R8A7779 PFC driver.
>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>> ---
>> Changes from the original posting:
>> - moved all pin groups to stay in the alphabetical order with the others.
>> drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 42 +++++++++++++++++++++++++++++++
>> 1 file changed, 42 insertions(+)
>> Index: renesas/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
>> =================================>> --- renesas.orig/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
>> +++ renesas/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
>> @@ -1640,6 +1640,38 @@ static const unsigned int du1_cde_pins[]
>> static const unsigned int du1_cde_mux[] = {
>> DU1_CDE_MARK
>> };
>> +/* - Ether
>> ------------------------------------------------------------------ */
>> +static const unsigned int ether_rmii_pins[] = {
>> + /*
>> + * ETH_TXD0, ETH_TXD1, ETH_TX_EN, ETH_REFCLK,
>> + * ETH_RXD0, ETH_RXD1, ETH_CRS_DV, ETH_RX_ER,
>> + * ETH_MDIO, ETH_MDC
>> + */
>> + RCAR_GP_PIN(2, 27), RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 18),
>> + RCAR_GP_PIN(2, 26),
>> + RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 17),
>> + RCAR_GP_PIN(2, 19),
>> + RCAR_GP_PIN(2, 29), RCAR_GP_PIN(2, 28),
>> +};
>> +static const unsigned int ether_rmii_mux[] = {
>> + ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REFCLK_MARK,
>> + ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_CRS_DV_MARK, ETH_RX_ER_MARK,
>> + ETH_MDIO_MARK, ETH_MDC_MARK,
>> +};
>> +static const unsigned int ether_link_pins[] = {
>> + /* ETH_LINK */
>> + RCAR_GP_PIN(2, 24),
>> +};
>> +static const unsigned int ether_link_mux[] = {
>> + ETH_LINK_MARK,
>> +};
>> +static const unsigned int ether_magic_pins[] = {
>> + /* ETH_MAGIC */
>> + RCAR_GP_PIN(2, 25),
>> +};
>> +static const unsigned int ether_magic_mux[] = {
>> + ETH_MAGIC_MARK,
>> +};
> I wonder whether we should rename MAGIC to WOL (Wake On LAN), but that's out
> of scope for this patch.
I don't think it's a good idea to remove the SoC's signals at will.
> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Thank you.
WBR, Sergei
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3 3/3] sh-pfc: r8a7779: add Ether pin groups
2013-04-26 22:48 [PATCH v3 3/3] sh-pfc: r8a7779: add Ether pin groups Sergei Shtylyov
2013-04-27 0:45 ` Laurent Pinchart
2013-04-27 14:33 ` Sergei Shtylyov
@ 2013-04-28 16:57 ` Sergei Shtylyov
2013-04-28 20:47 ` Laurent Pinchart
3 siblings, 0 replies; 5+ messages in thread
From: Sergei Shtylyov @ 2013-04-28 16:57 UTC (permalink / raw)
To: linux-sh
Hello.
On 27-04-2013 18:33, Sergei Shtylyov wrote:
>>> Add Ether RMII/LINK/MAGIC pin groups to R8A7779 PFC driver.
>>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>>> ---
>>> Changes from the original posting:
>>> - moved all pin groups to stay in the alphabetical order with the others.
>>> drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 42 +++++++++++++++++++++++++++++++
>>> 1 file changed, 42 insertions(+)
>>> Index: renesas/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
>>> =================================>>> --- renesas.orig/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
>>> +++ renesas/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
>>> @@ -1640,6 +1640,38 @@ static const unsigned int du1_cde_pins[]
>>> static const unsigned int du1_cde_mux[] = {
>>> DU1_CDE_MARK
>>> };
>>> +/* - Ether
>>> ------------------------------------------------------------------ */
>>> +static const unsigned int ether_rmii_pins[] = {
>>> + /*
>>> + * ETH_TXD0, ETH_TXD1, ETH_TX_EN, ETH_REFCLK,
>>> + * ETH_RXD0, ETH_RXD1, ETH_CRS_DV, ETH_RX_ER,
>>> + * ETH_MDIO, ETH_MDC
>>> + */
>>> + RCAR_GP_PIN(2, 27), RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 18),
>>> + RCAR_GP_PIN(2, 26),
>>> + RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 17),
>>> + RCAR_GP_PIN(2, 19),
>>> + RCAR_GP_PIN(2, 29), RCAR_GP_PIN(2, 28),
>>> +};
>>> +static const unsigned int ether_rmii_mux[] = {
>>> + ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REFCLK_MARK,
>>> + ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_CRS_DV_MARK, ETH_RX_ER_MARK,
>>> + ETH_MDIO_MARK, ETH_MDC_MARK,
>>> +};
>>> +static const unsigned int ether_link_pins[] = {
>>> + /* ETH_LINK */
>>> + RCAR_GP_PIN(2, 24),
>>> +};
>>> +static const unsigned int ether_link_mux[] = {
>>> + ETH_LINK_MARK,
>>> +};
>>> +static const unsigned int ether_magic_pins[] = {
>>> + /* ETH_MAGIC */
>>> + RCAR_GP_PIN(2, 25),
>>> +};
>>> +static const unsigned int ether_magic_mux[] = {
>>> + ETH_MAGIC_MARK,
>>> +};
>> I wonder whether we should rename MAGIC to WOL (Wake On LAN), but that's out
>> of scope for this patch.
> I don't think it's a good idea to remove the SoC's signals at will.
s/remove/rename/, of course. Would make it harder to find them back in the
manuals, for example.
WBR, Sergei
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [PATCH v3 3/3] sh-pfc: r8a7779: add Ether pin groups
2013-04-26 22:48 [PATCH v3 3/3] sh-pfc: r8a7779: add Ether pin groups Sergei Shtylyov
` (2 preceding siblings ...)
2013-04-28 16:57 ` Sergei Shtylyov
@ 2013-04-28 20:47 ` Laurent Pinchart
3 siblings, 0 replies; 5+ messages in thread
From: Laurent Pinchart @ 2013-04-28 20:47 UTC (permalink / raw)
To: linux-sh
Hi Sergei,
On Sunday 28 April 2013 20:57:35 Sergei Shtylyov wrote:
> On 27-04-2013 18:33, Sergei Shtylyov wrote:
> >>> Add Ether RMII/LINK/MAGIC pin groups to R8A7779 PFC driver.
> >>>
> >>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
> >>>
> >>> ---
> >>> Changes from the original posting:
> >>> - moved all pin groups to stay in the alphabetical order with the
> >>> others.
> >>>
> >>> drivers/pinctrl/sh-pfc/pfc-r8a7779.c | 42 ++++++++++++++++++++++++++
> >>> 1 file changed, 42 insertions(+)
> >>>
> >>> Index: renesas/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
> >>> =================================> >>> --- renesas.orig/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
> >>> +++ renesas/drivers/pinctrl/sh-pfc/pfc-r8a7779.c
> >>> @@ -1640,6 +1640,38 @@ static const unsigned int du1_cde_pins[]
> >>> static const unsigned int du1_cde_mux[] = {
> >>> DU1_CDE_MARK
> >>> };
> >>>
> >>> +/* - Ether
> >>> ------------------------------------------------------------------ */
> >>> +static const unsigned int ether_rmii_pins[] = {
> >>> + /*
> >>> + * ETH_TXD0, ETH_TXD1, ETH_TX_EN, ETH_REFCLK,
> >>> + * ETH_RXD0, ETH_RXD1, ETH_CRS_DV, ETH_RX_ER,
> >>> + * ETH_MDIO, ETH_MDC
> >>> + */
> >>> + RCAR_GP_PIN(2, 27), RCAR_GP_PIN(2, 16), RCAR_GP_PIN(2, 18),
> >>> + RCAR_GP_PIN(2, 26),
> >>> + RCAR_GP_PIN(2, 20), RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 17),
> >>> + RCAR_GP_PIN(2, 19),
> >>> + RCAR_GP_PIN(2, 29), RCAR_GP_PIN(2, 28),
> >>> +};
> >>> +static const unsigned int ether_rmii_mux[] = {
> >>> + ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REFCLK_MARK,
> >>> + ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_CRS_DV_MARK, ETH_RX_ER_MARK,
> >>> + ETH_MDIO_MARK, ETH_MDC_MARK,
> >>> +};
> >>> +static const unsigned int ether_link_pins[] = {
> >>> + /* ETH_LINK */
> >>> + RCAR_GP_PIN(2, 24),
> >>> +};
> >>> +static const unsigned int ether_link_mux[] = {
> >>> + ETH_LINK_MARK,
> >>> +};
> >>> +static const unsigned int ether_magic_pins[] = {
> >>> + /* ETH_MAGIC */
> >>> + RCAR_GP_PIN(2, 25),
> >>> +};
> >>> +static const unsigned int ether_magic_mux[] = {
> >>> + ETH_MAGIC_MARK,
> >>> +};
> >>
> >> I wonder whether we should rename MAGIC to WOL (Wake On LAN), but that's
> >> out of scope for this patch.
> >>
> > I don't think it's a good idea to remove the SoC's signals at will.
>
> s/remove/rename/, of course. Would make it harder to find them back in
> the manuals, for example.
Agreed. We should fix the manuals then :-D
--
Regards,
Laurent Pinchart
^ permalink raw reply [flat|nested] 5+ messages in thread
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2013-04-26 22:48 [PATCH v3 3/3] sh-pfc: r8a7779: add Ether pin groups Sergei Shtylyov
2013-04-27 0:45 ` Laurent Pinchart
2013-04-27 14:33 ` Sergei Shtylyov
2013-04-28 16:57 ` Sergei Shtylyov
2013-04-28 20:47 ` Laurent Pinchart
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