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From: Christopher Covington <cov@codeaurora.org>
To: Steve Capper <steve.capper@linaro.org>
Cc: linux-mm@kvack.org, x86@kernel.org, linux-arch@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, patches@linaro.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>, Michal Hocko <mhocko@suse.cz>,
	Ken Chen <kenchen@google.com>, Mel Gorman <mgorman@suse.de>
Subject: Re: [RFC PATCH v2 08/11] ARM64: mm: Swap PTE_FILE and PTE_PROT_NONE bits.
Date: Wed, 08 May 2013 12:17:35 -0400	[thread overview]
Message-ID: <518A7A9F.9080105@codeaurora.org> (raw)
In-Reply-To: <1368006763-30774-9-git-send-email-steve.capper@linaro.org>

Hi Steve,

On 05/08/2013 05:52 AM, Steve Capper wrote:
> Under ARM64, PTEs can be broadly categorised as follows:
>    - Present and valid: Bit #0 is set. The PTE is valid and memory
>      access to the region may fault.
> 
>    - Present and invalid: Bit #0 is clear and bit #1 is set.
>      Represents present memory with PROT_NONE protection. The PTE
>      is an invalid entry, and the user fault handler will raise a
>      SIGSEGV.
> 
>    - Not present (file): Bits #0 and #1 are clear, bit #2 is set.
>      Memory represented has been paged out. The PTE is an invalid
>      entry, and the fault handler will try and re-populate the
>      memory where necessary.
> 
> Huge PTEs are block descriptors that have bit #1 clear. If we wish
> to represent PROT_NONE huge PTEs we then run into a problem as
> there is no way to distinguish between regular and huge PTEs if we
> set bit #1.
> 
> As huge PTEs are always present, the meaning of bits #1 and #2 can
> be swapped for invalid PTEs. This patch swaps the PTE_FILE and
> PTE_PROT_NONE constants, allowing us to represent PROT_NONE huge
> PTEs.

[...]

> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h

[...]

> @@ -306,8 +306,8 @@ extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
>  
>  /*
>   * Encode and decode a file entry:
> - *	bits 0-1:	present (must be zero)
> - *	bit  2:		PTE_FILE
> + *	bits 0 & 2:	present (must be zero)

Consider using punctuation like "bits 0, 2" here to disambiguate from the
binary and operation.

[...]

Christopher

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux Foundation.

WARNING: multiple messages have this Message-ID (diff)
From: cov@codeaurora.org (Christopher Covington)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH v2 08/11] ARM64: mm: Swap PTE_FILE and PTE_PROT_NONE bits.
Date: Wed, 08 May 2013 12:17:35 -0400	[thread overview]
Message-ID: <518A7A9F.9080105@codeaurora.org> (raw)
In-Reply-To: <1368006763-30774-9-git-send-email-steve.capper@linaro.org>

Hi Steve,

On 05/08/2013 05:52 AM, Steve Capper wrote:
> Under ARM64, PTEs can be broadly categorised as follows:
>    - Present and valid: Bit #0 is set. The PTE is valid and memory
>      access to the region may fault.
> 
>    - Present and invalid: Bit #0 is clear and bit #1 is set.
>      Represents present memory with PROT_NONE protection. The PTE
>      is an invalid entry, and the user fault handler will raise a
>      SIGSEGV.
> 
>    - Not present (file): Bits #0 and #1 are clear, bit #2 is set.
>      Memory represented has been paged out. The PTE is an invalid
>      entry, and the fault handler will try and re-populate the
>      memory where necessary.
> 
> Huge PTEs are block descriptors that have bit #1 clear. If we wish
> to represent PROT_NONE huge PTEs we then run into a problem as
> there is no way to distinguish between regular and huge PTEs if we
> set bit #1.
> 
> As huge PTEs are always present, the meaning of bits #1 and #2 can
> be swapped for invalid PTEs. This patch swaps the PTE_FILE and
> PTE_PROT_NONE constants, allowing us to represent PROT_NONE huge
> PTEs.

[...]

> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h

[...]

> @@ -306,8 +306,8 @@ extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
>  
>  /*
>   * Encode and decode a file entry:
> - *	bits 0-1:	present (must be zero)
> - *	bit  2:		PTE_FILE
> + *	bits 0 & 2:	present (must be zero)

Consider using punctuation like "bits 0, 2" here to disambiguate from the
binary and operation.

[...]

Christopher

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux Foundation.

WARNING: multiple messages have this Message-ID (diff)
From: Christopher Covington <cov@codeaurora.org>
To: Steve Capper <steve.capper@linaro.org>
Cc: linux-mm@kvack.org, x86@kernel.org, linux-arch@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, patches@linaro.org,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will.deacon@arm.com>, Michal Hocko <mhocko@suse.cz>,
	Ken Chen <kenchen@google.com>, Mel Gorman <mgorman@suse.de>
Subject: Re: [RFC PATCH v2 08/11] ARM64: mm: Swap PTE_FILE and PTE_PROT_NONE bits.
Date: Wed, 08 May 2013 12:17:35 -0400	[thread overview]
Message-ID: <518A7A9F.9080105@codeaurora.org> (raw)
In-Reply-To: <1368006763-30774-9-git-send-email-steve.capper@linaro.org>

Hi Steve,

On 05/08/2013 05:52 AM, Steve Capper wrote:
> Under ARM64, PTEs can be broadly categorised as follows:
>    - Present and valid: Bit #0 is set. The PTE is valid and memory
>      access to the region may fault.
> 
>    - Present and invalid: Bit #0 is clear and bit #1 is set.
>      Represents present memory with PROT_NONE protection. The PTE
>      is an invalid entry, and the user fault handler will raise a
>      SIGSEGV.
> 
>    - Not present (file): Bits #0 and #1 are clear, bit #2 is set.
>      Memory represented has been paged out. The PTE is an invalid
>      entry, and the fault handler will try and re-populate the
>      memory where necessary.
> 
> Huge PTEs are block descriptors that have bit #1 clear. If we wish
> to represent PROT_NONE huge PTEs we then run into a problem as
> there is no way to distinguish between regular and huge PTEs if we
> set bit #1.
> 
> As huge PTEs are always present, the meaning of bits #1 and #2 can
> be swapped for invalid PTEs. This patch swaps the PTE_FILE and
> PTE_PROT_NONE constants, allowing us to represent PROT_NONE huge
> PTEs.

[...]

> diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h

[...]

> @@ -306,8 +306,8 @@ extern pgd_t idmap_pg_dir[PTRS_PER_PGD];
>  
>  /*
>   * Encode and decode a file entry:
> - *	bits 0-1:	present (must be zero)
> - *	bit  2:		PTE_FILE
> + *	bits 0 & 2:	present (must be zero)

Consider using punctuation like "bits 0, 2" here to disambiguate from the
binary and operation.

[...]

Christopher

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
hosted by the Linux Foundation.

--
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  reply	other threads:[~2013-05-08 16:17 UTC|newest]

Thread overview: 78+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-08  9:52 [RFC PATCH v2 00/11] HugeTLB and THP support for ARM64 Steve Capper
2013-05-08  9:52 ` Steve Capper
2013-05-08  9:52 ` Steve Capper
2013-05-08  9:52 ` [RFC PATCH v2 01/11] mm: hugetlb: Copy huge_pmd_share from x86 to mm Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52 ` [RFC PATCH v2 02/11] x86: mm: Remove x86 version of huge_pmd_share Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52 ` [RFC PATCH v2 03/11] mm: hugetlb: Copy general hugetlb code from x86 to mm Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52 ` [RFC PATCH v2 04/11] x86: mm: Remove general hugetlb code from x86 Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52 ` [RFC PATCH v2 05/11] mm: thp: Correct the HPAGE_PMD_ORDER check Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08 12:44   ` Kirill A. Shutemov
2013-05-08 12:44     ` Kirill A. Shutemov
2013-05-08 12:44     ` Kirill A. Shutemov
2013-05-08 12:03     ` Steve Capper
2013-05-08 12:03       ` Steve Capper
2013-05-08 12:03       ` Steve Capper
2013-05-08  9:52 ` [RFC PATCH v2 06/11] ARM64: mm: Restore memblock limit when map_mem finished Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-16 13:52   ` Catalin Marinas
2013-05-16 13:52     ` Catalin Marinas
2013-05-16 13:52     ` Catalin Marinas
2013-05-08  9:52 ` [RFC PATCH v2 07/11] ARM64: mm: Make PAGE_NONE pages read only and no-execute Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08 16:43   ` Will Deacon
2013-05-08 16:43     ` Will Deacon
2013-05-08 16:43     ` Will Deacon
2013-05-09  8:27     ` Steve Capper
2013-05-09  8:27       ` Steve Capper
2013-05-09  8:27       ` Steve Capper
2013-05-08  9:52 ` [RFC PATCH v2 08/11] ARM64: mm: Swap PTE_FILE and PTE_PROT_NONE bits Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08 16:17   ` Christopher Covington [this message]
2013-05-08 16:17     ` Christopher Covington
2013-05-08 16:17     ` Christopher Covington
2013-05-09  8:15     ` Steve Capper
2013-05-09  8:15       ` Steve Capper
2013-05-09  8:15       ` Steve Capper
2013-05-08 16:40   ` Will Deacon
2013-05-08 16:40     ` Will Deacon
2013-05-08 16:40     ` Will Deacon
2013-05-09  8:22     ` Steve Capper
2013-05-09  8:22       ` Steve Capper
2013-05-09  8:22       ` Steve Capper
2013-05-16 14:58   ` Catalin Marinas
2013-05-16 14:58     ` Catalin Marinas
2013-05-16 14:58     ` Catalin Marinas
2013-05-08  9:52 ` [RFC PATCH v2 09/11] ARM64: mm: HugeTLB support Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-16 14:32   ` Catalin Marinas
2013-05-16 14:32     ` Catalin Marinas
2013-05-16 14:32     ` Catalin Marinas
2013-05-17  8:41     ` Steve Capper
2013-05-17  8:41       ` Steve Capper
2013-05-17  8:41       ` Steve Capper
2013-05-08  9:52 ` [RFC PATCH v2 10/11] ARM64: mm: Raise MAX_ORDER for 64KB pages and THP Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-16 14:59   ` Catalin Marinas
2013-05-16 14:59     ` Catalin Marinas
2013-05-16 14:59     ` Catalin Marinas
2013-05-08  9:52 ` [RFC PATCH v2 11/11] ARM64: mm: THP support Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-08  9:52   ` Steve Capper
2013-05-16 15:01   ` Catalin Marinas
2013-05-16 15:01     ` Catalin Marinas
2013-05-16 15:01     ` Catalin Marinas

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