From: Stephen Warren <swarren@nvidia.com>
To: Christian Daudt <csd@broadcom.com>
Cc: Grant Likely <grant.likely@secretlab.ca>,
Rob Herring <rob.herring@calxeda.com>,
Rob Landley <rob@landley.net>,
Russell King <linux@arm.linux.org.uk>,
Chris Ball <cjb@laptop.org>, Olof Johansson <olof@lixom.net>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Wei WANG <wei_wang@realsil.com.cn>,
Ludovic Desroches <ludovic.desroches@atmel.com>,
Arnd Bergmann <arnd@arndb.de>,
"Mike A. Chan" <mikechan@google.com>,
devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, linux-mmc@vger.kernel.org,
csd_b@daudt.org
Subject: Re: [PATCH] ARM: mmc: bcm281xx SDHCI driver
Date: Fri, 10 May 2013 22:28:22 -0600 [thread overview]
Message-ID: <518DC8E6.5000606@nvidia.com> (raw)
In-Reply-To: <1368078942-31265-1-git-send-email-csd@broadcom.com>
On 05/08/2013 11:55 PM, Christian Daudt wrote:
> Add SDHCI driver for the Broadcom 281xx SoCs. Also
> add bindings for it into bcm281xx dts files.
> Still missing:
> - power managemement
> diff --git a/drivers/mmc/host/sdhci-bcm-kona.c b/drivers/mmc/host/sdhci-bcm-kona.c
> + /*
> + * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
> + * Back-to-Back writes to same register needs delay when SD bus clock
> + * is very low w.r.t AHB clock, mainly during boot-time and during card
> + * insert-removal.
> + */
> + udelay(1000);
> + sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
This sounds very similar to the workaround in
drivers/mmc/host/sdhci-bcm2835.c. Is this the same IP block supported by
that driver? Perhaps not, since bcm2835 apparently needs other WARs such
as always using 32-bit IO and hence needing custom read/write w/b
functions to do read-modify-write which isn't here?
WARNING: multiple messages have this Message-ID (diff)
From: swarren@nvidia.com (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: mmc: bcm281xx SDHCI driver
Date: Fri, 10 May 2013 22:28:22 -0600 [thread overview]
Message-ID: <518DC8E6.5000606@nvidia.com> (raw)
In-Reply-To: <1368078942-31265-1-git-send-email-csd@broadcom.com>
On 05/08/2013 11:55 PM, Christian Daudt wrote:
> Add SDHCI driver for the Broadcom 281xx SoCs. Also
> add bindings for it into bcm281xx dts files.
> Still missing:
> - power managemement
> diff --git a/drivers/mmc/host/sdhci-bcm-kona.c b/drivers/mmc/host/sdhci-bcm-kona.c
> + /*
> + * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
> + * Back-to-Back writes to same register needs delay when SD bus clock
> + * is very low w.r.t AHB clock, mainly during boot-time and during card
> + * insert-removal.
> + */
> + udelay(1000);
> + sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
This sounds very similar to the workaround in
drivers/mmc/host/sdhci-bcm2835.c. Is this the same IP block supported by
that driver? Perhaps not, since bcm2835 apparently needs other WARs such
as always using 32-bit IO and hence needing custom read/write w/b
functions to do read-modify-write which isn't here?
next prev parent reply other threads:[~2013-05-11 4:28 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-05-09 5:55 [PATCH] ARM: mmc: bcm281xx SDHCI driver Christian Daudt
2013-05-09 5:55 ` Christian Daudt
2013-05-09 6:35 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-09 6:35 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-09 6:35 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-10 7:23 ` Christian Daudt
2013-05-10 7:23 ` Christian Daudt
2013-05-10 7:29 ` Christian Daudt
2013-05-10 7:29 ` Christian Daudt
2013-05-10 10:26 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-10 10:26 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-10 14:37 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-10 14:37 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-10 14:37 ` Jean-Christophe PLAGNIOL-VILLARD
2013-05-10 7:45 ` Christian Daudt
2013-05-10 7:45 ` Christian Daudt
2013-05-11 4:28 ` Stephen Warren [this message]
2013-05-11 4:28 ` Stephen Warren
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=518DC8E6.5000606@nvidia.com \
--to=swarren@nvidia.com \
--cc=arnd@arndb.de \
--cc=cjb@laptop.org \
--cc=csd@broadcom.com \
--cc=csd_b@daudt.org \
--cc=devicetree-discuss@lists.ozlabs.org \
--cc=grant.likely@secretlab.ca \
--cc=gregkh@linuxfoundation.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-doc@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mmc@vger.kernel.org \
--cc=linux@arm.linux.org.uk \
--cc=ludovic.desroches@atmel.com \
--cc=mikechan@google.com \
--cc=olof@lixom.net \
--cc=rob.herring@calxeda.com \
--cc=rob@landley.net \
--cc=wei_wang@realsil.com.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.