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From: Suravee Suthikulanit <suravee.suthikulpanit-5C7GfCeVMHo@public.gmane.org>
To: Peter Zijlstra <peterz-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
Cc: steven.kinney-5C7GfCeVMHo@public.gmane.org,
	iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org,
	mingo-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 1/2] IOMMU/AMD: Adding IOMMU PC resource management
Date: Tue, 14 May 2013 09:37:21 -0500	[thread overview]
Message-ID: <51924C21.3020906@amd.com> (raw)
In-Reply-To: <20130514070924.GA15942-ml83lk9NYoCAxCfHYDuV95NvnLFust7K9Kp1ZRVAGBM@public.gmane.org>

On 5/14/2013 2:09 AM, Peter Zijlstra wrote:
> On Mon, May 13, 2013 at 04:43:44PM -0500, steven.kinney-5C7GfCeVMHo@public.gmane.org wrote:
>> +static void init_iommu_perf_ctr(struct amd_iommu *iommu)
>> +{
>> +	u32 val = 0xabcd, val2 = 0;
>> +
>> +	if (!iommu_feature(iommu, FEATURE_PC))
>> +		return;
>> +
>> +	amd_iommu_pc_present = true;
>> +
>> +	/* Check if the performance counters can be written to */
>> +	if ((0 != amd_iommu_pc_get_set_reg_val(0, 0, 0, 0, &val, true)) ||
>> +	    (0 != amd_iommu_pc_get_set_reg_val(0, 0, 0, 0, &val2, false)) ||
>> +	    (val != val2)) {
>> +		pr_err("AMD-Vi: Unable to write to IOMMU perf counter.\n");
> Would it make sense to clear amd_iommu_pc_present here?
Yes, I'll take care of this here.

Thank you,

Surave

WARNING: multiple messages have this Message-ID (diff)
From: Suravee Suthikulanit <suravee.suthikulpanit@amd.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: <steven.kinney@amd.com>, <linux-kernel@vger.kernel.org>,
	<mingo@redhat.com>, <iommu@lists.linux-foundation.org>,
	<joro@8bytes.org>
Subject: Re: [PATCH 1/2] IOMMU/AMD: Adding IOMMU PC resource management
Date: Tue, 14 May 2013 09:37:21 -0500	[thread overview]
Message-ID: <51924C21.3020906@amd.com> (raw)
In-Reply-To: <20130514070924.GA15942@dyad.programming.kicks-ass.net>

On 5/14/2013 2:09 AM, Peter Zijlstra wrote:
> On Mon, May 13, 2013 at 04:43:44PM -0500, steven.kinney@amd.com wrote:
>> +static void init_iommu_perf_ctr(struct amd_iommu *iommu)
>> +{
>> +	u32 val = 0xabcd, val2 = 0;
>> +
>> +	if (!iommu_feature(iommu, FEATURE_PC))
>> +		return;
>> +
>> +	amd_iommu_pc_present = true;
>> +
>> +	/* Check if the performance counters can be written to */
>> +	if ((0 != amd_iommu_pc_get_set_reg_val(0, 0, 0, 0, &val, true)) ||
>> +	    (0 != amd_iommu_pc_get_set_reg_val(0, 0, 0, 0, &val2, false)) ||
>> +	    (val != val2)) {
>> +		pr_err("AMD-Vi: Unable to write to IOMMU perf counter.\n");
> Would it make sense to clear amd_iommu_pc_present here?
Yes, I'll take care of this here.

Thank you,

Surave


  parent reply	other threads:[~2013-05-14 14:37 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-13 21:43 [PATCH 1/2] IOMMU/AMD: Adding IOMMU PC resource management steven.kinney-5C7GfCeVMHo
2013-05-13 21:43 ` steven.kinney
2013-05-14  7:09 ` Peter Zijlstra
     [not found]   ` <20130514070924.GA15942-ml83lk9NYoCAxCfHYDuV95NvnLFust7K9Kp1ZRVAGBM@public.gmane.org>
2013-05-14 14:37     ` Suravee Suthikulanit [this message]
2013-05-14 14:37       ` Suravee Suthikulanit

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