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From: Michal Simek <monstr@monstr.eu>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Michal Simek <michal.simek@xilinx.com>,
	linux-kernel@vger.kernel.org,
	Florian Tobias Schandinat <FlorianSchandinat@gmx.de>,
	linux-fbdev@vger.kernel.org
Subject: Re: [PATCH v2 2/3] video: xilinxfb: Do not use out_be32 IO function
Date: Fri, 31 May 2013 07:39:10 +0000	[thread overview]
Message-ID: <51A8539E.3000702@monstr.eu> (raw)
In-Reply-To: <3808365.SOUxDqkW9J@wuerfel>

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On 05/31/2013 12:04 AM, Arnd Bergmann wrote:
> On Thursday 30 May 2013 11:41:01 Michal Simek wrote:
>>   * To perform the read/write on the registers we need to check on
>>   * which bus its connected and call the appropriate write API.
>>   */
>> -static void xilinx_fb_out_be32(struct xilinxfb_drvdata *drvdata, u32 offset,
>> +static void xilinx_fb_out32(struct xilinxfb_drvdata *drvdata, u32 offset,
>>                                 u32 val)
>>  {
>>         if (drvdata->flags & PLB_ACCESS_FLAG)
>> -               out_be32(drvdata->regs + (offset << 2), val);
>> +               __raw_writel(val, drvdata->regs + (offset << 2));
>>  #ifdef CONFIG_PPC_DCR
>>         else
>>                 dcr_write(drvdata->dcr_host, offset, val);
>>
> 
> This is probably missing barriers, and is wrong on systems on which
> the endianess of the device is different from the CPU.
> 
> You already have an indirection in there, so I guess it won't hurt
> to create a third case for little-endian registers and add
> another bit in drvdata->flags, or make it depend on the architecture,
> if the endianess of the device registers is known at compile time.

The PLB_ACCESS_FLAGS is incorrectly named. It means BUS_ACCESS.
But I will find a way how to autodetect endianess directly on IP
as I have done it for uartlite and will send v3.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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WARNING: multiple messages have this Message-ID (diff)
From: Michal Simek <monstr@monstr.eu>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Michal Simek <michal.simek@xilinx.com>,
	linux-kernel@vger.kernel.org,
	Florian Tobias Schandinat <FlorianSchandinat@gmx.de>,
	linux-fbdev@vger.kernel.org
Subject: Re: [PATCH v2 2/3] video: xilinxfb: Do not use out_be32 IO function
Date: Fri, 31 May 2013 09:39:10 +0200	[thread overview]
Message-ID: <51A8539E.3000702@monstr.eu> (raw)
In-Reply-To: <3808365.SOUxDqkW9J@wuerfel>

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On 05/31/2013 12:04 AM, Arnd Bergmann wrote:
> On Thursday 30 May 2013 11:41:01 Michal Simek wrote:
>>   * To perform the read/write on the registers we need to check on
>>   * which bus its connected and call the appropriate write API.
>>   */
>> -static void xilinx_fb_out_be32(struct xilinxfb_drvdata *drvdata, u32 offset,
>> +static void xilinx_fb_out32(struct xilinxfb_drvdata *drvdata, u32 offset,
>>                                 u32 val)
>>  {
>>         if (drvdata->flags & PLB_ACCESS_FLAG)
>> -               out_be32(drvdata->regs + (offset << 2), val);
>> +               __raw_writel(val, drvdata->regs + (offset << 2));
>>  #ifdef CONFIG_PPC_DCR
>>         else
>>                 dcr_write(drvdata->dcr_host, offset, val);
>>
> 
> This is probably missing barriers, and is wrong on systems on which
> the endianess of the device is different from the CPU.
> 
> You already have an indirection in there, so I guess it won't hurt
> to create a third case for little-endian registers and add
> another bit in drvdata->flags, or make it depend on the architecture,
> if the endianess of the device registers is known at compile time.

The PLB_ACCESS_FLAGS is incorrectly named. It means BUS_ACCESS.
But I will find a way how to autodetect endianess directly on IP
as I have done it for uartlite and will send v3.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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  parent reply	other threads:[~2013-05-31  7:39 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-05-30  9:41 [PATCH v2 1/3] video: xilinxfb: Fix OF probing on little-endian systems Michal Simek
2013-05-30  9:41 ` Michal Simek
2013-05-30  9:41 ` [PATCH v2 2/3] video: xilinxfb: Do not use out_be32 IO function Michal Simek
2013-05-30  9:41   ` Michal Simek
2013-05-30 22:04   ` Arnd Bergmann
2013-05-30 22:04     ` Arnd Bergmann
2013-05-31  1:16     ` Timur Tabi
2013-05-31  1:16       ` Timur Tabi
2013-05-31  7:39     ` Michal Simek [this message]
2013-05-31  7:39       ` Michal Simek
2013-05-30  9:41 ` [PATCH v2 3/3] video: xilinxfb: Use driver for Xilinx ARM Zynq Michal Simek
2013-05-30  9:41   ` Michal Simek

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