From: Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: "gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org"
<gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org>,
"linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCH 1/2] memory: tegra20-mc: Fix hang in IRQ handler.
Date: Tue, 11 Jun 2013 13:09:39 +0300 [thread overview]
Message-ID: <51B6F763.2080004@nvidia.com> (raw)
In-Reply-To: <20130610203641.GA26036@mithrandir>
On 06/10/2013 11:36 PM, Thierry Reding wrote:
> On Mon, Jun 10, 2013 at 12:13:43PM +0300, Tuomas Tynkkynen wrote:
>> In Tegra20 memory controller any MC interrupt would cause an
>> infinite loop in the IRQ handler.
>>
>> Signed-off-by: Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> ---
>> drivers/memory/tegra20-mc.c | 5 ++++-
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/memory/tegra20-mc.c b/drivers/memory/tegra20-mc.c
>> index 2ca5f28..bd5a553 100644
>> --- a/drivers/memory/tegra20-mc.c
>> +++ b/drivers/memory/tegra20-mc.c
>> @@ -193,8 +193,11 @@ static irqreturn_t tegra20_mc_isr(int irq, void *data)
>> mask &= stat;
>> if (!mask)
>> return IRQ_NONE;
>> - while ((bit = ffs(mask)) != 0)
>> + while ((bit = ffs(mask)) != 0) {
>> tegra20_mc_decode(mc, bit - 1);
>> + mask &= BIT(bit);
>
> Shouldn't this be "mask &= ~BIT(bit);"? The intent of the code is to
> clear the bit which was handled by the loop body, right? The above
> clears all other bits instead.
>
> Thierry
Whoops, yes it should be clearing just one bit. And since ffs() returned
a one-based bit-index, it seemed to work in practice.
I'll fix those & resend.
- Tuomas
WARNING: multiple messages have this Message-ID (diff)
From: ttynkkynen@nvidia.com (Tuomas Tynkkynen)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2] memory: tegra20-mc: Fix hang in IRQ handler.
Date: Tue, 11 Jun 2013 13:09:39 +0300 [thread overview]
Message-ID: <51B6F763.2080004@nvidia.com> (raw)
In-Reply-To: <20130610203641.GA26036@mithrandir>
On 06/10/2013 11:36 PM, Thierry Reding wrote:
> On Mon, Jun 10, 2013 at 12:13:43PM +0300, Tuomas Tynkkynen wrote:
>> In Tegra20 memory controller any MC interrupt would cause an
>> infinite loop in the IRQ handler.
>>
>> Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
>> ---
>> drivers/memory/tegra20-mc.c | 5 ++++-
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/memory/tegra20-mc.c b/drivers/memory/tegra20-mc.c
>> index 2ca5f28..bd5a553 100644
>> --- a/drivers/memory/tegra20-mc.c
>> +++ b/drivers/memory/tegra20-mc.c
>> @@ -193,8 +193,11 @@ static irqreturn_t tegra20_mc_isr(int irq, void *data)
>> mask &= stat;
>> if (!mask)
>> return IRQ_NONE;
>> - while ((bit = ffs(mask)) != 0)
>> + while ((bit = ffs(mask)) != 0) {
>> tegra20_mc_decode(mc, bit - 1);
>> + mask &= BIT(bit);
>
> Shouldn't this be "mask &= ~BIT(bit);"? The intent of the code is to
> clear the bit which was handled by the loop body, right? The above
> clears all other bits instead.
>
> Thierry
Whoops, yes it should be clearing just one bit. And since ffs() returned
a one-based bit-index, it seemed to work in practice.
I'll fix those & resend.
- Tuomas
WARNING: multiple messages have this Message-ID (diff)
From: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
To: Thierry Reding <thierry.reding@gmail.com>
Cc: "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
"linux-tegra@vger.kernel.org" <linux-tegra@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/2] memory: tegra20-mc: Fix hang in IRQ handler.
Date: Tue, 11 Jun 2013 13:09:39 +0300 [thread overview]
Message-ID: <51B6F763.2080004@nvidia.com> (raw)
In-Reply-To: <20130610203641.GA26036@mithrandir>
On 06/10/2013 11:36 PM, Thierry Reding wrote:
> On Mon, Jun 10, 2013 at 12:13:43PM +0300, Tuomas Tynkkynen wrote:
>> In Tegra20 memory controller any MC interrupt would cause an
>> infinite loop in the IRQ handler.
>>
>> Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
>> ---
>> drivers/memory/tegra20-mc.c | 5 ++++-
>> 1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/memory/tegra20-mc.c b/drivers/memory/tegra20-mc.c
>> index 2ca5f28..bd5a553 100644
>> --- a/drivers/memory/tegra20-mc.c
>> +++ b/drivers/memory/tegra20-mc.c
>> @@ -193,8 +193,11 @@ static irqreturn_t tegra20_mc_isr(int irq, void *data)
>> mask &= stat;
>> if (!mask)
>> return IRQ_NONE;
>> - while ((bit = ffs(mask)) != 0)
>> + while ((bit = ffs(mask)) != 0) {
>> tegra20_mc_decode(mc, bit - 1);
>> + mask &= BIT(bit);
>
> Shouldn't this be "mask &= ~BIT(bit);"? The intent of the code is to
> clear the bit which was handled by the loop body, right? The above
> clears all other bits instead.
>
> Thierry
Whoops, yes it should be clearing just one bit. And since ffs() returned
a one-based bit-index, it seemed to work in practice.
I'll fix those & resend.
- Tuomas
next prev parent reply other threads:[~2013-06-11 10:09 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-06-10 9:13 [PATCH 0/2] Bugfixes for Tegra memory controllers Tuomas Tynkkynen
2013-06-10 9:13 ` Tuomas Tynkkynen
2013-06-10 9:13 ` Tuomas Tynkkynen
2013-06-10 9:13 ` [PATCH 1/2] memory: tegra20-mc: Fix hang in IRQ handler Tuomas Tynkkynen
2013-06-10 9:13 ` Tuomas Tynkkynen
2013-06-10 9:13 ` Tuomas Tynkkynen
[not found] ` <1370855624-30564-2-git-send-email-ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-10 20:36 ` Thierry Reding
2013-06-10 20:36 ` Thierry Reding
2013-06-10 20:36 ` Thierry Reding
2013-06-11 10:09 ` Tuomas Tynkkynen [this message]
2013-06-11 10:09 ` Tuomas Tynkkynen
2013-06-11 10:09 ` Tuomas Tynkkynen
[not found] ` <1370855624-30564-1-git-send-email-ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-10 9:13 ` [PATCH 2/2] memory: tegra30-mc: Fix IRQ handler bugs Tuomas Tynkkynen
2013-06-10 9:13 ` Tuomas Tynkkynen
2013-06-10 9:13 ` Tuomas Tynkkynen
[not found] ` <1370855624-30564-3-git-send-email-ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-10 20:37 ` Thierry Reding
2013-06-10 20:37 ` Thierry Reding
2013-06-10 20:37 ` Thierry Reding
-- strict thread matches above, loose matches on Subject: below --
2013-06-11 10:11 [PATCH 0/2 v2] Bugfixes for Tegra memory controllers Tuomas Tynkkynen
[not found] ` <1370945479-2917-1-git-send-email-ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-06-11 10:11 ` [PATCH 1/2] memory: tegra20-mc: Fix hang in IRQ handler Tuomas Tynkkynen
2013-06-11 10:11 ` Tuomas Tynkkynen
2013-06-11 10:11 ` Tuomas Tynkkynen
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