* [PATCH v2 0/2] Device tree changes for Tegra30 and Tegra114 USB Host support @ 2013-08-01 15:00 ` Tuomas Tynkkynen 0 siblings, 0 replies; 11+ messages in thread From: Tuomas Tynkkynen @ 2013-08-01 15:00 UTC (permalink / raw) To: swarren; +Cc: linux-tegra, linux-kernel, linux-usb, Tuomas Tynkkynen Hi all, Here's the device tree changes required for USB Host support on Tegra30 and Tegra114. This enables USB Host on the Cardhu's dock connector port and on the single built-in A-ports on Dalmore and Beaver. Diff from v1: - Use internal pullups on the VBUS regulator GPIOs on Beaver. Mikko Perttunen (1): ARM: dts: USB for Tegra114 Dalmore Tuomas Tynkkynen (1): ARM: DTS: tegra: Add USB entries for Tegra30 arch/arm/boot/dts/tegra114-dalmore.dts | 9 ++++ arch/arm/boot/dts/tegra114.dtsi | 62 ++++++++++++++++++++++++ arch/arm/boot/dts/tegra30-beaver.dts | 22 ++++++++- arch/arm/boot/dts/tegra30-cardhu.dtsi | 9 ++++ arch/arm/boot/dts/tegra30.dtsi | 86 ++++++++++++++++++++++++++++++++++ 5 files changed, 186 insertions(+), 2 deletions(-) -- 1.8.1.5 ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 0/2] Device tree changes for Tegra30 and Tegra114 USB Host support @ 2013-08-01 15:00 ` Tuomas Tynkkynen 0 siblings, 0 replies; 11+ messages in thread From: Tuomas Tynkkynen @ 2013-08-01 15:00 UTC (permalink / raw) To: swarren; +Cc: linux-tegra, linux-kernel, linux-usb, Tuomas Tynkkynen Hi all, Here's the device tree changes required for USB Host support on Tegra30 and Tegra114. This enables USB Host on the Cardhu's dock connector port and on the single built-in A-ports on Dalmore and Beaver. Diff from v1: - Use internal pullups on the VBUS regulator GPIOs on Beaver. Mikko Perttunen (1): ARM: dts: USB for Tegra114 Dalmore Tuomas Tynkkynen (1): ARM: DTS: tegra: Add USB entries for Tegra30 arch/arm/boot/dts/tegra114-dalmore.dts | 9 ++++ arch/arm/boot/dts/tegra114.dtsi | 62 ++++++++++++++++++++++++ arch/arm/boot/dts/tegra30-beaver.dts | 22 ++++++++- arch/arm/boot/dts/tegra30-cardhu.dtsi | 9 ++++ arch/arm/boot/dts/tegra30.dtsi | 86 ++++++++++++++++++++++++++++++++++ 5 files changed, 186 insertions(+), 2 deletions(-) -- 1.8.1.5 ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 1/2] ARM: DTS: tegra: Add USB entries for Tegra30 2013-08-01 15:00 ` Tuomas Tynkkynen @ 2013-08-01 15:00 ` Tuomas Tynkkynen -1 siblings, 0 replies; 11+ messages in thread From: Tuomas Tynkkynen @ 2013-08-01 15:00 UTC (permalink / raw) To: swarren; +Cc: linux-tegra, linux-kernel, linux-usb, Tuomas Tynkkynen Add device tree entries for the 3 USB controllers and PHYs and enable the third controller on Cardhu and Beaver boards. Fix VBUS regulator entries on Beaver. The GPIO pins were wrong. Also, internal pullups need to be enabled on those pins. Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> --- v2: Use internal pullups on the VBUS regulator GPIOs. arch/arm/boot/dts/tegra30-beaver.dts | 22 ++++++++- arch/arm/boot/dts/tegra30-cardhu.dtsi | 9 ++++ arch/arm/boot/dts/tegra30.dtsi | 86 +++++++++++++++++++++++++++++++++++ 3 files changed, 115 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index 87c5f7b..fa6f6a6 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -76,6 +76,11 @@ nvidia,pull = <0>; nvidia,tristate = <0>; }; + pex_l1_prsnt_n_pdd4 { + nvidia,pins = "pex_l1_prsnt_n_pdd4", + "pex_l1_clkreq_n_pdd6"; + nvidia,pull = <2>; + }; sdio3 { nvidia,pins = "drive_sdio3"; nvidia,high-speed-mode = <0>; @@ -85,6 +90,10 @@ nvidia,slew-rate-rising = <1>; nvidia,slew-rate-falling = <1>; }; + gpv { + nvidia,pins = "drive_gpv"; + nvidia,pull-up-strength = <16>; + }; }; }; @@ -285,6 +294,15 @@ non-removable; }; + usb@7d008000 { + status = "okay"; + }; + + usb-phy@7d008000 { + vbus-supply = <&usb3_vbus_reg>; + status = "okay"; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; @@ -357,7 +375,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; - gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>; + gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>; gpio-open-drain; vin-supply = <&vdd_5v_in_reg>; }; @@ -369,7 +387,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; - gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; + gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>; gpio-open-drain; vin-supply = <&vdd_5v_in_reg>; }; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index f65b53d..7af52e4 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -330,6 +330,15 @@ non-removable; }; + usb@7d008000 { + status = "okay"; + }; + + usb-phy@7d008000 { + vbus-supply = <&usb3_vbus_reg>; + status = "okay"; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index d8783f0..9920797 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -561,6 +561,92 @@ status = "disabled"; }; + usb@7d000000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d000000 0x4000>; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA30_CLK_USBD>; + nvidia,needs-double-reset; + nvidia,phy = <&phy1>; + status = "disabled"; + }; + + phy1: usb-phy@7d000000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d000000 0x4000 0x7d000000 0x4000>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA30_CLK_USBD>, + <&tegra_car TEGRA30_CLK_PLL_U>, + <&tegra_car TEGRA30_CLK_USBD>; + clock-names = "reg", "pll_u", "utmi-pads"; + nvidia,hssync-start-delay = <9>; + nvidia,idle-wait-delay = <17>; + nvidia,elastic-limit = <16>; + nvidia,term-range-adj = <6>; + nvidia,xcvr-setup = <51>; + nvidia.xcvr-setup-use-fuses; + nvidia,xcvr-lsfslew = <1>; + nvidia,xcvr-lsrslew = <1>; + nvidia,xcvr-hsslew = <32>; + nvidia,hssquelch-level = <2>; + nvidia,hsdiscon-level = <5>; + status = "disabled"; + }; + + usb@7d004000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d004000 0x4000>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + phy_type = "ulpi"; + clocks = <&tegra_car TEGRA30_CLK_USB2>; + nvidia,phy = <&phy2>; + status = "disabled"; + }; + + phy2: usb-phy@7d004000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d004000 0x4000>; + phy_type = "ulpi"; + clocks = <&tegra_car TEGRA30_CLK_USB2>, + <&tegra_car TEGRA30_CLK_PLL_U>, + <&tegra_car TEGRA30_CLK_CDEV2>; + clock-names = "reg", "pll_u", "ulpi-link"; + status = "disabled"; + }; + + usb@7d008000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d008000 0x4000>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA30_CLK_USB3>; + nvidia,phy = <&phy3>; + status = "disabled"; + }; + + phy3: usb-phy@7d008000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d008000 0x4000 0x7d000000 0x4000>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA30_CLK_USB3>, + <&tegra_car TEGRA30_CLK_PLL_U>, + <&tegra_car TEGRA30_CLK_USBD>; + clock-names = "reg", "pll_u", "utmi-pads"; + nvidia,hssync-start-delay = <0>; + nvidia,idle-wait-delay = <17>; + nvidia,elastic-limit = <16>; + nvidia,term-range-adj = <6>; + nvidia,xcvr-setup = <51>; + nvidia.xcvr-setup-use-fuses; + nvidia,xcvr-lsfslew = <2>; + nvidia,xcvr-lsrslew = <2>; + nvidia,xcvr-hsslew = <32>; + nvidia,hssquelch-level = <2>; + nvidia,hsdiscon-level = <5>; + status = "disabled"; + }; + cpus { #address-cells = <1>; #size-cells = <0>; -- 1.8.1.5 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 1/2] ARM: DTS: tegra: Add USB entries for Tegra30 @ 2013-08-01 15:00 ` Tuomas Tynkkynen 0 siblings, 0 replies; 11+ messages in thread From: Tuomas Tynkkynen @ 2013-08-01 15:00 UTC (permalink / raw) To: swarren; +Cc: linux-tegra, linux-kernel, linux-usb, Tuomas Tynkkynen Add device tree entries for the 3 USB controllers and PHYs and enable the third controller on Cardhu and Beaver boards. Fix VBUS regulator entries on Beaver. The GPIO pins were wrong. Also, internal pullups need to be enabled on those pins. Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> --- v2: Use internal pullups on the VBUS regulator GPIOs. arch/arm/boot/dts/tegra30-beaver.dts | 22 ++++++++- arch/arm/boot/dts/tegra30-cardhu.dtsi | 9 ++++ arch/arm/boot/dts/tegra30.dtsi | 86 +++++++++++++++++++++++++++++++++++ 3 files changed, 115 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index 87c5f7b..fa6f6a6 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -76,6 +76,11 @@ nvidia,pull = <0>; nvidia,tristate = <0>; }; + pex_l1_prsnt_n_pdd4 { + nvidia,pins = "pex_l1_prsnt_n_pdd4", + "pex_l1_clkreq_n_pdd6"; + nvidia,pull = <2>; + }; sdio3 { nvidia,pins = "drive_sdio3"; nvidia,high-speed-mode = <0>; @@ -85,6 +90,10 @@ nvidia,slew-rate-rising = <1>; nvidia,slew-rate-falling = <1>; }; + gpv { + nvidia,pins = "drive_gpv"; + nvidia,pull-up-strength = <16>; + }; }; }; @@ -285,6 +294,15 @@ non-removable; }; + usb@7d008000 { + status = "okay"; + }; + + usb-phy@7d008000 { + vbus-supply = <&usb3_vbus_reg>; + status = "okay"; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; @@ -357,7 +375,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; - gpio = <&gpio TEGRA_GPIO(I, 4) GPIO_ACTIVE_HIGH>; + gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>; gpio-open-drain; vin-supply = <&vdd_5v_in_reg>; }; @@ -369,7 +387,7 @@ regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; enable-active-high; - gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_HIGH>; + gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>; gpio-open-drain; vin-supply = <&vdd_5v_in_reg>; }; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index f65b53d..7af52e4 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -330,6 +330,15 @@ non-removable; }; + usb@7d008000 { + status = "okay"; + }; + + usb-phy@7d008000 { + vbus-supply = <&usb3_vbus_reg>; + status = "okay"; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index d8783f0..9920797 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -561,6 +561,92 @@ status = "disabled"; }; + usb@7d000000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d000000 0x4000>; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA30_CLK_USBD>; + nvidia,needs-double-reset; + nvidia,phy = <&phy1>; + status = "disabled"; + }; + + phy1: usb-phy@7d000000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d000000 0x4000 0x7d000000 0x4000>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA30_CLK_USBD>, + <&tegra_car TEGRA30_CLK_PLL_U>, + <&tegra_car TEGRA30_CLK_USBD>; + clock-names = "reg", "pll_u", "utmi-pads"; + nvidia,hssync-start-delay = <9>; + nvidia,idle-wait-delay = <17>; + nvidia,elastic-limit = <16>; + nvidia,term-range-adj = <6>; + nvidia,xcvr-setup = <51>; + nvidia.xcvr-setup-use-fuses; + nvidia,xcvr-lsfslew = <1>; + nvidia,xcvr-lsrslew = <1>; + nvidia,xcvr-hsslew = <32>; + nvidia,hssquelch-level = <2>; + nvidia,hsdiscon-level = <5>; + status = "disabled"; + }; + + usb@7d004000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d004000 0x4000>; + interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; + phy_type = "ulpi"; + clocks = <&tegra_car TEGRA30_CLK_USB2>; + nvidia,phy = <&phy2>; + status = "disabled"; + }; + + phy2: usb-phy@7d004000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d004000 0x4000>; + phy_type = "ulpi"; + clocks = <&tegra_car TEGRA30_CLK_USB2>, + <&tegra_car TEGRA30_CLK_PLL_U>, + <&tegra_car TEGRA30_CLK_CDEV2>; + clock-names = "reg", "pll_u", "ulpi-link"; + status = "disabled"; + }; + + usb@7d008000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d008000 0x4000>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA30_CLK_USB3>; + nvidia,phy = <&phy3>; + status = "disabled"; + }; + + phy3: usb-phy@7d008000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d008000 0x4000 0x7d000000 0x4000>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA30_CLK_USB3>, + <&tegra_car TEGRA30_CLK_PLL_U>, + <&tegra_car TEGRA30_CLK_USBD>; + clock-names = "reg", "pll_u", "utmi-pads"; + nvidia,hssync-start-delay = <0>; + nvidia,idle-wait-delay = <17>; + nvidia,elastic-limit = <16>; + nvidia,term-range-adj = <6>; + nvidia,xcvr-setup = <51>; + nvidia.xcvr-setup-use-fuses; + nvidia,xcvr-lsfslew = <2>; + nvidia,xcvr-lsrslew = <2>; + nvidia,xcvr-hsslew = <32>; + nvidia,hssquelch-level = <2>; + nvidia,hsdiscon-level = <5>; + status = "disabled"; + }; + cpus { #address-cells = <1>; #size-cells = <0>; -- 1.8.1.5 ^ permalink raw reply related [flat|nested] 11+ messages in thread
[parent not found: <1375369218-11288-2-git-send-email-ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>]
* Re: [PATCH v2 1/2] ARM: DTS: tegra: Add USB entries for Tegra30 2013-08-01 15:00 ` Tuomas Tynkkynen @ 2013-08-01 16:39 ` Stephen Warren -1 siblings, 0 replies; 11+ messages in thread From: Stephen Warren @ 2013-08-01 16:39 UTC (permalink / raw) To: Tuomas Tynkkynen, Thierry Reding Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA, linux-kernel-u79uwXL29TY76Z2rM5mHXA, linux-usb-u79uwXL29TY76Z2rM5mHXA On 08/01/2013 09:00 AM, Tuomas Tynkkynen wrote: > Add device tree entries for the 3 USB controllers and PHYs and > enable the third controller on Cardhu and Beaver boards. > > Fix VBUS regulator entries on Beaver. The GPIO pins were wrong. > Also, internal pullups need to be enabled on those pins. > > Signed-off-by: Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > --- > v2: Use internal pullups on the VBUS regulator GPIOs. Thanks, this version looks good. Thierry, can you please validate that the gpv group pull strength change doesn't have any negative affect on your PCIe patches. Thanks. ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/2] ARM: DTS: tegra: Add USB entries for Tegra30 @ 2013-08-01 16:39 ` Stephen Warren 0 siblings, 0 replies; 11+ messages in thread From: Stephen Warren @ 2013-08-01 16:39 UTC (permalink / raw) To: Tuomas Tynkkynen, Thierry Reding; +Cc: linux-tegra, linux-kernel, linux-usb On 08/01/2013 09:00 AM, Tuomas Tynkkynen wrote: > Add device tree entries for the 3 USB controllers and PHYs and > enable the third controller on Cardhu and Beaver boards. > > Fix VBUS regulator entries on Beaver. The GPIO pins were wrong. > Also, internal pullups need to be enabled on those pins. > > Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> > --- > v2: Use internal pullups on the VBUS regulator GPIOs. Thanks, this version looks good. Thierry, can you please validate that the gpv group pull strength change doesn't have any negative affect on your PCIe patches. Thanks. ^ permalink raw reply [flat|nested] 11+ messages in thread
[parent not found: <51FA8F2E.8080105-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>]
* Re: [PATCH v2 1/2] ARM: DTS: tegra: Add USB entries for Tegra30 2013-08-01 16:39 ` Stephen Warren @ 2013-08-02 12:30 ` Thierry Reding -1 siblings, 0 replies; 11+ messages in thread From: Thierry Reding @ 2013-08-02 12:30 UTC (permalink / raw) To: Stephen Warren Cc: Tuomas Tynkkynen, linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org [-- Attachment #1: Type: text/plain, Size: 1134 bytes --] On Thu, Aug 01, 2013 at 06:39:10PM +0200, Stephen Warren wrote: > On 08/01/2013 09:00 AM, Tuomas Tynkkynen wrote: > > Add device tree entries for the 3 USB controllers and PHYs and > > enable the third controller on Cardhu and Beaver boards. > > > > Fix VBUS regulator entries on Beaver. The GPIO pins were wrong. > > Also, internal pullups need to be enabled on those pins. > > > > Signed-off-by: Tuomas Tynkkynen <ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> > > --- > > v2: Use internal pullups on the VBUS regulator GPIOs. > > Thanks, this version looks good. > > Thierry, can you please validate that the gpv group pull strength change > doesn't have any negative affect on your PCIe patches. Thanks. PCIe on Beaver seems to behave the same way whether that patch is applied or not, so: Tested-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> I wonder if perhaps a similar change can be made to Cardhu to see if that helps with the PCIe link disappearing. I'll see if I can find out what the implications are and what the correct values would be for Cardhu. Thierry [-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [PATCH v2 1/2] ARM: DTS: tegra: Add USB entries for Tegra30 @ 2013-08-02 12:30 ` Thierry Reding 0 siblings, 0 replies; 11+ messages in thread From: Thierry Reding @ 2013-08-02 12:30 UTC (permalink / raw) To: Stephen Warren Cc: Tuomas Tynkkynen, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, linux-usb@vger.kernel.org [-- Attachment #1: Type: text/plain, Size: 1076 bytes --] On Thu, Aug 01, 2013 at 06:39:10PM +0200, Stephen Warren wrote: > On 08/01/2013 09:00 AM, Tuomas Tynkkynen wrote: > > Add device tree entries for the 3 USB controllers and PHYs and > > enable the third controller on Cardhu and Beaver boards. > > > > Fix VBUS regulator entries on Beaver. The GPIO pins were wrong. > > Also, internal pullups need to be enabled on those pins. > > > > Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com> > > --- > > v2: Use internal pullups on the VBUS regulator GPIOs. > > Thanks, this version looks good. > > Thierry, can you please validate that the gpv group pull strength change > doesn't have any negative affect on your PCIe patches. Thanks. PCIe on Beaver seems to behave the same way whether that patch is applied or not, so: Tested-by: Thierry Reding <treding@nvidia.com> I wonder if perhaps a similar change can be made to Cardhu to see if that helps with the PCIe link disappearing. I'll see if I can find out what the implications are and what the correct values would be for Cardhu. Thierry [-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH v2 2/2] ARM: dts: USB for Tegra114 Dalmore 2013-08-01 15:00 ` Tuomas Tynkkynen @ 2013-08-01 15:00 ` Tuomas Tynkkynen -1 siblings, 0 replies; 11+ messages in thread From: Tuomas Tynkkynen @ 2013-08-01 15:00 UTC (permalink / raw) To: swarren; +Cc: linux-tegra, linux-kernel, linux-usb, Mikko Perttunen From: Mikko Perttunen <mperttunen@nvidia.com> Device tree entries for the three EHCI controllers on Tegra114. Enables the the third controller (USB host) on Dalmore. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> --- arch/arm/boot/dts/tegra114-dalmore.dts | 9 +++++ arch/arm/boot/dts/tegra114.dtsi | 62 ++++++++++++++++++++++++++++++++++ 2 files changed, 71 insertions(+) diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index cb640eb..f3fc2b0 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -870,6 +870,15 @@ non-removable; }; + usb@7d008000 { + status = "okay"; + }; + + usb-phy@7d008000 { + status = "okay"; + vbus-supply = <&usb3_vbus_reg>; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index abf6c40..2905145 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -430,6 +430,68 @@ status = "disable"; }; + usb@7d000000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d000000 0x4000>; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USBD>; + nvidia,phy = <&phy1>; + status = "disabled"; + }; + + phy1: usb-phy@7d000000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d000000 0x4000 0x7d000000 0x4000>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USBD>, + <&tegra_car TEGRA114_CLK_PLL_U>, + <&tegra_car TEGRA114_CLK_USBD>; + clock-names = "reg", "pll_u", "utmi-pads"; + nvidia,hssync-start-delay = <0>; + nvidia,idle-wait-delay = <17>; + nvidia,elastic-limit = <16>; + nvidia,term-range-adj = <6>; + nvidia,xcvr-setup = <9>; + nvidia,xcvr-lsfslew = <0>; + nvidia,xcvr-lsrslew = <3>; + nvidia,hssquelch-level = <2>; + nvidia,hsdiscon-level = <5>; + nvidia,xcvr-hsslew = <12>; + status = "disabled"; + }; + + usb@7d008000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d008000 0x4000>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USB3>; + nvidia,phy = <&phy3>; + status = "disabled"; + }; + + phy3: usb-phy@7d008000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d008000 0x4000 0x7d000000 0x4000>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USB3>, + <&tegra_car TEGRA114_CLK_PLL_U>, + <&tegra_car TEGRA114_CLK_USBD>; + clock-names = "reg", "pll_u", "utmi-pads"; + nvidia,hssync-start-delay = <0>; + nvidia,idle-wait-delay = <17>; + nvidia,elastic-limit = <16>; + nvidia,term-range-adj = <6>; + nvidia,xcvr-setup = <9>; + nvidia,xcvr-lsfslew = <0>; + nvidia,xcvr-lsrslew = <3>; + nvidia,hssquelch-level = <2>; + nvidia,hsdiscon-level = <5>; + nvidia,xcvr-hsslew = <12>; + status = "disabled"; + }; + cpus { #address-cells = <1>; #size-cells = <0>; -- 1.8.1.5 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [PATCH v2 2/2] ARM: dts: USB for Tegra114 Dalmore @ 2013-08-01 15:00 ` Tuomas Tynkkynen 0 siblings, 0 replies; 11+ messages in thread From: Tuomas Tynkkynen @ 2013-08-01 15:00 UTC (permalink / raw) To: swarren; +Cc: linux-tegra, linux-kernel, linux-usb, Mikko Perttunen From: Mikko Perttunen <mperttunen@nvidia.com> Device tree entries for the three EHCI controllers on Tegra114. Enables the the third controller (USB host) on Dalmore. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> --- arch/arm/boot/dts/tegra114-dalmore.dts | 9 +++++ arch/arm/boot/dts/tegra114.dtsi | 62 ++++++++++++++++++++++++++++++++++ 2 files changed, 71 insertions(+) diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index cb640eb..f3fc2b0 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -870,6 +870,15 @@ non-removable; }; + usb@7d008000 { + status = "okay"; + }; + + usb-phy@7d008000 { + status = "okay"; + vbus-supply = <&usb3_vbus_reg>; + }; + clocks { compatible = "simple-bus"; #address-cells = <1>; diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index abf6c40..2905145 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -430,6 +430,68 @@ status = "disable"; }; + usb@7d000000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d000000 0x4000>; + interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USBD>; + nvidia,phy = <&phy1>; + status = "disabled"; + }; + + phy1: usb-phy@7d000000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d000000 0x4000 0x7d000000 0x4000>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USBD>, + <&tegra_car TEGRA114_CLK_PLL_U>, + <&tegra_car TEGRA114_CLK_USBD>; + clock-names = "reg", "pll_u", "utmi-pads"; + nvidia,hssync-start-delay = <0>; + nvidia,idle-wait-delay = <17>; + nvidia,elastic-limit = <16>; + nvidia,term-range-adj = <6>; + nvidia,xcvr-setup = <9>; + nvidia,xcvr-lsfslew = <0>; + nvidia,xcvr-lsrslew = <3>; + nvidia,hssquelch-level = <2>; + nvidia,hsdiscon-level = <5>; + nvidia,xcvr-hsslew = <12>; + status = "disabled"; + }; + + usb@7d008000 { + compatible = "nvidia,tegra30-ehci", "usb-ehci"; + reg = <0x7d008000 0x4000>; + interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USB3>; + nvidia,phy = <&phy3>; + status = "disabled"; + }; + + phy3: usb-phy@7d008000 { + compatible = "nvidia,tegra30-usb-phy"; + reg = <0x7d008000 0x4000 0x7d000000 0x4000>; + phy_type = "utmi"; + clocks = <&tegra_car TEGRA114_CLK_USB3>, + <&tegra_car TEGRA114_CLK_PLL_U>, + <&tegra_car TEGRA114_CLK_USBD>; + clock-names = "reg", "pll_u", "utmi-pads"; + nvidia,hssync-start-delay = <0>; + nvidia,idle-wait-delay = <17>; + nvidia,elastic-limit = <16>; + nvidia,term-range-adj = <6>; + nvidia,xcvr-setup = <9>; + nvidia,xcvr-lsfslew = <0>; + nvidia,xcvr-lsrslew = <3>; + nvidia,hssquelch-level = <2>; + nvidia,hsdiscon-level = <5>; + nvidia,xcvr-hsslew = <12>; + status = "disabled"; + }; + cpus { #address-cells = <1>; #size-cells = <0>; -- 1.8.1.5 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [PATCH v2 0/2] Device tree changes for Tegra30 and Tegra114 USB Host support 2013-08-01 15:00 ` Tuomas Tynkkynen ` (2 preceding siblings ...) (?) @ 2013-08-13 18:41 ` Stephen Warren -1 siblings, 0 replies; 11+ messages in thread From: Stephen Warren @ 2013-08-13 18:41 UTC (permalink / raw) To: Tuomas Tynkkynen; +Cc: linux-tegra, linux-kernel, linux-usb On 08/01/2013 09:00 AM, Tuomas Tynkkynen wrote: > Hi all, > > Here's the device tree changes required for USB Host support on Tegra30 and > Tegra114. This enables USB Host on the Cardhu's dock connector port and on the > single built-in A-ports on Dalmore and Beaver. I've applied this series to Tegra's for-3.12/dt branch, since Felipe has applied the driver changes that back it up. ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2013-08-13 18:41 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-08-01 15:00 [PATCH v2 0/2] Device tree changes for Tegra30 and Tegra114 USB Host support Tuomas Tynkkynen
2013-08-01 15:00 ` Tuomas Tynkkynen
2013-08-01 15:00 ` [PATCH v2 1/2] ARM: DTS: tegra: Add USB entries for Tegra30 Tuomas Tynkkynen
2013-08-01 15:00 ` Tuomas Tynkkynen
[not found] ` <1375369218-11288-2-git-send-email-ttynkkynen-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-08-01 16:39 ` Stephen Warren
2013-08-01 16:39 ` Stephen Warren
[not found] ` <51FA8F2E.8080105-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-08-02 12:30 ` Thierry Reding
2013-08-02 12:30 ` Thierry Reding
2013-08-01 15:00 ` [PATCH v2 2/2] ARM: dts: USB for Tegra114 Dalmore Tuomas Tynkkynen
2013-08-01 15:00 ` Tuomas Tynkkynen
2013-08-13 18:41 ` [PATCH v2 0/2] Device tree changes for Tegra30 and Tegra114 USB Host support Stephen Warren
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.