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From: "H. Peter Anvin" <hpa@zytor.com>
To: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Andi Kleen <andi@firstfloor.org>, Ingo Molnar <mingo@redhat.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	x86@kernel.org, lkml <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH -tip ] x86/insn: Add Haswell-introduced opcodes
Date: Tue, 06 Aug 2013 08:16:49 -0700	[thread overview]
Message-ID: <52011361.6060606@zytor.com> (raw)
In-Reply-To: <20130806073750.4049.12365.stgit@udc4-manage.rcp.hitachi.co.jp>

On 08/06/2013 12:37 AM, Masami Hiramatsu wrote:
> Add TSX-NI related instructions and new instructions to
> x86-opcode-map.txt according to the Intel(R) 64 and IA-32
> Architectures Software Developer's Manual Vol2C (June, 2013).
> This also includes below updates.
>  - Fix a typo of MWAIT (the lack of (11B)).
>  - Change NOP Ev to prefetchw Ev
>  - Add CRC32 new prefix style (66&F2)
>  - Add ADCX, ADOX, RDSEED, CLAC and STAC instructions
> 
> Signed-off-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>

Thanks, applied!

You may want to also look at:

http://software.intel.com/en-us/intel-isa-extensions

... specifically ...

http://software.intel.com/sites/default/files/319433-015.pdf

For a *lot* of new instructions coming down the pipe.

	-hpa


  reply	other threads:[~2013-08-06 15:17 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-06  7:37 [PATCH -tip ] x86/insn: Add Haswell-introduced opcodes Masami Hiramatsu
2013-08-06 15:16 ` H. Peter Anvin [this message]
2013-08-07  4:51   ` Masami Hiramatsu
2013-08-07  5:03     ` H. Peter Anvin
2013-08-07  6:01       ` Masami Hiramatsu
2013-08-06 15:19 ` [tip:x86/asm] x86, insn: Add new opcodes as of June, 2013 tip-bot for Masami Hiramatsu

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