Re: Re: [PATCH -tip ] x86/insn: Add Haswell-introduced opcodes

[Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>]

(2013/08/07 0:16), H. Peter Anvin wrote:
> On 08/06/2013 12:37 AM, Masami Hiramatsu wrote:
>> Add TSX-NI related instructions and new instructions to
>> x86-opcode-map.txt according to the Intel(R) 64 and IA-32
>> Architectures Software Developer's Manual Vol2C (June, 2013).
>> This also includes below updates.
>>  - Fix a typo of MWAIT (the lack of (11B)).
>>  - Change NOP Ev to prefetchw Ev
>>  - Add CRC32 new prefix style (66&F2)
>>  - Add ADCX, ADOX, RDSEED, CLAC and STAC instructions
>>
>> Signed-off-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
>> Cc: Thomas Gleixner <tglx@linutronix.de>
>> Cc: Ingo Molnar <mingo@redhat.com>
>> Cc: "H. Peter Anvin" <hpa@zytor.com>
> 
> Thanks, applied!
> 
> You may want to also look at:
> 
> http://software.intel.com/en-us/intel-isa-extensions
> 
> ... specifically ...
> 
> http://software.intel.com/sites/default/files/319433-015.pdf
> 
> For a *lot* of new instructions coming down the pipe.

Thanks, Andi also asked me to support them ;)
As far as I can see, that requires more work to support
EVEX decoding. And perhaps, I have to classify new instructions
and operands and introduce new abbreviations/superscripts for
them, because there is no opcode map in the above document.

Would you intel guys have any idea about new opcode map?

Thank you,

-- 
Masami HIRAMATSU
IT Management Research Dept. Linux Technology Center
Hitachi, Ltd., Yokohama Research Laboratory
E-mail: masami.hiramatsu.pt@hitachi.com