From: John Crispin <blogic@openwrt.org>
To: Mark Brown <broonie@kernel.org>
Cc: Gabor Juhos <juhosg@openwrt.org>,
linux-spi@vger.kernel.org, linux-mips@linux-mips.org
Subject: Re: [PATCH 2/2] SPI: ralink: add Ralink SoC spi driver
Date: Tue, 13 Aug 2013 20:43:51 +0200 [thread overview]
Message-ID: <520A7E67.1060604@openwrt.org> (raw)
In-Reply-To: <20130811132642.GB6427@sirena.org.uk>
Hi Mark,
Thanks for the review, I will send a V2 tomorrow, I want to verify my
changes on real HW first.
a few comments inline ...
> There is presumably a maximum transfer size here from the FIFO that is
> holding the data?
The hardware is not running in DMA/IRQ mode and hence it can only
read/write 1 byte at a time.
> Set min_speed_hz in the spi_master and the core will check this for you.
it seems that min_speed is not handled by the core yet. I saw several
drivers do minimum speed testing. I am leaving this code in the driver
until there is a generic minimum speed check
> clk_prepare_enable(), and it'd be nice to use runtime PM and enable the
> clock only when doing transfers though that's not essential.
>
The clock is free running and always running.
John
next prev parent reply other threads:[~2013-08-13 18:51 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-09 18:51 [PATCH 1/2] DT: Add documentation for spi-rt2880 John Crispin
2013-08-09 18:51 ` [PATCH 2/2] SPI: ralink: add Ralink SoC spi driver John Crispin
2013-08-11 13:26 ` Mark Brown
2013-08-13 18:43 ` John Crispin [this message]
2013-08-13 18:58 ` Mark Brown
2013-08-12 16:10 ` James Hogan
2013-08-12 16:10 ` James Hogan
2013-08-12 16:11 ` James Hogan
2013-08-12 16:11 ` James Hogan
2013-08-09 20:44 ` [PATCH 1/2] DT: Add documentation for spi-rt2880 Sergei Shtylyov
2013-08-09 23:35 ` Kumar Gala
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