From: Gururaja Hebbar <gururaja.hebbar@ti.com>
To: Russ Dill <Russ.Dill@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>,
devicetree@vger.kernel.org, devicetree-discuss@lists.ozlabs.org,
linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 2/4] ARM: dts: add AM33XX vdd core opp50 suspend for Beaglebone.
Date: Wed, 14 Aug 2013 14:29:52 +0530 [thread overview]
Message-ID: <520B4708.3040108@ti.com> (raw)
In-Reply-To: <1376432412-8509-3-git-send-email-Russ.Dill@ti.com>
On 8/14/2013 3:50 AM, Russ Dill wrote:
> Changes since v1:
> * Rebased onto new am335x PM branch
>
> This adds a sleep and wake sequence to set the VDD core voltage to the
> OPP50 level, 0.950V. This saves power during suspend. The sequences are
> specific to the Beaglebone layout and PMIC, the TPS65217. The sequences
> are written out by the Cortex-M3.
>
> Signed-off-by: Russ Dill <Russ.Dill@ti.com>
> ---
> arch/arm/boot/dts/am335x-bone.dts | 25 ++++++++++++++++++++++++-
> 1 file changed, 24 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
> index 444b4ed..3f6528d 100644
> --- a/arch/arm/boot/dts/am335x-bone.dts
> +++ b/arch/arm/boot/dts/am335x-bone.dts
> @@ -127,10 +127,33 @@
> status = "okay";
> clock-frequency = <400000>;
>
> + /* Set OPP50 (0.95V) for VDD core */
> + sleep_sequence = /bits/ 8 <
For user readability, can you mention the PMIC used here as a comment?
> + 0x02 0x24 0x0b 0x6d /* Password unlock 1 */
> + 0x02 0x24 0x10 0x02 /* Set DCDC3 to 0.95V */
> + 0x02 0x24 0x0b 0x6d /* Password unlock 2 */
> + 0x02 0x24 0x10 0x02 /* Set DCDC3 to 0.95V */
> + 0x02 0x24 0x0b 0x6c /* Password unlock 1 */
> + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */
> + 0x02 0x24 0x0b 0x6c /* Password unlock 2 */
> + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */
> + >;
> +
> + /* Set OPP100 (1.10V) for VDD core */
> + wake_sequence = /bits/ 8 <
> + 0x02 0x24 0x0b 0x6d /* Password unlock 1 */
> + 0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */
> + 0x02 0x24 0x0b 0x6d /* Password unlock 2 */
> + 0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */
> + 0x02 0x24 0x0b 0x6c /* Password unlock 1 */
> + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */
> + 0x02 0x24 0x0b 0x6c /* Password unlock 2 */
> + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */
> + >;
> +
> tps: tps@24 {
> reg = <0x24>;
> };
> -
> };
> };
>
>
WARNING: multiple messages have this Message-ID (diff)
From: gururaja.hebbar@ti.com (Gururaja Hebbar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 2/4] ARM: dts: add AM33XX vdd core opp50 suspend for Beaglebone.
Date: Wed, 14 Aug 2013 14:29:52 +0530 [thread overview]
Message-ID: <520B4708.3040108@ti.com> (raw)
In-Reply-To: <1376432412-8509-3-git-send-email-Russ.Dill@ti.com>
On 8/14/2013 3:50 AM, Russ Dill wrote:
> Changes since v1:
> * Rebased onto new am335x PM branch
>
> This adds a sleep and wake sequence to set the VDD core voltage to the
> OPP50 level, 0.950V. This saves power during suspend. The sequences are
> specific to the Beaglebone layout and PMIC, the TPS65217. The sequences
> are written out by the Cortex-M3.
>
> Signed-off-by: Russ Dill <Russ.Dill@ti.com>
> ---
> arch/arm/boot/dts/am335x-bone.dts | 25 ++++++++++++++++++++++++-
> 1 file changed, 24 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
> index 444b4ed..3f6528d 100644
> --- a/arch/arm/boot/dts/am335x-bone.dts
> +++ b/arch/arm/boot/dts/am335x-bone.dts
> @@ -127,10 +127,33 @@
> status = "okay";
> clock-frequency = <400000>;
>
> + /* Set OPP50 (0.95V) for VDD core */
> + sleep_sequence = /bits/ 8 <
For user readability, can you mention the PMIC used here as a comment?
> + 0x02 0x24 0x0b 0x6d /* Password unlock 1 */
> + 0x02 0x24 0x10 0x02 /* Set DCDC3 to 0.95V */
> + 0x02 0x24 0x0b 0x6d /* Password unlock 2 */
> + 0x02 0x24 0x10 0x02 /* Set DCDC3 to 0.95V */
> + 0x02 0x24 0x0b 0x6c /* Password unlock 1 */
> + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */
> + 0x02 0x24 0x0b 0x6c /* Password unlock 2 */
> + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */
> + >;
> +
> + /* Set OPP100 (1.10V) for VDD core */
> + wake_sequence = /bits/ 8 <
> + 0x02 0x24 0x0b 0x6d /* Password unlock 1 */
> + 0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */
> + 0x02 0x24 0x0b 0x6d /* Password unlock 2 */
> + 0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */
> + 0x02 0x24 0x0b 0x6c /* Password unlock 1 */
> + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */
> + 0x02 0x24 0x0b 0x6c /* Password unlock 2 */
> + 0x02 0x24 0x11 0x86 /* Apply DCDC changes */
> + >;
> +
> tps: tps at 24 {
> reg = <0x24>;
> };
> -
> };
> };
>
>
next prev parent reply other threads:[~2013-08-14 8:59 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-08-13 22:20 [PATCH v4 0/4] ARM: OMAP2+: AM33XX: VDD CORE OPP50 support Russ Dill
2013-08-13 22:20 ` Russ Dill
2013-08-13 22:20 ` [PATCH v4 1/4] ARM: OMAP2+: AM33XX: I2C Sleep/wake sequence support Russ Dill
2013-08-13 22:20 ` Russ Dill
2013-08-14 10:18 ` Gururaja Hebbar
2013-08-14 10:18 ` Gururaja Hebbar
2013-08-14 22:34 ` Russ Dill
2013-08-14 22:34 ` Russ Dill
2013-08-16 7:16 ` Gururaja Hebbar
2013-08-16 7:16 ` Gururaja Hebbar
2013-08-19 5:49 ` Gururaja Hebbar
2013-08-19 5:49 ` Gururaja Hebbar
2013-08-20 16:33 ` Russ Dill
2013-08-20 16:33 ` Russ Dill
2013-08-21 8:29 ` Gururaja Hebbar
2013-08-21 8:29 ` Gururaja Hebbar
2013-08-13 22:20 ` [PATCH v4 2/4] ARM: dts: add AM33XX vdd core opp50 suspend for Beaglebone Russ Dill
2013-08-13 22:20 ` Russ Dill
2013-08-14 8:59 ` Gururaja Hebbar [this message]
2013-08-14 8:59 ` Gururaja Hebbar
2013-08-14 22:21 ` Russ Dill
2013-08-14 22:21 ` Russ Dill
2013-08-13 22:20 ` [PATCH v4 3/4] ARM: dts: add AM33XX vdd core opp50 suspend for AM335X GP EVM Russ Dill
2013-08-13 22:20 ` Russ Dill
2013-08-13 22:20 ` [PATCH v4 4/4] ARM: dts: AM33XX vdd core opp50 suspend for EVM-SK Russ Dill
2013-08-13 22:20 ` Russ Dill
2013-08-14 13:38 ` [PATCH v4 0/4] ARM: OMAP2+: AM33XX: VDD CORE OPP50 support Jan Lübbe
2013-08-14 13:38 ` Jan Lübbe
2013-08-14 22:21 ` Russ Dill
2013-08-14 22:21 ` Russ Dill
2013-08-15 8:00 ` Jan Lübbe
2013-08-15 8:00 ` Jan Lübbe
2013-08-27 22:44 ` Kevin Hilman
2013-08-27 22:44 ` Kevin Hilman
2013-08-28 1:05 ` Russ Dill
2013-08-28 1:05 ` Russ Dill
2013-08-29 11:05 ` Mark Brown
2013-08-29 11:05 ` Mark Brown
2013-08-29 15:29 ` Kevin Hilman
2013-08-29 15:29 ` Kevin Hilman
2013-08-29 15:49 ` Mark Brown
2013-08-29 15:49 ` Mark Brown
2013-08-29 16:31 ` Russ Dill
2013-08-29 16:31 ` Russ Dill
2013-08-29 17:30 ` Mark Brown
2013-08-29 17:30 ` Mark Brown
2013-08-29 17:47 ` Russ Dill
2013-08-29 17:47 ` Russ Dill
2013-08-29 18:03 ` Mark Brown
2013-08-29 18:03 ` Mark Brown
2013-08-29 18:28 ` Russ Dill
2013-08-29 18:28 ` Russ Dill
2013-08-29 15:42 ` Russ Dill
2013-08-29 15:42 ` Russ Dill
2013-08-29 18:01 ` Mark Brown
2013-08-29 18:01 ` Mark Brown
2013-08-29 18:25 ` Russ Dill
2013-08-29 18:25 ` Russ Dill
2013-08-29 19:10 ` Mark Brown
2013-08-29 19:10 ` Mark Brown
2013-09-03 14:06 ` Russ Dill
2013-09-03 14:06 ` Russ Dill
2013-09-03 14:39 ` Mark Brown
2013-09-03 14:39 ` Mark Brown
2013-08-29 15:17 ` Kevin Hilman
2013-08-29 15:17 ` Kevin Hilman
2013-08-29 16:10 ` Russ Dill
2013-08-29 16:10 ` Russ Dill
2013-08-29 19:11 ` Kevin Hilman
2013-08-29 19:11 ` Kevin Hilman
2013-08-29 20:09 ` Vaibhav Bedia
2013-08-29 20:09 ` Vaibhav Bedia
2013-08-29 21:33 ` Kevin Hilman
2013-08-29 21:33 ` Kevin Hilman
2013-08-30 0:25 ` Russ Dill
2013-08-30 0:25 ` Russ Dill
2013-08-30 16:06 ` Kevin Hilman
2013-08-30 16:06 ` Kevin Hilman
2013-09-03 18:55 ` Russ Dill
2013-09-03 18:55 ` Russ Dill
2013-09-03 19:07 ` Kevin Hilman
2013-09-03 19:07 ` Kevin Hilman
2013-08-30 17:57 ` Vaibhav Bedia
2013-08-30 17:57 ` Vaibhav Bedia
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