diff for duplicates of <5239CD2A.2020505@ti.com> diff --git a/a/1.txt b/N1/1.txt index ba6001c..08fb60d 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -9,7 +9,7 @@ On Wednesday 18 September 2013 09:23 PM, Sricharan R wrote: > > More discussions and the reason for adding this in a non-DT > way can be seen from below. -> http://www.mail-archive.com/linux-omap@vger.kernel.org/msg93832.html +> http://www.mail-archive.com/linux-omap at vger.kernel.org/msg93832.html > > So configuring this secure register for all the cpus here. > @@ -43,7 +43,7 @@ On Wednesday 18 September 2013 09:23 PM, Sricharan R wrote: > - clock-frequency = <6144000>; > }; > -> gic: interrupt-controller@48211000 { +> gic: interrupt-controller at 48211000 { > diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h > index 0e72917..5f88824 100644 > --- a/arch/arm/mach-omap2/omap-secure.h diff --git a/a/content_digest b/N1/content_digest index a13bbf1..a646c32 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,16 +1,8 @@ "ref\01379519593-31758-1-git-send-email-r.sricharan@ti.com\0" - "From\0Sricharan R <r.sricharan@ti.com>\0" - "Subject\0Re: [PATCH V3] ARM: OMAP5/DRA7: realtime_counter: Configure CNTFRQ register\0" + "From\0r.sricharan@ti.com (Sricharan R)\0" + "Subject\0[PATCH V3] ARM: OMAP5/DRA7: realtime_counter: Configure CNTFRQ register\0" "Date\0Wed, 18 Sep 2013 21:26:26 +0530\0" - "To\0Sricharan R <r.sricharan@ti.com>\0" - "Cc\0nm@ti.com" - mark.rutland@arm.com - tony@atomide.com - rnayak@ti.com - marc.zyngier@arm.com - santosh.shilimkar@ti.com - linux-omap@vger.kernel.org - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "On Wednesday 18 September 2013 09:23 PM, Sricharan R wrote:\n" @@ -24,7 +16,7 @@ ">\n" "> More discussions and the reason for adding this in a non-DT\n" "> way can be seen from below.\n" - "> http://www.mail-archive.com/linux-omap@vger.kernel.org/msg93832.html\n" + "> http://www.mail-archive.com/linux-omap at vger.kernel.org/msg93832.html\n" ">\n" "> So configuring this secure register for all the cpus here.\n" ">\n" @@ -58,7 +50,7 @@ "> -\t\tclock-frequency = <6144000>;\n" "> \t};\n" "> \n" - "> \tgic: interrupt-controller@48211000 {\n" + "> \tgic: interrupt-controller at 48211000 {\n" "> diff --git a/arch/arm/mach-omap2/omap-secure.h b/arch/arm/mach-omap2/omap-secure.h\n" "> index 0e72917..5f88824 100644\n" "> --- a/arch/arm/mach-omap2/omap-secure.h\n" @@ -134,4 +126,4 @@ "Regards,\n" Sricharan -3bb7590b63e02c19ce48615a2d46aa4c83fe45f2d048325acbab7ab14166b936 +6580f96eb45697f39b92650cfdd765562d211b7e02ebcc2680343b15e6f03a12
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