From: Stephen Warren <swarren@wwwdotorg.org>
To: hongbo.zhang@freescale.com
Cc: mark.rutland@arm.com, devicetree@vger.kernel.org,
ian.campbell@citrix.com, pawel.moll@arm.com,
vinod.koul@intel.com, linux-kernel@vger.kernel.org,
rob.herring@calxeda.com, djbw@fb.com,
linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH v10 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes
Date: Mon, 23 Sep 2013 11:04:39 -0600 [thread overview]
Message-ID: <524074A7.7000001@wwwdotorg.org> (raw)
In-Reply-To: <1379499333-4745-3-git-send-email-hongbo.zhang@freescale.com>
On 09/18/2013 04:15 AM, hongbo.zhang@freescale.com wrote:
> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
> the device tree nodes for them.
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> +Required properties:
> +
> +- compatible : must include "fsl,elo3-dma"
> +- reg : DMA General Status Registers, i.e. DGSR0 which contains
> + status for channel 1~4, and DGSR1 for channel 5~8
Is that a single entry, which is large enough to cover both registers,
or a pair of entries, one per register? Reading the text, I might assume
the former, but looking at the examples, it's the latter.
...
+Example:
> +dma@100300 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,elo3-dma";
> + reg = <0x100300 0x4>,
> + <0x100600 0x4>;
WARNING: multiple messages have this Message-ID (diff)
From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org
Cc: rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org,
pawel.moll-5wv7dgnIgG8@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
ian.campbell-Sxgqhf6Nn4DQT0dZR+AlfA@public.gmane.org,
vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
djbw-b10kYP2dOMg@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v10 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes
Date: Mon, 23 Sep 2013 11:04:39 -0600 [thread overview]
Message-ID: <524074A7.7000001@wwwdotorg.org> (raw)
In-Reply-To: <1379499333-4745-3-git-send-email-hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
On 09/18/2013 04:15 AM, hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org wrote:
> From: Hongbo Zhang <hongbo.zhang-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
> the device tree nodes for them.
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> +Required properties:
> +
> +- compatible : must include "fsl,elo3-dma"
> +- reg : DMA General Status Registers, i.e. DGSR0 which contains
> + status for channel 1~4, and DGSR1 for channel 5~8
Is that a single entry, which is large enough to cover both registers,
or a pair of entries, one per register? Reading the text, I might assume
the former, but looking at the examples, it's the latter.
...
+Example:
> +dma@100300 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,elo3-dma";
> + reg = <0x100300 0x4>,
> + <0x100600 0x4>;
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WARNING: multiple messages have this Message-ID (diff)
From: Stephen Warren <swarren@wwwdotorg.org>
To: hongbo.zhang@freescale.com
Cc: rob.herring@calxeda.com, pawel.moll@arm.com,
mark.rutland@arm.com, ian.campbell@citrix.com,
vinod.koul@intel.com, djbw@fb.com, devicetree@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v10 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes
Date: Mon, 23 Sep 2013 11:04:39 -0600 [thread overview]
Message-ID: <524074A7.7000001@wwwdotorg.org> (raw)
In-Reply-To: <1379499333-4745-3-git-send-email-hongbo.zhang@freescale.com>
On 09/18/2013 04:15 AM, hongbo.zhang@freescale.com wrote:
> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>
> Freescale QorIQ T4 and B4 introduce new 8-channel DMA engines, this patch adds
> the device tree nodes for them.
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt
> +Required properties:
> +
> +- compatible : must include "fsl,elo3-dma"
> +- reg : DMA General Status Registers, i.e. DGSR0 which contains
> + status for channel 1~4, and DGSR1 for channel 5~8
Is that a single entry, which is large enough to cover both registers,
or a pair of entries, one per register? Reading the text, I might assume
the former, but looking at the examples, it's the latter.
...
+Example:
> +dma@100300 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,elo3-dma";
> + reg = <0x100300 0x4>,
> + <0x100600 0x4>;
next prev parent reply other threads:[~2013-09-23 17:04 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-18 10:15 [PATCH v10 0/3] DMA: Freescale: Add support for 8-channel DMA engine hongbo.zhang
2013-09-18 10:15 ` hongbo.zhang
2013-09-18 10:15 ` hongbo.zhang-KZfg59tc24xl57MIdRCFDg
2013-09-18 10:15 ` [PATCH v10 1/3] DMA: Freescale: revise device tree binding document hongbo.zhang
2013-09-18 10:15 ` hongbo.zhang
2013-09-18 10:15 ` hongbo.zhang
2013-09-18 10:15 ` [PATCH v10 2/3] DMA: Freescale: Add new 8-channel DMA engine device tree nodes hongbo.zhang
2013-09-18 10:15 ` hongbo.zhang
2013-09-18 10:15 ` hongbo.zhang
2013-09-23 17:04 ` Stephen Warren [this message]
2013-09-23 17:04 ` Stephen Warren
2013-09-23 17:04 ` Stephen Warren
2013-09-24 10:30 ` Hongbo Zhang
2013-09-24 10:30 ` Hongbo Zhang
2013-09-24 10:30 ` Hongbo Zhang
2013-09-24 17:31 ` Stephen Warren
2013-09-24 17:31 ` Stephen Warren
2013-09-24 17:31 ` Stephen Warren
2013-09-25 7:35 ` Hongbo Zhang
2013-09-25 7:35 ` Hongbo Zhang
2013-09-26 1:46 ` Scott Wood
2013-09-26 1:46 ` Scott Wood
2013-09-26 1:46 ` Scott Wood
2013-09-26 2:28 ` David Gibson
2013-09-26 2:28 ` David Gibson
2013-09-26 2:28 ` David Gibson
2013-09-26 5:06 ` Hongbo Zhang
2013-09-26 5:06 ` Hongbo Zhang
2013-09-26 5:06 ` Hongbo Zhang
2013-09-18 10:15 ` [PATCH v10 3/3] DMA: Freescale: update driver to support 8-channel DMA engine hongbo.zhang
2013-09-18 10:15 ` hongbo.zhang
2013-09-18 10:15 ` hongbo.zhang-KZfg59tc24xl57MIdRCFDg
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