[PATCH] MIPS: Add printing of ES bit when cache error occurs.

[PATCH] MIPS: Add printing of ES bit when cache error occurs.

[Markos Chandras]

From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>

Print out the source of request that caused the error (ES bit) when
a cache error exception occurs.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Acked-by: Markos Chandras <markos.chandras@imgtec.com>
---
 arch/mips/kernel/traps.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 08aae2a..840bfcb 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1421,9 +1421,10 @@ asmlinkage void cache_parity_error(void)
 	printk("Decoded c0_cacheerr: %s cache fault in %s reference.\n",
 	       reg_val & (1<<30) ? "secondary" : "primary",
 	       reg_val & (1<<31) ? "data" : "insn");
-	printk("Error bits: %s%s%s%s%s%s%s\n",
+	printk("Error bits: %s%s%s%s%s%s%s%s\n",
 	       reg_val & (1<<29) ? "ED " : "",
 	       reg_val & (1<<28) ? "ET " : "",
+	       reg_val & (1<<27) ? "ES " : "",
 	       reg_val & (1<<26) ? "EE " : "",
 	       reg_val & (1<<25) ? "EB " : "",
 	       reg_val & (1<<24) ? "EI " : "",
-- 
1.8.3.2

[PATCH] MIPS: Add printing of ES bit when cache error occurs.

[Markos Chandras]

From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>

Print out the source of request that caused the error (ES bit) when
a cache error exception occurs.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Acked-by: Markos Chandras <markos.chandras@imgtec.com>
---
 arch/mips/kernel/traps.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index 08aae2a..840bfcb 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -1421,9 +1421,10 @@ asmlinkage void cache_parity_error(void)
 	printk("Decoded c0_cacheerr: %s cache fault in %s reference.\n",
 	       reg_val & (1<<30) ? "secondary" : "primary",
 	       reg_val & (1<<31) ? "data" : "insn");
-	printk("Error bits: %s%s%s%s%s%s%s\n",
+	printk("Error bits: %s%s%s%s%s%s%s%s\n",
 	       reg_val & (1<<29) ? "ED " : "",
 	       reg_val & (1<<28) ? "ET " : "",
+	       reg_val & (1<<27) ? "ES " : "",
 	       reg_val & (1<<26) ? "EE " : "",
 	       reg_val & (1<<25) ? "EB " : "",
 	       reg_val & (1<<24) ? "EI " : "",
-- 
1.8.3.2

Re: [PATCH] MIPS: Add printing of ES bit when cache error occurs.

[Ralf Baechle]

On Mon, Oct 07, 2013 at 10:25:52AM +0100, Markos Chandras wrote:

> From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
> 
> Print out the source of request that caused the error (ES bit) when
> a cache error exception occurs.

The reason ES isn't being printed is that not all processors that support
a cache error exception have an ES bit.  The R4000 has it, R5000 doesn't,
R10000 CacheErr looks rather different - and in fact MIPS32/64 make the
entire register optional and its details implementation specific.

Don't even ask me anymore which processor the implementation in the
kernel is trying to support - probably something R7000ish, at least
that's what guess from the 1385617929e09545f9858785ea3dc1068fedfde1
commit log.

Short of some fancy engineering, I'd suggest throwing in a switch
statement and per processor type printks just as in parity_protection_init.

  Ralf

Re: [PATCH] MIPS: Add printing of ES bit when cache error occurs.

[Markos Chandras]

On 10/08/13 06:06, Ralf Baechle wrote:
> On Mon, Oct 07, 2013 at 10:25:52AM +0100, Markos Chandras wrote:
>
>> From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
>>
>> Print out the source of request that caused the error (ES bit) when
>> a cache error exception occurs.
>
> The reason ES isn't being printed is that not all processors that support
> a cache error exception have an ES bit.  The R4000 has it, R5000 doesn't,
> R10000 CacheErr looks rather different - and in fact MIPS32/64 make the
> entire register optional and its details implementation specific.
>
> Don't even ask me anymore which processor the implementation in the
> kernel is trying to support - probably something R7000ish, at least
> that's what guess from the 1385617929e09545f9858785ea3dc1068fedfde1
> commit log.
>
> Short of some fancy engineering, I'd suggest throwing in a switch
> statement and per processor type printks just as in parity_protection_init.
>
>    Ralf
>
Hi Ralf,

hmm i see. ok i will do that instead.

Re: [PATCH] MIPS: Add printing of ES bit when cache error occurs.

[Markos Chandras]

On 10/08/13 06:06, Ralf Baechle wrote:
> On Mon, Oct 07, 2013 at 10:25:52AM +0100, Markos Chandras wrote:
>
>> From: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
>>
>> Print out the source of request that caused the error (ES bit) when
>> a cache error exception occurs.
>
> The reason ES isn't being printed is that not all processors that support
> a cache error exception have an ES bit.  The R4000 has it, R5000 doesn't,
> R10000 CacheErr looks rather different - and in fact MIPS32/64 make the
> entire register optional and its details implementation specific.
>
> Don't even ask me anymore which processor the implementation in the
> kernel is trying to support - probably something R7000ish, at least
> that's what guess from the 1385617929e09545f9858785ea3dc1068fedfde1
> commit log.
>
> Short of some fancy engineering, I'd suggest throwing in a switch
> statement and per processor type printks just as in parity_protection_init.
>
>    Ralf
>
Hi Ralf,

hmm i see. ok i will do that instead.