From: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
To: Joseph Lo <josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: Re: [PATCH 3/4] ARM: tegra: make tegra_resume can work with current and later chips
Date: Tue, 08 Oct 2013 11:00:20 -0600 [thread overview]
Message-ID: <52543A24.3020108@wwwdotorg.org> (raw)
In-Reply-To: <1381220587-29697-4-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On 10/08/2013 02:23 AM, Joseph Lo wrote:
> Because the CPU0 was the first up and the last down core when cluster
> power up/down or platform suspend. So only CPU0 needs the rest of the
> functions to reset flow controller and re-enable SCU and L2. We also
> move the L2 init function for Cortex-A15 to there. The secondery CPU
> can just call cpu_resume.
Is that really true? I thought that starting with Tegra114, all the CPUs
were independent, so that any CPU could be the last CPU to be
power-gated. Isn't that exactly why we don't need coupled cpuidle or
anything similar on Tegra114
> diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
> not_ca9:
> + mov32 r9, 0xc0f
> + cmp r8, r9
> + bleq tegra_init_l2_for_a15
That's checking whether the CPU type is a Cortex-A15, isn't it? The only
CPUs that exist NVIDIA SoCs are Cortex-A9 and Cortex-A15, so I don't see
why we need to check whether the CPU is a Cortex-A15, given this label
is jumped to only when the CPU isn't a Cortex-A9.
WARNING: multiple messages have this Message-ID (diff)
From: swarren@wwwdotorg.org (Stephen Warren)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 3/4] ARM: tegra: make tegra_resume can work with current and later chips
Date: Tue, 08 Oct 2013 11:00:20 -0600 [thread overview]
Message-ID: <52543A24.3020108@wwwdotorg.org> (raw)
In-Reply-To: <1381220587-29697-4-git-send-email-josephl@nvidia.com>
On 10/08/2013 02:23 AM, Joseph Lo wrote:
> Because the CPU0 was the first up and the last down core when cluster
> power up/down or platform suspend. So only CPU0 needs the rest of the
> functions to reset flow controller and re-enable SCU and L2. We also
> move the L2 init function for Cortex-A15 to there. The secondery CPU
> can just call cpu_resume.
Is that really true? I thought that starting with Tegra114, all the CPUs
were independent, so that any CPU could be the last CPU to be
power-gated. Isn't that exactly why we don't need coupled cpuidle or
anything similar on Tegra114
> diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S
> not_ca9:
> + mov32 r9, 0xc0f
> + cmp r8, r9
> + bleq tegra_init_l2_for_a15
That's checking whether the CPU type is a Cortex-A15, isn't it? The only
CPUs that exist NVIDIA SoCs are Cortex-A9 and Cortex-A15, so I don't see
why we need to check whether the CPU is a Cortex-A15, given this label
is jumped to only when the CPU isn't a Cortex-A9.
next prev parent reply other threads:[~2013-10-08 17:00 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-08 8:23 [PATCH 0/4] ARM: tegra: add CPU hot-plug and idle support for Tegra124 Joseph Lo
2013-10-08 8:23 ` Joseph Lo
[not found] ` <1381220587-29697-1-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-10-08 8:23 ` [PATCH 1/4] clk: tegra124: add wait_for_reset and disable_clock for tegra_cpu_car_ops Joseph Lo
2013-10-08 8:23 ` Joseph Lo
[not found] ` <1381220587-29697-2-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-10-08 16:51 ` Stephen Warren
2013-10-08 16:51 ` Stephen Warren
[not found] ` <5254381E.9060100-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-10-09 2:59 ` Joseph Lo
2013-10-09 2:59 ` Joseph Lo
2013-10-08 8:23 ` [PATCH 2/4] ARM: tegra: CPU hotplug support for Tegra124 Joseph Lo
2013-10-08 8:23 ` Joseph Lo
2013-10-08 8:23 ` [PATCH 3/4] ARM: tegra: make tegra_resume can work with current and later chips Joseph Lo
2013-10-08 8:23 ` Joseph Lo
[not found] ` <1381220587-29697-4-git-send-email-josephl-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2013-10-08 17:00 ` Stephen Warren [this message]
2013-10-08 17:00 ` Stephen Warren
[not found] ` <52543A24.3020108-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-10-09 3:11 ` Joseph Lo
2013-10-09 3:11 ` Joseph Lo
[not found] ` <1381288295.10638.23.camel-yx3yKKdKkHfc7b1ADBJPm0n48jw8i0AO@public.gmane.org>
2013-10-09 8:23 ` Joseph Lo
2013-10-09 8:23 ` Joseph Lo
[not found] ` <1381307002.2200.3.camel-yx3yKKdKkHfc7b1ADBJPm0n48jw8i0AO@public.gmane.org>
2013-10-09 16:04 ` Stephen Warren
2013-10-09 16:04 ` Stephen Warren
2013-10-08 8:23 ` [PATCH 4/4] ARM: tegra: enable CPU idle for Tegra124 Joseph Lo
2013-10-08 8:23 ` Joseph Lo
2013-10-08 9:01 ` [PATCH 0/4] ARM: tegra: add CPU hot-plug and idle support " Joseph Lo
2013-10-08 9:01 ` Joseph Lo
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