From: Suman Anna <s-anna-l0cyMroinI0@public.gmane.org>
To: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Cc: Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Ohad Ben-Cohen <ohad-Ix1uc/W3ht7QT0dZR+AlfA@public.gmane.org>,
Tony Lindgren <tony-4v6yS6AI5VpBDgjK7y7TUQ@public.gmane.org>,
Benoit Cousson <bcousson-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Paul Walmsley <paul-DWxLp4Yu+b8AvxtiuMwx3w@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-omap-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>
Subject: Re: [PATCHv2 2/9] hwspinlock/omap: add support for dt nodes
Date: Thu, 10 Oct 2013 15:29:01 -0500 [thread overview]
Message-ID: <52570E0D.80507@ti.com> (raw)
In-Reply-To: <20131009214638.GB2322@kartoffel>
Hi Mark,
>>
>>> On Fri, Sep 27, 2013 at 05:06:38PM +0100, Kumar Gala wrote:
>>>>
>>>> On Sep 17, 2013, at 2:30 PM, Suman Anna wrote:
>>>>
>>>>> HwSpinlock IP is present only on OMAP4 and other newer SoCs,
>>>>> which are all device-tree boot only. This patch adds the
>>>>> base support for parsing the DT nodes, and removes the code
>>>>> dealing with the traditional platform device instantiation.
>>>>>
>>>>> Signed-off-by: Suman Anna <s-anna-l0cyMroinI0@public.gmane.org>
>>>>> ---
>>>>> .../devicetree/bindings/hwlock/omap-hwspinlock.txt | 31 +++++++++++
>>>>> arch/arm/mach-omap2/Makefile | 3 --
>>>>> arch/arm/mach-omap2/hwspinlock.c | 60 ----------------------
>>>>> drivers/hwspinlock/omap_hwspinlock.c | 23 +++++++--
>>>>> 4 files changed, 50 insertions(+), 67 deletions(-)
>>>>> create mode 100644 Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt
>>>>> delete mode 100644 arch/arm/mach-omap2/hwspinlock.c
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt
>>>>> new file mode 100644
>>>>> index 0000000..235b7c5
>>>>> --- /dev/null
>>>>> +++ b/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt
>>>>> @@ -0,0 +1,31 @@
>>>>> +OMAP4+ HwSpinlock Driver
>>>>> +========================
>>>>> +
>>>>> +Required properties:
>>>>> +- compatible: Currently supports only "ti,omap4-hwspinlock" for
>>>>> + OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
>>>
>>> "Currently supports" is not something I expect to see in a binding
>>> document. That sounds like a description of the driver rather than the
>>> binding.
>>>
>>> How similar are these hardware modules? What are the differences?
>>
>> The IP is almost the same, they all have the same revision id. The
>> number of locks (each represented by a register) though vary from one
>> SoC to another (OMAP4, OMAP5, DRA7 have same number of locks, and
>> AM33xx/AM43xx have a different number). The number of locks is directly
>> read by the driver from a module register. There is no separate .data
>> associated with the of_device_id table, so I used a single compatible
>> property for all the SoCs.
>
> Ok. Probeability is good, it keeps these simpler :)
>
> I think This can be reworded to say "should contain" rather than "currently
> supports only":
>
> - compatible: Should contain "ti,omap4-hwspinlock" for
> OMAP44xx, OMAP54xx, AM33xx, AM43xx, or DRA7xx SoCs
>
> That way the binding allows for a future backwards-compatible variant, and
> doesn't mention the current level of support in Linux.
Yes, that is the change I have made in my current working set as well.
>
>>
>>>
>>>>> +- reg: Contains the hwspinlock register address range (base
>>>>> + address and length)
>>>
>>> Is there only one register bank for the hwlock module?
>>
>> The lock registers start at a certain offset (0x800) within the module
>> register space, and the offsets for various registers are identical
>> between all SoCs.
>
> What are the other registers within the module? Are they shared with other
> devices, or are they simply unused by the hwspinlock driver?
No, they are not shared with other devices. These are like revision
register, and a SYSCONFIG register which is used by the OMAP hwmod
layer. This register definition is in line with other modules on OMAP.
>
>>
>>>
>>>>> +- ti,hwmods: Name of the hwmod associated with the hwspinlock device
>>>>> +
>>>>> +Common hwlock properties:
>>>>> +The following describes the usage of the common hwlock properties (defined in
>>>>> +Documentation/devicetree/bindings/hwlock/hwlock.txt) on OMAP.
>>>>> +
>>>>> +- hwlock-base-id: There are currently no OMAP SoCs with multiple
>>>>> + hwspinlock devices. The OMAP driver uses a default
>>>>> + base id value of 0 for the locks present within the
>>>>> + single hwspinlock device on all SoCs.
>>>
>>>
>>> Driver details should not leak into bindngs...
>>
>> OK, will remove the info on driver details.
>>
>>>
>>> As mentioned in the other patch, I don't think this is the way to handle
>>> this. I think we need a phandle + args representation.
>>
>> This is an optional parameter for now and I was going to revise the
>> description based on comments from Kumar Gala on this thread, but I will
>> wait and adjust this based on the outcome on the first patch.
>
> Ok.
I have removed this property altogether in my current working set. Will
post the v3 of the series soon.
regards
Suman
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WARNING: multiple messages have this Message-ID (diff)
From: Suman Anna <s-anna@ti.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>,
Ohad Ben-Cohen <ohad@wizery.com>,
Tony Lindgren <tony@atomide.com>,
Benoit Cousson <bcousson@baylibre.com>,
Paul Walmsley <paul@pwsan.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCHv2 2/9] hwspinlock/omap: add support for dt nodes
Date: Thu, 10 Oct 2013 15:29:01 -0500 [thread overview]
Message-ID: <52570E0D.80507@ti.com> (raw)
In-Reply-To: <20131009214638.GB2322@kartoffel>
Hi Mark,
>>
>>> On Fri, Sep 27, 2013 at 05:06:38PM +0100, Kumar Gala wrote:
>>>>
>>>> On Sep 17, 2013, at 2:30 PM, Suman Anna wrote:
>>>>
>>>>> HwSpinlock IP is present only on OMAP4 and other newer SoCs,
>>>>> which are all device-tree boot only. This patch adds the
>>>>> base support for parsing the DT nodes, and removes the code
>>>>> dealing with the traditional platform device instantiation.
>>>>>
>>>>> Signed-off-by: Suman Anna <s-anna@ti.com>
>>>>> ---
>>>>> .../devicetree/bindings/hwlock/omap-hwspinlock.txt | 31 +++++++++++
>>>>> arch/arm/mach-omap2/Makefile | 3 --
>>>>> arch/arm/mach-omap2/hwspinlock.c | 60 ----------------------
>>>>> drivers/hwspinlock/omap_hwspinlock.c | 23 +++++++--
>>>>> 4 files changed, 50 insertions(+), 67 deletions(-)
>>>>> create mode 100644 Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt
>>>>> delete mode 100644 arch/arm/mach-omap2/hwspinlock.c
>>>>>
>>>>> diff --git a/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt
>>>>> new file mode 100644
>>>>> index 0000000..235b7c5
>>>>> --- /dev/null
>>>>> +++ b/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt
>>>>> @@ -0,0 +1,31 @@
>>>>> +OMAP4+ HwSpinlock Driver
>>>>> +========================
>>>>> +
>>>>> +Required properties:
>>>>> +- compatible: Currently supports only "ti,omap4-hwspinlock" for
>>>>> + OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs
>>>
>>> "Currently supports" is not something I expect to see in a binding
>>> document. That sounds like a description of the driver rather than the
>>> binding.
>>>
>>> How similar are these hardware modules? What are the differences?
>>
>> The IP is almost the same, they all have the same revision id. The
>> number of locks (each represented by a register) though vary from one
>> SoC to another (OMAP4, OMAP5, DRA7 have same number of locks, and
>> AM33xx/AM43xx have a different number). The number of locks is directly
>> read by the driver from a module register. There is no separate .data
>> associated with the of_device_id table, so I used a single compatible
>> property for all the SoCs.
>
> Ok. Probeability is good, it keeps these simpler :)
>
> I think This can be reworded to say "should contain" rather than "currently
> supports only":
>
> - compatible: Should contain "ti,omap4-hwspinlock" for
> OMAP44xx, OMAP54xx, AM33xx, AM43xx, or DRA7xx SoCs
>
> That way the binding allows for a future backwards-compatible variant, and
> doesn't mention the current level of support in Linux.
Yes, that is the change I have made in my current working set as well.
>
>>
>>>
>>>>> +- reg: Contains the hwspinlock register address range (base
>>>>> + address and length)
>>>
>>> Is there only one register bank for the hwlock module?
>>
>> The lock registers start at a certain offset (0x800) within the module
>> register space, and the offsets for various registers are identical
>> between all SoCs.
>
> What are the other registers within the module? Are they shared with other
> devices, or are they simply unused by the hwspinlock driver?
No, they are not shared with other devices. These are like revision
register, and a SYSCONFIG register which is used by the OMAP hwmod
layer. This register definition is in line with other modules on OMAP.
>
>>
>>>
>>>>> +- ti,hwmods: Name of the hwmod associated with the hwspinlock device
>>>>> +
>>>>> +Common hwlock properties:
>>>>> +The following describes the usage of the common hwlock properties (defined in
>>>>> +Documentation/devicetree/bindings/hwlock/hwlock.txt) on OMAP.
>>>>> +
>>>>> +- hwlock-base-id: There are currently no OMAP SoCs with multiple
>>>>> + hwspinlock devices. The OMAP driver uses a default
>>>>> + base id value of 0 for the locks present within the
>>>>> + single hwspinlock device on all SoCs.
>>>
>>>
>>> Driver details should not leak into bindngs...
>>
>> OK, will remove the info on driver details.
>>
>>>
>>> As mentioned in the other patch, I don't think this is the way to handle
>>> this. I think we need a phandle + args representation.
>>
>> This is an optional parameter for now and I was going to revise the
>> description based on comments from Kumar Gala on this thread, but I will
>> wait and adjust this based on the outcome on the first patch.
>
> Ok.
I have removed this property altogether in my current working set. Will
post the v3 of the series soon.
regards
Suman
next prev parent reply other threads:[~2013-10-10 20:29 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-17 19:30 [PATCHv2 0/9] omap hwspinlock dt support Suman Anna
2013-09-17 19:30 ` Suman Anna
2013-09-17 19:30 ` [PATCHv2 1/9] hwspinlock/core: add common dt bindings and OF helpers Suman Anna
2013-09-17 19:30 ` Suman Anna
2013-09-27 16:04 ` Kumar Gala
2013-09-27 16:04 ` Kumar Gala
[not found] ` <14DB8294-1148-446A-A6D3-34E66BA8732C-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2013-09-27 16:48 ` Suman Anna
2013-09-27 16:48 ` Suman Anna
[not found] ` <5245B6F9.7030505-l0cyMroinI0@public.gmane.org>
2013-09-27 17:14 ` Kumar Gala
2013-09-27 17:14 ` Kumar Gala
[not found] ` <3C582FCF-7A24-48AC-B98B-AF1D18C1E22B-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2013-09-27 19:26 ` Suman Anna
2013-09-27 19:26 ` Suman Anna
2013-10-01 8:36 ` Mark Rutland
2013-10-01 8:36 ` Mark Rutland
2013-10-03 4:04 ` Suman Anna
[not found] ` <524CECBF.2070805-l0cyMroinI0@public.gmane.org>
2013-10-09 21:40 ` Mark Rutland
2013-10-09 21:40 ` Mark Rutland
2013-09-17 19:30 ` [PATCHv2 2/9] hwspinlock/omap: add support for dt nodes Suman Anna
2013-09-17 19:30 ` Suman Anna
2013-09-27 16:06 ` Kumar Gala
2013-09-27 16:06 ` Kumar Gala
2013-09-27 16:21 ` Suman Anna
2013-09-27 16:21 ` Suman Anna
[not found] ` <5245B076.1090008-l0cyMroinI0@public.gmane.org>
2013-09-27 17:14 ` Kumar Gala
2013-09-27 17:14 ` Kumar Gala
[not found] ` <AE597DCC-83D7-4BCD-8990-3D63540F32EA-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2013-10-01 8:40 ` Mark Rutland
2013-10-01 8:40 ` Mark Rutland
2013-10-03 4:12 ` Suman Anna
[not found] ` <524CEE9F.8060407-l0cyMroinI0@public.gmane.org>
2013-10-09 21:46 ` Mark Rutland
2013-10-09 21:46 ` Mark Rutland
2013-10-10 20:29 ` Suman Anna [this message]
2013-10-10 20:29 ` Suman Anna
2013-09-17 19:31 ` [PATCHv2 3/9] ARM: dts: OMAP4: Add hwspinlock node Suman Anna
2013-09-17 19:31 ` Suman Anna
2013-09-17 19:31 ` [PATCHv2 4/9] ARM: OMAP5: hwmod data: Add spinlock data Suman Anna
2013-09-17 19:31 ` Suman Anna
2013-10-09 7:12 ` Paul Walmsley
[not found] ` <alpine.DEB.2.02.1310090712440.30199-rwI8Ez+7Ko+d5PgPZx9QOdBPR1lH4CV8@public.gmane.org>
2013-10-09 17:49 ` Suman Anna
2013-10-09 17:49 ` Suman Anna
2013-09-17 19:31 ` [PATCHv2 5/9] ARM: dts: OMAP5: Add hwspinlock node Suman Anna
2013-09-17 19:31 ` Suman Anna
2013-09-17 19:31 ` [PATCHv2 6/9] hwspinlock/omap: support AM33xx Suman Anna
2013-09-17 19:31 ` Suman Anna
2013-09-17 19:31 ` [PATCHv2 7/9] hwspinlock/omap: enable module before reading SYSSTATUS register Suman Anna
2013-09-17 19:31 ` Suman Anna
2013-09-17 19:31 ` [PATCHv2 8/9] ARM: dts: AM33XX: Add hwspinlock node Suman Anna
2013-09-17 19:31 ` Suman Anna
2013-09-17 19:31 ` [PATCHv2 9/9] ARM: AM33xx: hwmod_data: add the sysc configuration for spinlock Suman Anna
2013-09-17 19:31 ` Suman Anna
2013-10-09 7:12 ` Paul Walmsley
[not found] ` <cover.1379445653.git.s-anna-l0cyMroinI0@public.gmane.org>
2013-09-27 15:48 ` [PATCHv2 0/9] omap hwspinlock dt support Suman Anna
2013-09-27 15:48 ` Suman Anna
[not found] ` <5245A8CA.4020805-l0cyMroinI0@public.gmane.org>
2013-09-30 3:12 ` Paul Walmsley
2013-09-30 3:12 ` Paul Walmsley
[not found] ` <alpine.DEB.2.02.1309300309530.17980-rwI8Ez+7Ko+d5PgPZx9QOdBPR1lH4CV8@public.gmane.org>
2013-09-30 15:56 ` Suman Anna
2013-09-30 15:56 ` Suman Anna
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