Re: [PATCH 0/2] pinctrl: rockchip: Two fixes for latent driver bugs

["Heiko Stübner" <heiko@sntech.de>]

Am Freitag, 7. August 2026, 00:12:51 Mitteleuropäische Sommerzeit schrieb Linus Walleij:
> Hi Simon,
> 
> On Mon, Aug 3, 2026 at 4:10 PM Simon Glass <sjg@chromium.org> wrote:
> 
> > This series contains two small fixes for pre-existing issues in the
> > Rockchip pinctrl driver, found by the sashiko AI review of my RV1106
> > series.
> >
> > The first makes the SoC-data calculation safe when the probe runs
> > more than once due to a probe deferral: the pin count currently
> > accumulates across runs, shifting every bank's pin base. The second
> > aligns the RV1103B drive-type override in the get path with the set
> > path, which restricts it to bank 2.
> >
> > The first fix is tested on a Luckfox Pico Mini B by forcing the
> > probe to defer once: without the fix the second probe doubles the
> > pin count and no GPIO bank comes up, while with it the values are
> > recalculated identically and all banks work. The second is a
> > behavioural no-op until drive-strength decoding is added to the get
> > path, so it is verified by inspection against the set path.
> 
> Patches looks good and the Rockchip maintainers haven't
> commented on the other week-old patches yet so I applied
> these two patches.
> 
> If the maintainers have issues with them I can pull them out.

no issues ...they look correct.

And I'll try to look at the pending new soc pinctrl today.


Heiko