From: Richard Henderson <rth@twiddle.net>
To: Sebastian Macke <sebastian@macke.de>, Max Filippov <jcmvbkbc@gmail.com>
Cc: openrisc@openrisc.net, openrisc@lists.opencores.org,
qemu-devel <qemu-devel@nongnu.org>, Ethan Hunt <proljc@gmail.com>
Subject: Re: [Qemu-devel] [PATCH 03/13] target-openrisc: Separate of load/store instructions
Date: Tue, 29 Oct 2013 14:49:19 -0700 [thread overview]
Message-ID: <52702D5F.2090809@twiddle.net> (raw)
In-Reply-To: <52702A72.8040705@macke.de>
On 10/29/2013 02:36 PM, Sebastian Macke wrote:
>
> The problem is the epcr register in the interrupt routine in which the current
> pc must be saved.
I assume the epcr register is quite predictable based on the insn stream.
One can restore more than just the PC during re-translation.
C.f. the s390 port which also restores CC_OP, and the sparc port which
also restores NPC (next pc).
r~
next prev parent reply other threads:[~2013-10-29 21:49 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-10-29 19:04 [Qemu-devel] [PATCH 00/13] target-openrisc: More optimizations and corrections Sebastian Macke
2013-10-29 19:04 ` [Qemu-devel] [PATCH 01/13] target-openrisc: Implement translation block chaining Sebastian Macke
2013-10-29 19:04 ` [Qemu-devel] [PATCH 02/13] target-openrisc: Separate Delayed slot handling from main loop Sebastian Macke
2013-10-29 19:04 ` [Qemu-devel] [PATCH 03/13] target-openrisc: Separate of load/store instructions Sebastian Macke
2013-10-29 20:05 ` Max Filippov
2013-10-29 21:36 ` Sebastian Macke
2013-10-29 21:49 ` Richard Henderson [this message]
2013-10-29 22:55 ` Max Filippov
2013-10-29 23:37 ` Sebastian Macke
2013-10-29 19:04 ` [Qemu-devel] [PATCH 04/13] target-openrisc: sync flags only when necessary Sebastian Macke
2013-10-29 21:51 ` Richard Henderson
2013-10-29 19:04 ` [Qemu-devel] [PATCH 05/13] target-openrisc: Remove TLB flush on exception Sebastian Macke
2013-10-29 19:47 ` Peter Maydell
2013-10-29 22:41 ` Sebastian Macke
2013-11-01 18:58 ` Peter Maydell
2013-11-02 1:21 ` Richard Henderson
2013-11-06 22:59 ` [Qemu-devel] [Openrisc] " Edgar E. Iglesias
2013-11-02 1:29 ` [Qemu-devel] " Richard Henderson
2013-10-29 19:04 ` [Qemu-devel] [PATCH 06/13] target-openrisc: Remove TLB flush from l.rfe instruction Sebastian Macke
2013-10-29 21:01 ` Max Filippov
2013-10-29 21:53 ` Sebastian Macke
2013-10-29 22:20 ` Max Filippov
2013-10-29 23:14 ` Sebastian Macke
2013-10-29 19:04 ` [Qemu-devel] [PATCH 07/13] target-openrisc: Correct l.cmov conditional check Sebastian Macke
2013-10-29 21:15 ` Max Filippov
2013-10-29 21:23 ` Sebastian Macke
2013-10-29 19:04 ` [Qemu-devel] [PATCH 08/13] target-openrisc: Test for Overflow exception statically Sebastian Macke
2013-10-29 21:25 ` Max Filippov
2013-10-29 22:06 ` Sebastian Macke
2013-10-29 19:04 ` [Qemu-devel] [PATCH 09/13] target-openrisc: Add CPU which neglects Carry and Overflow Flag Sebastian Macke
2013-10-30 18:14 ` Richard Henderson
2013-10-30 19:22 ` Sebastian Macke
2013-10-30 19:31 ` Richard Henderson
2013-10-29 19:04 ` [Qemu-devel] [PATCH 10/13] target-openrisc: Correct target number for 64 bit llseek Sebastian Macke
2013-10-29 19:04 ` [Qemu-devel] [PATCH 11/13] target-openrisc: use jmp_pc as flag variable for branches Sebastian Macke
2013-10-30 18:33 ` Richard Henderson
2013-10-30 19:07 ` Sebastian Macke
2013-10-30 19:32 ` Richard Henderson
2013-10-30 19:47 ` Richard Henderson
2013-10-30 21:08 ` Sebastian Macke
2013-10-30 22:02 ` Richard Henderson
2013-10-31 0:29 ` Sebastian Macke
2013-10-29 19:04 ` [Qemu-devel] [PATCH 12/13] target-openrisc: Add correct gdb information for the pc value Sebastian Macke
2013-10-29 19:04 ` [Qemu-devel] [PATCH 13/13] target-openrisc: Add In-circuit emulator support Sebastian Macke
2013-10-29 19:53 ` [Qemu-devel] [PATCH 00/13] target-openrisc: More optimizations and corrections Peter Maydell
2013-10-29 21:15 ` Max Filippov
2013-10-29 21:22 ` Sebastian Macke
2013-10-31 11:47 ` Jia Liu
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