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From: Arnd Bergmann <arnd@arndb.de>
To: Kumar Gala <galak@codeaurora.org>
Cc: linux-arm-msm@vger.kernel.org,
	Abhimanyu Kapur <abhimany@codeaurora.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, arm@kernel.org,
	devicetree@vger.kernel.org, catalin.marinas@arm.com,
	will.deacon@arm.com
Subject: Re: [RFC PATCH v2 4/4] arm64: qcom: add cpu operations
Date: Fri, 10 Apr 2015 22:57:48 +0200	[thread overview]
Message-ID: <5280857.52XJYGkVLd@wuerfel> (raw)
In-Reply-To: <1428698605-13166-5-git-send-email-galak@codeaurora.org>

On Friday 10 April 2015 15:43:25 Kumar Gala wrote:
> +static int qcom_cpu_boot(unsigned int cpu)
> +{
> +       int ret = 0;
> +
> +       if (per_cpu(cold_boot_done, cpu) == false) {
> +               ret = qcom_unclamp_secondary_arm_cpu(cpu);
> +               if (ret)
> +                       return ret;
> +               per_cpu(cold_boot_done, cpu) = true;
> +       }
> +       return secondary_pen_release(cpu);
> +}
> +

Please add a comment here to explain why you need a two-stage process here,
rather than just booting the CPU without the secondary_pen.

Are you working around a specific silicon bug here?

	Arnd

WARNING: multiple messages have this Message-ID (diff)
From: arnd@arndb.de (Arnd Bergmann)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH v2 4/4] arm64: qcom: add cpu operations
Date: Fri, 10 Apr 2015 22:57:48 +0200	[thread overview]
Message-ID: <5280857.52XJYGkVLd@wuerfel> (raw)
In-Reply-To: <1428698605-13166-5-git-send-email-galak@codeaurora.org>

On Friday 10 April 2015 15:43:25 Kumar Gala wrote:
> +static int qcom_cpu_boot(unsigned int cpu)
> +{
> +       int ret = 0;
> +
> +       if (per_cpu(cold_boot_done, cpu) == false) {
> +               ret = qcom_unclamp_secondary_arm_cpu(cpu);
> +               if (ret)
> +                       return ret;
> +               per_cpu(cold_boot_done, cpu) = true;
> +       }
> +       return secondary_pen_release(cpu);
> +}
> +

Please add a comment here to explain why you need a two-stage process here,
rather than just booting the CPU without the secondary_pen.

Are you working around a specific silicon bug here?

	Arnd

  reply	other threads:[~2015-04-10 20:58 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-04-10 20:43 [RFC PATCH 0/5] Add smp booting support for Qualcomm ARMv8 SoCs Kumar Gala
2015-04-10 20:43 ` Kumar Gala
2015-04-10 20:43 ` [RFC PATCH v2 1/4] firmware: qcom: scm: Split out 32-bit specific SCM code Kumar Gala
2015-04-10 20:43   ` Kumar Gala
2015-04-10 20:43   ` Kumar Gala
2015-04-10 20:43 ` [RFC PATCH v2 2/4] firmware: qcom: scm: Add support for ARM64 SoCs Kumar Gala
2015-04-10 20:43   ` Kumar Gala
     [not found] ` <1428698605-13166-1-git-send-email-galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
2015-04-10 20:43   ` [RFC PATCH v3 3/4] arm64: smp: move the pen to a header file Kumar Gala
2015-04-10 20:43     ` Kumar Gala
2015-04-10 20:43     ` Kumar Gala
2015-04-10 20:43 ` [RFC PATCH v2 4/4] arm64: qcom: add cpu operations Kumar Gala
2015-04-10 20:43   ` Kumar Gala
2015-04-10 20:57   ` Arnd Bergmann [this message]
2015-04-10 20:57     ` Arnd Bergmann

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