[U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules

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* [U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules
@ 2013-11-12 12:14 Stefan Roese
  2013-11-12 12:15 ` [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530 Stefan Roese
                   ` (4 more replies)
  0 siblings, 5 replies; 11+ messages in thread
From: Stefan Roese @ 2013-11-12 12:14 UTC (permalink / raw)
  To: u-boot

From: Tapani Utriainen <tapani@technexion.com>

Add support for TechNexion TAO3530 SoM

This patch has been posted quite a long time ago. I ported it to
the latest mainline U-Boot version. With some additional cleanup
and enhancements.

Signed-off-by: Tapani Utriainen <tapani@technexion.com>
CC: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>
---
 arch/arm/include/asm/mach-types.h  |   1 +
 board/technexion/tao3530/Makefile  |   5 +
 board/technexion/tao3530/tao3530.c | 170 +++++++++++++++++
 board/technexion/tao3530/tao3530.h | 364 +++++++++++++++++++++++++++++++++++++
 boards.cfg                         |   1 +
 include/configs/tao3530.h          | 310 +++++++++++++++++++++++++++++++
 6 files changed, 851 insertions(+)
 create mode 100644 board/technexion/tao3530/Makefile
 create mode 100644 board/technexion/tao3530/tao3530.c
 create mode 100644 board/technexion/tao3530/tao3530.h
 create mode 100644 include/configs/tao3530.h

diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h
index 440b041..cb7604a 100644
--- a/arch/arm/include/asm/mach-types.h
+++ b/arch/arm/include/asm/mach-types.h
@@ -470,6 +470,7 @@ extern unsigned int __machine_arch_type;
 #define MACH_TYPE_EUKREA_CPUIMX35SD    2821
 #define MACH_TYPE_EUKREA_CPUIMX51SD    2822
 #define MACH_TYPE_EUKREA_CPUIMX51      2823
+#define MACH_TYPE_OMAP3_TAO3530        2836
 #define MACH_TYPE_SMDKC210             2838
 #define MACH_TYPE_OMAP3_BRAILLO        2839
 #define MACH_TYPE_SPYPLUG              2840
diff --git a/board/technexion/tao3530/Makefile b/board/technexion/tao3530/Makefile
new file mode 100644
index 0000000..2aff383
--- /dev/null
+++ b/board/technexion/tao3530/Makefile
@@ -0,0 +1,5 @@
+#
+# SPDX-License-Identifier:	GPL-2.0+
+#
+
+obj-y	:= tao3530.o
diff --git a/board/technexion/tao3530/tao3530.c b/board/technexion/tao3530/tao3530.c
new file mode 100644
index 0000000..9482f35
--- /dev/null
+++ b/board/technexion/tao3530/tao3530.c
@@ -0,0 +1,170 @@
+/*
+ * Maintainer :
+ *      Tapani Utriainen <linuxfae@technexion.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
+#include <netdev.h>
+#include <twl4030.h>
+#include <asm/io.h>
+#include <asm/arch/mmc_host_def.h>
+#include <asm/arch/mem.h>
+#include <asm/arch/mux.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/gpio.h>
+#include <asm/gpio.h>
+#include <asm/mach-types.h>
+
+#include <usb.h>
+#include <asm/ehci-omap.h>
+
+#include "tao3530.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int tao3530_revision(void)
+{
+	int ret = 0;
+
+	/* char *label argument is unused in gpio_request() */
+	ret = gpio_request(65, "");
+	if (ret) {
+		printf("Error? GPIO 65 not available\n");
+		goto out;
+	}
+	MUX_VAL(CP(GPMC_WAIT3),	(IEN  | PTU | EN  | M4));
+
+	ret = gpio_request(1, "");
+	if (ret) {
+		printf("Error? GPIO 1 not available\n");
+		goto out2;
+	}
+	MUX_VAL(CP(SYS_CLKREQ), (IEN  | PTU | EN | M4));
+
+	ret = gpio_direction_input(65);
+	if (ret) {
+		printf("Error? GPIO 65 not available for input\n");
+		goto out3;
+	}
+
+	ret =  gpio_direction_input(1);
+	if (ret) {
+		printf("Error? GPIO 1 not available for input\n");
+		goto out3;
+	}
+
+	ret = gpio_get_value(65) << 1 | gpio_get_value(1);
+
+out3:
+	MUX_VAL(CP(SYS_CLKREQ), (IEN  | PTU | EN | M0));
+	gpio_free(1);
+out2:
+	MUX_VAL(CP(GPMC_WAIT3),	(IEN  | PTU | EN  | M0));
+	gpio_free(65);
+out:
+
+	return ret;
+}
+
+/*
+ * Routine: board_init
+ * Description: Early hardware init.
+ */
+int board_init(void)
+{
+	gpmc_init(); /* in SRAM or SDRAM, finish GPMC */
+	/* board id for Linux */
+	gd->bd->bi_arch_number = MACH_TYPE_OMAP3_TAO3530;
+	/* boot param addr */
+	gd->bd->bi_boot_params = (OMAP34XX_SDRC_CS0 + 0x100);
+
+	return 0;
+}
+
+/*
+ * Routine: misc_init_r
+ * Description: Configure board specific parts
+ */
+int misc_init_r(void)
+{
+	struct gpio *gpio5_base = (struct gpio *)OMAP34XX_GPIO5_BASE;
+	struct gpio *gpio6_base = (struct gpio *)OMAP34XX_GPIO6_BASE;
+
+	twl4030_power_init();
+	twl4030_led_init(TWL4030_LED_LEDEN_LEDAON | TWL4030_LED_LEDEN_LEDBON);
+
+	/* Configure GPIOs to output */
+	/* GPIO23 */
+	writel(~(GPIO10 | GPIO8 | GPIO2 | GPIO1), &gpio6_base->oe);
+	writel(~(GPIO31 | GPIO30 | GPIO22 | GPIO21 |
+		 GPIO15 | GPIO14 | GPIO13 | GPIO12), &gpio5_base->oe);
+
+	/* Set GPIOs */
+	writel(GPIO10 | GPIO8 | GPIO2 | GPIO1,
+	       &gpio6_base->setdataout);
+	writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
+	       GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
+
+	dieid_num_r();
+
+	/* Set memory size environment variable, depending on revision */
+	switch (tao3530_revision()) {
+	case 0x2:  /* Rev C1 -- 256MB */
+		 setenv("mem_size", "mem=256M");
+		 break;
+	case 0x3: /* Rev A2/B2 -- 128MB */
+		 setenv("mem_size", "mem=128M");
+		 break;
+	default:
+		 printf("Warning: Unknown TAO3530 rev, setting mem=128M\n");
+	}
+
+	return 0;
+}
+
+/*
+ * Routine: set_muxconf_regs
+ * Description: Setting up the configuration Mux registers specific to the
+ *		hardware. Many pins need to be moved from protect to primary
+ *		mode.
+ */
+void set_muxconf_regs(void)
+{
+	MUX_TAO3530();
+}
+
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+	omap_mmc_init(0, 0, 0, -1, -1);
+
+	return 0;
+}
+#endif
+
+#if defined(CONFIG_USB_EHCI) && !defined(CONFIG_SPL_BUILD)
+/* Call usb_stop() before starting the kernel */
+void show_boot_progress(int val)
+{
+	if (val == BOOTSTAGE_ID_RUN_OS)
+		usb_stop();
+}
+
+static struct omap_usbhs_board_data usbhs_bdata = {
+	.port_mode[0] = OMAP_USBHS_PORT_MODE_UNUSED,
+	.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
+	.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED
+};
+
+int ehci_hcd_init(int index, enum usb_init_type init,
+		  struct ehci_hccr **hccr, struct ehci_hcor **hcor)
+{
+	return omap_ehci_hcd_init(index, &usbhs_bdata, hccr, hcor);
+}
+
+int ehci_hcd_stop(int index)
+{
+	return omap_ehci_hcd_stop();
+}
+#endif /* CONFIG_USB_EHCI */
diff --git a/board/technexion/tao3530/tao3530.h b/board/technexion/tao3530/tao3530.h
new file mode 100644
index 0000000..1ea767d
--- /dev/null
+++ b/board/technexion/tao3530/tao3530.h
@@ -0,0 +1,364 @@
+/*
+ * (C) Copyright TechNexion 2010
+ * Edward Lin <linuxfae@technexion.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#ifndef _TAO3530_H_
+#define _TAO3530_H_
+
+const omap3_sysinfo sysinfo = {
+	DDR_STACKED,
+	"OMAP3 TAO-3530 board",
+	"NAND",
+};
+
+/*
+ * IEN  - Input Enable
+ * IDIS - Input Disable
+ * PTD  - Pull type Down
+ * PTU  - Pull type Up
+ * DIS  - Pull type selection is inactive
+ * EN   - Pull type selection is active
+ * M0   - Mode 0
+ * The commented string gives the final mux configuration for that pin
+ */
+#define MUX_TAO3530() \
+ /*SDRC*/\
+	MUX_VAL(CP(SDRC_D0),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D1),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D2),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D3),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D4),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D5),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D6),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D7),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D8),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D9),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D10),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D11),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D12),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D13),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D14),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D15),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D16),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D17),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D18),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D19),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D20),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D21),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D22),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D23),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D24),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D25),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D26),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D27),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D28),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D29),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D30),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_D31),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_CLK),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_DQS0),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_DQS1),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_DQS2),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_DQS3),	(IEN  | PTD | DIS | M0)) \
+ /*GPMC*/\
+	MUX_VAL(CP(GPMC_A1),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_A2),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_A3),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_A4),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_A5),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_A6),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_A7),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_A8),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_A9),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_A10),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D0),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D1),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D2),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D3),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D4),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D5),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D6),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D7),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D8),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D9),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D10),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D11),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D12),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D13),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D14),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_D15),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_NCS0),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_NCS1),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_NCS2),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_NCS3),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_NCS4),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_NCS5),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_NCS6),	(IEN  | PTD | EN | M0)) \
+	MUX_VAL(CP(GPMC_NCS7),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_CLK),	(IDIS | PTU | EN | M0)) \
+	MUX_VAL(CP(GPMC_NADV_ALE), (IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(GPMC_NOE),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(GPMC_NWE),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(GPMC_NBE0_CLE), (IDIS | PTU | EN | M0)) \
+	MUX_VAL(CP(GPMC_NBE1),	(IEN  | PTU | EN | M0)) \
+	MUX_VAL(CP(GPMC_NWP),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(GPMC_WAIT0),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_WAIT1),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_WAIT2),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(GPMC_WAIT3),	(IEN  | PTU | EN  | M0)) \
+ /*DSS*/\
+	MUX_VAL(CP(DSS_PCLK),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_HSYNC),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_VSYNC),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_ACBIAS),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA0),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA1),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA2),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA3),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA4),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA5),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA6),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA7),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA8),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA9),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA10),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA11),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA12),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA13),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA14),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA15),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA16),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA17),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA18),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA19),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA20),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA21),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA22),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(DSS_DATA23),	(IDIS | PTD | DIS | M0)) \
+ /*CAMERA*/\
+	MUX_VAL(CP(CAM_HS),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(CAM_VS),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(CAM_XCLKA),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_PCLK),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(CAM_FLD),	(IDIS | PTD | DIS | M4)) \
+ /* - CAM_RESET*/\
+	MUX_VAL(CP(CAM_D0),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_D1),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_D2),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_D3),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_D4),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_D5),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_D6),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_D7),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_D8),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_D9),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_D10),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_D11),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_XCLKB),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(CAM_WEN),	(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(CAM_STROBE),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(CSI2_DX0),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CSI2_DY0),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CSI2_DX1),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(CSI2_DY1),	(IEN  | PTD | DIS | M0)) \
+ /*Audio Interface */\
+	MUX_VAL(CP(MCBSP2_FSX),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(MCBSP2_CLKX), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(MCBSP2_DR),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(MCBSP2_DX),	(IDIS | PTD | DIS | M0)) \
+ /*Expansion card */\
+	MUX_VAL(CP(MMC1_CLK),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC1_CMD),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC1_DAT0),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC1_DAT1),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC1_DAT2),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC1_DAT3),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC1_DAT4),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC1_DAT5),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC1_DAT6),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC1_DAT7),	(IEN  | PTU | EN  | M0)) \
+ /* MMC2 WLAN */\
+	MUX_VAL(CP(MMC2_CLK),	(IEN  | PTD | DIS  | M0)) \
+	MUX_VAL(CP(MMC2_CMD),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC2_DAT0),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC2_DAT1),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC2_DAT2),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC2_DAT3),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(MMC2_DAT4),	(IEN  | PTU | EN  | M4)) \
+	MUX_VAL(CP(MMC2_DAT5),	(IEN  | PTU | EN  | M4)) \
+	MUX_VAL(CP(MMC2_DAT6),	(IDIS  | PTD | EN  | M4)) \
+	MUX_VAL(CP(MMC2_DAT7),	(IDIS  | PTU | EN  | M4)) \
+ /*Bluetooth*/\
+	MUX_VAL(CP(MCBSP3_DX),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(MCBSP3_DR),	(IEN  | PTD | DIS | M0)) \
+ /*LocalBus LAN Reset*/\
+	MUX_VAL(CP(MCBSP3_CLKX), (IEN  | PTD | DIS | M4)) \
+ /*LocalBus LAN IRQ*/\
+	MUX_VAL(CP(MCBSP3_FSX),	(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(UART2_CTS),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(UART2_RTS),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(UART2_TX),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(UART2_RX),	(IEN  | PTD | DIS | M0)) \
+ /*Modem Interface */\
+	MUX_VAL(CP(UART1_TX),	(IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(UART1_RTS),	(IDIS | PTD | DIS | M0))  \
+	MUX_VAL(CP(UART1_CTS),	(IEN  | PTU | DIS | M0))  \
+	MUX_VAL(CP(UART1_RX),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(MCBSP4_CLKX), (IEN  | PTD | DIS | M1)) \
+	MUX_VAL(CP(MCBSP4_DR),	(IEN  | PTD | DIS | M1)) \
+	MUX_VAL(CP(MCBSP4_DX),	(IEN  | PTD | DIS | M1)) \
+	MUX_VAL(CP(MCBSP4_FSX),	(IEN  | PTD | DIS | M1)) \
+	MUX_VAL(CP(MCBSP1_CLKR),     (IEN | PTD | DIS | M1)) \
+	MUX_VAL(CP(MCBSP1_FSR),	(IDIS | PTU | EN  | M4)) \
+	MUX_VAL(CP(MCBSP1_DX),	(IEN | PTD | DIS | M1)) \
+	MUX_VAL(CP(MCBSP1_DR),		(IEN | PTD | DIS | M1)) \
+	MUX_VAL(CP(MCBSP_CLKS),	(IEN  | PTU | DIS | M0)) \
+	MUX_VAL(CP(MCBSP1_FSX),	(IEN | PTD | EN | M1)) \
+	MUX_VAL(CP(MCBSP1_CLKX), (IEN | PTU | EN | M4)) \
+ /*Serial Interface*/\
+	MUX_VAL(CP(UART3_CTS_RCTX), (IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(UART3_RTS_SD), (IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(UART3_RX_IRRX), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(UART3_TX_IRTX), (IDIS | PTD | DIS | M0)) \
+	MUX_VAL(CP(HSUSB0_CLK),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(HSUSB0_STP),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(HSUSB0_DIR),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(HSUSB0_NXT),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(HSUSB0_DATA0), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(HSUSB0_DATA1), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(HSUSB0_DATA2), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(HSUSB0_DATA3), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(HSUSB0_DATA4), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(HSUSB0_DATA5), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(HSUSB0_DATA6), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(HSUSB0_DATA7), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(I2C1_SCL),	(IEN  | PTU | EN | M0)) \
+	MUX_VAL(CP(I2C1_SDA),	(IEN  | PTU | EN | M0)) \
+	MUX_VAL(CP(I2C2_SCL),	(IEN  | PTU | EN | M0)) \
+	MUX_VAL(CP(I2C2_SDA),	(IEN  | PTU | EN | M0)) \
+	MUX_VAL(CP(I2C3_SCL),	(IEN  | PTU | EN | M0)) \
+	MUX_VAL(CP(I2C3_SDA),	(IEN  | PTU | EN | M0)) \
+	MUX_VAL(CP(I2C4_SCL),	(IEN  | PTU | EN | M0)) \
+	MUX_VAL(CP(I2C4_SDA),	(IEN  | PTU | EN | M0)) \
+	MUX_VAL(CP(HDQ_SIO),	(IEN  | PTU | EN | M0)) \
+	MUX_VAL(CP(MCSPI1_CLK),	(IEN  | PTD | EN | M0)) \
+	MUX_VAL(CP(MCSPI1_SIMO), (IEN | PTD | EN | M0)) \
+	MUX_VAL(CP(MCSPI1_SOMI), (IEN | PTD | EN | M0)) \
+	MUX_VAL(CP(MCSPI1_CS0),	(IEN  | PTD | EN | M0)) \
+	MUX_VAL(CP(MCSPI1_CS1),	(IEN  | PTD | EN | M0)) \
+	MUX_VAL(CP(MCSPI1_CS2),	(IEN  | PTD | EN | M4)) \
+ /* USB EHCI (port 2) */\
+	MUX_VAL(CP(MCSPI1_CS3),	(IEN  | PTU | DIS | M3)) \
+	MUX_VAL(CP(MCSPI2_CLK),	(IEN  | PTU | DIS | M3)) \
+	MUX_VAL(CP(MCSPI2_SIMO), (IEN | PTU | DIS | M3)) \
+	MUX_VAL(CP(MCSPI2_SOMI), (IEN | PTU | DIS | M3)) \
+	MUX_VAL(CP(MCSPI2_CS0),	(IEN  | PTU | DIS | M3)) \
+	MUX_VAL(CP(MCSPI2_CS1),	(IEN  | PTU | DIS | M3)) \
+ /*Control and debug */\
+	MUX_VAL(CP(SYS_32K),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SYS_CLKREQ),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SYS_NIRQ),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(SYS_BOOT0),	(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(SYS_BOOT1),	(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(SYS_BOOT2),	(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(SYS_BOOT3),	(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(SYS_BOOT4),	(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(SYS_BOOT5),	(IEN  | PTD | DIS | M4)) \
+	MUX_VAL(CP(SYS_BOOT6),	(IDIS | PTD | DIS | M4))  \
+	/* - VIO_1V8*/\
+	MUX_VAL(CP(SYS_OFF_MODE), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SYS_CLKOUT1), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SYS_CLKOUT2), (IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(JTAG_nTRST),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(JTAG_TCK),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(JTAG_TMS),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(JTAG_TDI),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(JTAG_EMU0),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(JTAG_EMU1),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTU | EN  | M4)) \
+	MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M4)) \
+	MUX_VAL(CP(ETK_D0_ES2),	(IEN  | PTU | DIS | M1)) \
+	MUX_VAL(CP(ETK_D1_ES2),	(IEN  | PTU | DIS | M1)) \
+	MUX_VAL(CP(ETK_D2_ES2),	(IEN  | PTU | DIS | M1)) \
+	MUX_VAL(CP(ETK_D3_ES2),	(IEN  | PTU | DIS | M1)) \
+	MUX_VAL(CP(ETK_D4_ES2),	(IEN  | PTU | EN | M4)) \
+	MUX_VAL(CP(ETK_D5_ES2),	(IEN  | PTU | EN | M4)) \
+	MUX_VAL(CP(ETK_D6_ES2),	(IEN  | PTU | EN | M4)) \
+	MUX_VAL(CP(ETK_D7_ES2),	(IEN  | PTU | DIS | M1)) \
+	MUX_VAL(CP(ETK_D8_ES2),	(IEN  | PTU | EN | M4)) \
+	MUX_VAL(CP(ETK_D9_ES2),	(IEN  | PTD | EN | M4)) \
+	MUX_VAL(CP(ETK_D10_ES2), (IDIS | PTU | DIS | M3)) \
+	MUX_VAL(CP(ETK_D11_ES2), (IDIS | PTU | DIS | M3)) \
+	MUX_VAL(CP(ETK_D12_ES2), (IEN  | PTU | DIS | M3)) \
+	MUX_VAL(CP(ETK_D13_ES2), (IEN  | PTU | DIS | M3)) \
+	MUX_VAL(CP(ETK_D14_ES2), (IEN|PTU|DIS|M3)) \
+	MUX_VAL(CP(ETK_D15_ES2), (IEN  | PTU | DIS | M3)) \
+	MUX_VAL(CP(D2D_MCAD1),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD2),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD3),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD4),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD5),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD6),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD7),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD8),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD9),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD10),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD11),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD12),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD13),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD14),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD15),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD16),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD17),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD18),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD19),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD20),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD21),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD22),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD23),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD24),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD25),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD26),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD27),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD28),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD29),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD30),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD31),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD32),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD33),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD34),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD35),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_MCAD36),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_CLK26MI), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_NRESPWRON), (IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_NRESWARM), (IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(D2D_ARM9NIRQ), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_UMA2P6FIQ), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_SPINT),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_FRINT),	(IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_DMAREQ0), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_DMAREQ1), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_DMAREQ2), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_DMAREQ3), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_N3GTRST), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_N3GTDI),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_N3GTDO),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_N3GTMS),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_N3GTCK),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_N3GRTCK), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_MSTDBY),	(IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(D2D_SWAKEUP), (IEN  | PTD | EN  | M0)) \
+	MUX_VAL(CP(D2D_IDLEREQ), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_IDLEACK), (IEN  | PTU | EN  | M0)) \
+	MUX_VAL(CP(D2D_MWRITE),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_SWRITE),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_MREAD),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_SREAD),	(IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_MBUSFLAG), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(D2D_SBUSFLAG), (IEN  | PTD | DIS | M0)) \
+	MUX_VAL(CP(SDRC_CKE0),	(IDIS | PTU | EN  | M0)) \
+	MUX_VAL(CP(SDRC_CKE1),	(IDIS | PTU | EN  | M0))
+
+#endif
diff --git a/boards.cfg b/boards.cfg
index caba64e..d72be99 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -325,6 +325,7 @@ Active  arm         armv7          omap3       logicpd         zoom1
 Active  arm         armv7          omap3       logicpd         zoom2               omap3_zoom2                          -                                                                                                                                 Tom Rix <Tom.Rix@windriver.com>
 Active  arm         armv7          omap3       matrix_vision   mvblx               omap3_mvblx                          -                                                                                                                                 Michael Jones <michael.jones@matrix-vision.de>
 Active  arm         armv7          omap3       nokia           rx51                nokia_rx51                           -                                                                                                                                 Pali Roh?r <pali.rohar@gmail.com>
+Active  arm         armv7          omap3       technexion      tao3530             tao3530                              -                                                                                                                                 Tapani Utriainen <linuxfae@technexion.com>
 Active  arm         armv7          omap3       technexion      twister             twister                              -                                                                                                                                 Stefano Babic <sbabic@denx.de>
 Active  arm         armv7          omap3       teejet          mt_ventoux          mt_ventoux                           -                                                                                                                                 Stefano Babic <sbabic@denx.de>
 Active  arm         armv7          omap3       ti              am3517crane         am3517_crane                         -                                                                                                                                 Nagendra T S  <nagendra@mistralsolutions.com>
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
new file mode 100644
index 0000000..6327161
--- /dev/null
+++ b/include/configs/tao3530.h
@@ -0,0 +1,310 @@
+/*
+ * Configuration settings for the TechNexion TAO-3530 SOM
+ * equipped on Thunder baseboard.
+ *
+ * Edward Lin <linuxfae@technexion.com>
+ * Tapani Utriainen <linuxfae@technexion.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_ARMV7			/* This is an ARM V7 CPU core */
+#define CONFIG_OMAP			/* in a TI OMAP core */
+#define CONFIG_OMAP34XX			/* which is a 34XX */
+#define CONFIG_OMAP3430			/* which is in a 3430 */
+#define CONFIG_OMAP3_TAO3530		/* working with TAO-3530 */
+#define CONFIG_OMAP_GPIO
+#define CONFIG_OMAP_COMMON
+
+#define CONFIG_SDRC			/* Has an SDRC controller */
+
+#include <asm/arch/cpu.h>		/* get chip and board defs */
+#include <asm/arch/omap3.h>
+
+/*
+ * Display CPU and Board information
+ */
+#define CONFIG_DISPLAY_CPUINFO
+#define CONFIG_DISPLAY_BOARDINFO
+
+/* Clock Defines */
+#define V_OSCK			26000000	/* Clock output from T2 */
+#define V_SCLK			(V_OSCK >> 1)
+
+#undef CONFIG_USE_IRQ				/* no support for IRQs */
+#define CONFIG_MISC_INIT_R
+
+#define CONFIG_OF_LIBFDT
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_REVISION_TAG
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
+						/* Sector */
+#define CONFIG_SYS_MALLOC_LEN		(4 << 20)
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * NS16550 Configuration
+ */
+#define V_NS16550_CLK			48000000	/* 48MHz (APLL96/2) */
+
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
+#define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_CONS_INDEX		3
+#define CONFIG_SYS_NS16550_COM3		OMAP34XX_UART3
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
+					115200}
+#define CONFIG_GENERIC_MMC
+#define CONFIG_MMC
+#define CONFIG_OMAP_HSMMC
+#define CONFIG_DOS_PARTITION
+
+/* commands to include */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_EXT2		/* EXT2 Support			*/
+#define CONFIG_CMD_FAT		/* FAT support			*/
+#define CONFIG_CMD_MTDPARTS	/* Enable MTD parts commands */
+#define CONFIG_MTD_DEVICE	/* needed for mtdparts commands */
+#define MTDIDS_DEFAULT			"nand0=nand"
+#define MTDPARTS_DEFAULT		"mtdparts=nand:512k(x-loader),"\
+					"1920k(u-boot),128k(u-boot-env),"\
+					"4m(kernel),-(fs)"
+
+#define CONFIG_CMD_I2C		/* I2C serial bus support	*/
+#define CONFIG_CMD_MMC		/* MMC support			*/
+#define CONFIG_CMD_NAND		/* NAND support			*/
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+
+#undef CONFIG_CMD_FLASH		/* flinfo, erase, protect	*/
+#undef CONFIG_CMD_FPGA		/* FPGA configuration Support	*/
+#undef CONFIG_CMD_IMI		/* iminfo			*/
+#undef CONFIG_CMD_IMLS		/* List all found images	*/
+
+#define CONFIG_SYS_NO_FLASH
+#define CONFIG_HARD_I2C
+#define CONFIG_SYS_I2C_SPEED		400000
+#define CONFIG_SYS_I2C_SLAVE		1
+#define CONFIG_SYS_I2C_BUS		0
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_DRIVER_OMAP34XX_I2C
+
+/*
+ * TWL4030
+ */
+#define CONFIG_TWL4030_POWER
+#define CONFIG_TWL4030_LED
+
+/*
+ * Board NAND Info.
+ */
+#define CONFIG_SYS_NAND_QUIET_TEST
+#define CONFIG_NAND_OMAP_GPMC
+#define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
+							/* to access nand */
+#define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
+							/* to access nand at */
+							/* CS0 */
+#define GPMC_NAND_ECC_LP_x16_LAYOUT
+
+#define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of NAND */
+							/* devices */
+/* Environment information */
+#define CONFIG_BOOTDELAY		3
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"loadaddr=0x82000000\0" \
+	"console=ttyO2,115200n8\0" \
+	"mpurate=600\0" \
+	"dvi_mode=omapfb.mode=dvi:1280x720-24 at 60\0" \
+	"tv_mode=omapfb.mode=tv:ntsc\0" \
+	"video_mode=omapdss.def_disp=lcd vram=6M omapfb.vram=0:2M,1:2M,2:2M\0" \
+	"lcd_mode=omapfb.mode=lcd:800x480 at 60 \0" \
+	"extra_options= \0" \
+	"mem_size=mem=128M \0" \
+	"mmcdev=0\0" \
+	"mmcroot=/dev/mmcblk0p2 rw\0" \
+	"mmcrootfstype=ext3 rootwait\0" \
+	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
+	"nandrootfstype=ubifs\0" \
+	"mmcargs=setenv bootargs console=${console} " \
+		"${mem_size} " \
+		"mpurate=${mpurate} " \
+		"${video_mode} " \
+		"root=${mmcroot} " \
+		"rootfstype=${mmcrootfstype} " \
+		"${extra_options}\0" \
+	"nandargs=setenv bootargs console=${console} " \
+		"${mem_size} " \
+		"mpurate=${mpurate} " \
+		"${video_mode} " \
+		"${network_setting} " \
+		"root=${nandroot} " \
+		"rootfstype=${nandrootfstype} "\
+		"${extra_options}\0" \
+	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
+	"bootscript=echo Running bootscript from mmc ...; " \
+		"source ${loadaddr}\0" \
+	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
+	"mmcboot=echo Booting from mmc ...; " \
+		"run mmcargs; " \
+		"bootm ${loadaddr}\0" \
+	"nandboot=echo Booting from nand ...; " \
+		"run nandargs; " \
+		"nand read ${loadaddr} 280000 400000; " \
+		"bootm ${loadaddr}\0" \
+
+#define CONFIG_BOOTCOMMAND \
+	"if mmc rescan ${mmcdev}; then " \
+		"if run loadbootscript; then " \
+			"run bootscript; " \
+		"else " \
+			"if run loaduimage; then " \
+				"run mmcboot; " \
+			"else run nandboot; " \
+			"fi; " \
+		"fi; " \
+	"else run nandboot; fi"
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CONFIG_SYS_LONGHELP		/* undef to save memory */
+#define CONFIG_SYS_HUSH_PARSER		/* use "hush" command parser */
+#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "
+#define CONFIG_SYS_PROMPT		"TAO-3530 # "
+#define CONFIG_SYS_CBSIZE		256	/* Console I/O Buffer Size */
+
+/* turn on command-line edit/hist/auto */
+#define CONFIG_CMDLINE_EDITING
+#define CONFIG_COMMAND_HISTORY
+#define CONFIG_AUTO_COMPLETE
+#define CONFIG_AUTOCOMPLETE
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+#define CONFIG_SYS_MAXARGS		16	/* max number of command args */
+/* Boot Argument Buffer Size */
+#define CONFIG_SYS_BARGSIZE		(CONFIG_SYS_CBSIZE)
+
+#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)	/* memtest */
+								/* works on */
+#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
+					0x01F00000) /* 31MB */
+
+#define CONFIG_SYS_LOAD_ADDR		(OMAP34XX_SDRC_CS0)	/* default */
+							/* load address */
+#define CONFIG_SYS_TEXT_BASE           0x80008000
+
+/*
+ * OMAP3 has 12 GP timers, they can be driven by the system clock
+ * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
+ * This rate is divided by a local divisor.
+ */
+#define CONFIG_SYS_TIMERBASE		(OMAP34XX_GPT2)
+#define CONFIG_SYS_PTV			2       /* Divisor: 2^(PTV+1) => 8 */
+#define CONFIG_SYS_HZ			1000
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE	(128 << 10)	/* regular stack 128 KiB */
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS	2	/* CS1 may or may not be populated */
+#define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
+#define PHYS_SDRAM_1_SIZE	(32 << 20)	/* at least 32 MiB */
+#define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
+
+/*
+ * FLASH and environment organization
+ */
+
+/* **** PISMO SUPPORT *** */
+
+/* Configure the PISMO */
+#define PISMO1_NAND_SIZE		GPMC_SIZE_128M
+#define PISMO1_ONEN_SIZE		GPMC_SIZE_128M
+
+#define CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* Reserve 2 sectors */
+#define CONFIG_SYS_FLASH_BASE		PISMO1_NAND_BASE
+
+/* Monitor@start of flash */
+#define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_ONENAND_BASE		ONENAND_MAP
+
+#define CONFIG_ENV_IS_IN_NAND		1
+#define ONENAND_ENV_OFFSET		0x260000 /* environment starts here */
+#define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
+
+#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)
+#define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
+#define CONFIG_ENV_ADDR			CONFIG_ENV_OFFSET
+
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
+#define CONFIG_SYS_INIT_RAM_SIZE	0x800
+#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
+					 CONFIG_SYS_INIT_RAM_SIZE - \
+					 GENERATED_GBL_DATA_SIZE)
+
+#define CONFIG_OMAP3_SPI
+
+/*
+ * USB
+ *
+ * Currently only EHCI is enabled, the MUSB OTG controller
+ * is not enabled.
+ */
+
+/* USB EHCI */
+#define CONFIG_CMD_USB
+#define CONFIG_USB_EHCI
+#define CONFIG_USB_EHCI_OMAP
+#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO	162
+
+#define CONFIG_USB_ULPI
+#define CONFIG_USB_ULPI_VIEWPORT_OMAP
+
+#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
+#define CONFIG_USB_HOST_ETHER
+#define CONFIG_USB_ETHER_SMSC95XX
+
+#define CONFIG_USB_ETHER
+#define CONFIG_USB_ETHER_RNDIS
+#define CONFIG_USB_STORAGE
+#define CONGIG_CMD_STORAGE
+
+#endif /* __CONFIG_H */
-- 
1.8.4.3

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530
  2013-11-12 12:14 [U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules Stefan Roese
@ 2013-11-12 12:15 ` Stefan Roese
  2013-11-14  8:55   ` Tapani Utriainen
  2013-11-14 17:18   ` Tom Rini
  2013-11-12 12:15 ` [U-Boot] [PATCH 3/5] arm: omap3: Remove bootargs mem_size handling Stefan Roese
                   ` (3 subsequent siblings)
  4 siblings, 2 replies; 11+ messages in thread
From: Stefan Roese @ 2013-11-12 12:15 UTC (permalink / raw)
  To: u-boot

Add SPL support for the Technexion TAO3530 SOM to replace
x-loader. Tested with the Thunder baseboard. Currently this is
only tested with the TAO3530 SOM revision (Ax/Bx).

Tested by booting via MMC and NAND.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>
---
 board/technexion/tao3530/tao3530.c | 27 +++++++++++++++-
 include/configs/tao3530.h          | 64 ++++++++++++++++++++++++++++++++++++++
 2 files changed, 90 insertions(+), 1 deletion(-)

diff --git a/board/technexion/tao3530/tao3530.c b/board/technexion/tao3530/tao3530.c
index 9482f35..7cf5aa6 100644
--- a/board/technexion/tao3530/tao3530.c
+++ b/board/technexion/tao3530/tao3530.c
@@ -67,6 +67,31 @@ out:
 	return ret;
 }
 
+#ifdef CONFIG_SPL_BUILD
+/*
+ * Routine: get_board_mem_timings
+ * Description: If we use SPL then there is no x-loader nor config header
+ * so we have to setup the DDR timings ourself on both banks.
+ */
+void get_board_mem_timings(struct board_sdrc_timings *timings)
+{
+	if (tao3530_revision() < 3) {
+		/* 256MB / Bank */
+		timings->mcfg = MCFG(256 << 20, 14);	/* RAS-width 14 */
+		timings->ctrla = HYNIX_V_ACTIMA_165;
+		timings->ctrlb = HYNIX_V_ACTIMB_165;
+	} else {
+		/* 128MB / Bank */
+		timings->mcfg = MCFG(128 << 20, 13);	/* RAS-width 13 */
+		timings->ctrla = MICRON_V_ACTIMA_165;
+		timings->ctrlb = MICRON_V_ACTIMB_165;
+	}
+
+	timings->mr = MICRON_V_MR_165;
+	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
+}
+#endif
+
 /*
  * Routine: board_init
  * Description: Early hardware init.
@@ -134,7 +159,7 @@ void set_muxconf_regs(void)
 	MUX_TAO3530();
 }
 
-#ifdef CONFIG_GENERIC_MMC
+#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
 int board_mmc_init(bd_t *bis)
 {
 	omap_mmc_init(0, 0, 0, -1, -1);
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 6327161..03eb85e 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -5,6 +5,8 @@
  * Edward Lin <linuxfae@technexion.com>
  * Tapani Utriainen <linuxfae@technexion.com>
  *
+ * Copyright (C) 2013 Stefan Roese <sr@denx.de>
+ *
  * SPDX-License-Identifier:	GPL-2.0+
  */
 
@@ -307,4 +309,66 @@
 #define CONFIG_USB_STORAGE
 #define CONGIG_CMD_STORAGE
 
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_FRAMEWORK
+#define CONFIG_SPL_NAND_SIMPLE
+
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
+#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
+
+#define CONFIG_SPL_BOARD_INIT
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_MMC_SUPPORT
+#define CONFIG_SPL_FAT_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_NAND_BASE
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_ECC
+#define CONFIG_SPL_GPIO_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_OMAP3_ID_NAND
+#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_5_ADDR_CYCLE
+#define CONFIG_SYS_NAND_PAGE_COUNT	64
+#define CONFIG_SYS_NAND_PAGE_SIZE	2048
+#define CONFIG_SYS_NAND_OOBSIZE		64
+#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
+/*
+ * Use the ECC/OOB layout from omap_gpmc.h that matches your chip:
+ * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT
+ */
+#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
+					 10, 11, 12, 13 }
+#define CONFIG_SYS_NAND_ECCSIZE		512
+#define CONFIG_SYS_NAND_ECCBYTES	3
+
+#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
+
+#define CONFIG_SPL_TEXT_BASE		0x40200800
+#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
+#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
+
+/*
+ * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
+ * older x-loader implementations. And move the BSS area so that it
+ * doesn't overlap with TEXT_BASE.
+ */
+#define CONFIG_SYS_TEXT_BASE		0x80008000
+#define CONFIG_SPL_BSS_START_ADDR	0x80100000
+#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
+
+#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
+#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
+
 #endif /* __CONFIG_H */
-- 
1.8.4.3

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530
  2013-11-12 12:15 ` [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530 Stefan Roese
@ 2013-11-14  8:55   ` Tapani Utriainen
  2013-11-14 17:18   ` Tom Rini
  1 sibling, 0 replies; 11+ messages in thread
From: Tapani Utriainen @ 2013-11-14  8:55 UTC (permalink / raw)
  To: u-boot


SPL works also on TAO-3530 rev Cx (using mmc and Tsunami baseboard).

Tested-by: Tapani Utriainen <tapani@technexion.com>

On Tue, 12 Nov 2013 13:15:00 +0100
Stefan Roese <sr@denx.de> wrote:

> Add SPL support for the Technexion TAO3530 SOM to replace
> x-loader. Tested with the Thunder baseboard. Currently this is
> only tested with the TAO3530 SOM revision (Ax/Bx).
> 
> Tested by booting via MMC and NAND.
> 
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Tapani Utriainen <tapani@technexion.com>
> Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
> Cc: Tom Rini <trini@ti.com>
> ---
>  board/technexion/tao3530/tao3530.c | 27 +++++++++++++++-
>  include/configs/tao3530.h          | 64 ++++++++++++++++++++++++++++++++++++++
>  2 files changed, 90 insertions(+), 1 deletion(-)
> 
> diff --git a/board/technexion/tao3530/tao3530.c b/board/technexion/tao3530/tao3530.c
> index 9482f35..7cf5aa6 100644
> --- a/board/technexion/tao3530/tao3530.c
> +++ b/board/technexion/tao3530/tao3530.c
> @@ -67,6 +67,31 @@ out:
>  	return ret;
>  }
>  
> +#ifdef CONFIG_SPL_BUILD
> +/*
> + * Routine: get_board_mem_timings
> + * Description: If we use SPL then there is no x-loader nor config header
> + * so we have to setup the DDR timings ourself on both banks.
> + */
> +void get_board_mem_timings(struct board_sdrc_timings *timings)
> +{
> +	if (tao3530_revision() < 3) {
> +		/* 256MB / Bank */
> +		timings->mcfg = MCFG(256 << 20, 14);	/* RAS-width 14 */
> +		timings->ctrla = HYNIX_V_ACTIMA_165;
> +		timings->ctrlb = HYNIX_V_ACTIMB_165;
> +	} else {
> +		/* 128MB / Bank */
> +		timings->mcfg = MCFG(128 << 20, 13);	/* RAS-width 13 */
> +		timings->ctrla = MICRON_V_ACTIMA_165;
> +		timings->ctrlb = MICRON_V_ACTIMB_165;
> +	}
> +
> +	timings->mr = MICRON_V_MR_165;
> +	timings->rfr_ctrl = SDP_3430_SDRC_RFR_CTRL_165MHz;
> +}
> +#endif
> +
>  /*
>   * Routine: board_init
>   * Description: Early hardware init.
> @@ -134,7 +159,7 @@ void set_muxconf_regs(void)
>  	MUX_TAO3530();
>  }
>  
> -#ifdef CONFIG_GENERIC_MMC
> +#if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
>  int board_mmc_init(bd_t *bis)
>  {
>  	omap_mmc_init(0, 0, 0, -1, -1);
> diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
> index 6327161..03eb85e 100644
> --- a/include/configs/tao3530.h
> +++ b/include/configs/tao3530.h
> @@ -5,6 +5,8 @@
>   * Edward Lin <linuxfae@technexion.com>
>   * Tapani Utriainen <linuxfae@technexion.com>
>   *
> + * Copyright (C) 2013 Stefan Roese <sr@denx.de>
> + *
>   * SPDX-License-Identifier:	GPL-2.0+
>   */
>  
> @@ -307,4 +309,66 @@
>  #define CONFIG_USB_STORAGE
>  #define CONGIG_CMD_STORAGE
>  
> +/* Defines for SPL */
> +#define CONFIG_SPL
> +#define CONFIG_SPL_FRAMEWORK
> +#define CONFIG_SPL_NAND_SIMPLE
> +
> +#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300 /* address 0x60000 */
> +#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS	0x200 /* 256 KB */
> +#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION	1
> +#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME	"u-boot.img"
> +
> +#define CONFIG_SPL_BOARD_INIT
> +#define CONFIG_SPL_LIBCOMMON_SUPPORT
> +#define CONFIG_SPL_LIBDISK_SUPPORT
> +#define CONFIG_SPL_I2C_SUPPORT
> +#define CONFIG_SPL_LIBGENERIC_SUPPORT
> +#define CONFIG_SPL_MMC_SUPPORT
> +#define CONFIG_SPL_FAT_SUPPORT
> +#define CONFIG_SPL_SERIAL_SUPPORT
> +#define CONFIG_SPL_NAND_SUPPORT
> +#define CONFIG_SPL_NAND_BASE
> +#define CONFIG_SPL_NAND_DRIVERS
> +#define CONFIG_SPL_NAND_ECC
> +#define CONFIG_SPL_GPIO_SUPPORT
> +#define CONFIG_SPL_POWER_SUPPORT
> +#define CONFIG_SPL_OMAP3_ID_NAND
> +#define CONFIG_SPL_LDSCRIPT		"$(CPUDIR)/omap-common/u-boot-spl.lds"
> +
> +/* NAND boot config */
> +#define CONFIG_SYS_NAND_5_ADDR_CYCLE
> +#define CONFIG_SYS_NAND_PAGE_COUNT	64
> +#define CONFIG_SYS_NAND_PAGE_SIZE	2048
> +#define CONFIG_SYS_NAND_OOBSIZE		64
> +#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
> +#define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
> +/*
> + * Use the ECC/OOB layout from omap_gpmc.h that matches your chip:
> + * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT
> + */
> +#define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
> +					 10, 11, 12, 13 }
> +#define CONFIG_SYS_NAND_ECCSIZE		512
> +#define CONFIG_SYS_NAND_ECCBYTES	3
> +
> +#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
> +#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
> +
> +#define CONFIG_SPL_TEXT_BASE		0x40200800
> +#define CONFIG_SPL_MAX_SIZE		(54 * 1024)	/* 8 KB for stack */
> +#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
> +
> +/*
> + * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
> + * older x-loader implementations. And move the BSS area so that it
> + * doesn't overlap with TEXT_BASE.
> + */
> +#define CONFIG_SYS_TEXT_BASE		0x80008000
> +#define CONFIG_SPL_BSS_START_ADDR	0x80100000
> +#define CONFIG_SPL_BSS_MAX_SIZE		0x80000		/* 512 KB */
> +
> +#define CONFIG_SYS_SPL_MALLOC_START	0x80208000
> +#define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000
> +
>  #endif /* __CONFIG_H */

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530
  2013-11-12 12:15 ` [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530 Stefan Roese
  2013-11-14  8:55   ` Tapani Utriainen
@ 2013-11-14 17:18   ` Tom Rini
  2013-11-14 17:47     ` Stefan Roese
  1 sibling, 1 reply; 11+ messages in thread
From: Tom Rini @ 2013-11-14 17:18 UTC (permalink / raw)
  To: u-boot

On Tue, Nov 12, 2013 at 01:15:00PM +0100, Stefan Roese wrote:

> Add SPL support for the Technexion TAO3530 SOM to replace
> x-loader. Tested with the Thunder baseboard. Currently this is
> only tested with the TAO3530 SOM revision (Ax/Bx).
> 
> Tested by booting via MMC and NAND.
> 
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Tapani Utriainen <tapani@technexion.com>
> Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
> Cc: Tom Rini <trini@ti.com>

Do we no longer have stack issues that this exposed?

-- 
Tom
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^ permalink raw reply	[flat|nested] 11+ messages in thread

* [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530
  2013-11-14 17:18   ` Tom Rini
@ 2013-11-14 17:47     ` Stefan Roese
  2013-11-14 18:16       ` Tom Rini
  0 siblings, 1 reply; 11+ messages in thread
From: Stefan Roese @ 2013-11-14 17:47 UTC (permalink / raw)
  To: u-boot

Hi Tom,

On 14.11.2013 18:18, Tom Rini wrote:
> On Tue, Nov 12, 2013 at 01:15:00PM +0100, Stefan Roese wrote:
> 
>> Add SPL support for the Technexion TAO3530 SOM to replace
>> x-loader. Tested with the Thunder baseboard. Currently this is
>> only tested with the TAO3530 SOM revision (Ax/Bx).
>>
>> Tested by booting via MMC and NAND.
>>
>> Signed-off-by: Stefan Roese <sr@denx.de>
>> Cc: Tapani Utriainen <tapani@technexion.com>
>> Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
>> Cc: Tom Rini <trini@ti.com>
> 
> Do we no longer have stack issues that this exposed?

No. Work fine without any further patches applied. I have to admit, that
I have no idea why this problem with the re-assignment of r8 seems to be
solved. Some for CM_T35 btw.

Thanks,
Stefan

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530
  2013-11-14 17:47     ` Stefan Roese
@ 2013-11-14 18:16       ` Tom Rini
  2013-11-14 18:23         ` Stefan Roese
  0 siblings, 1 reply; 11+ messages in thread
From: Tom Rini @ 2013-11-14 18:16 UTC (permalink / raw)
  To: u-boot

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

On 11/14/2013 12:47 PM, Stefan Roese wrote:
> Hi Tom,
> 
> On 14.11.2013 18:18, Tom Rini wrote:
>> On Tue, Nov 12, 2013 at 01:15:00PM +0100, Stefan Roese wrote:
>> 
>>> Add SPL support for the Technexion TAO3530 SOM to replace 
>>> x-loader. Tested with the Thunder baseboard. Currently this is 
>>> only tested with the TAO3530 SOM revision (Ax/Bx).
>>> 
>>> Tested by booting via MMC and NAND.
>>> 
>>> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tapani Utriainen
>>> <tapani@technexion.com> Cc: Thorsten Eisbein
>>> <thorsten.eisbein@head-acoustics.de> Cc: Tom Rini
>>> <trini@ti.com>
>> 
>> Do we no longer have stack issues that this exposed?
> 
> No. Work fine without any further patches applied. I have to admit,
> that I have no idea why this problem with the re-assignment of r8
> seems to be solved. Some for CM_T35 btw.

OK, can you please repost any other older patches from then that need
to be applied still?  I think I see them all, but I suspect they need
Makefile changes anyhow.

- -- 
Tom
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^ permalink raw reply	[flat|nested] 11+ messages in thread

* [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530
  2013-11-14 18:16       ` Tom Rini
@ 2013-11-14 18:23         ` Stefan Roese
  0 siblings, 0 replies; 11+ messages in thread
From: Stefan Roese @ 2013-11-14 18:23 UTC (permalink / raw)
  To: u-boot

On 14.11.2013 19:16, Tom Rini wrote:
>>>> Add SPL support for the Technexion TAO3530 SOM to replace 
>>>> x-loader. Tested with the Thunder baseboard. Currently this is 
>>>> only tested with the TAO3530 SOM revision (Ax/Bx).
>>>>
>>>> Tested by booting via MMC and NAND.
>>>>
>>>> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Tapani Utriainen
>>>> <tapani@technexion.com> Cc: Thorsten Eisbein
>>>> <thorsten.eisbein@head-acoustics.de> Cc: Tom Rini
>>>> <trini@ti.com>
>>>
>>> Do we no longer have stack issues that this exposed?
>>
>> No. Work fine without any further patches applied. I have to admit,
>> that I have no idea why this problem with the re-assignment of r8
>> seems to be solved. Some for CM_T35 btw.
> 
> OK, can you please repost any other older patches from then that need
> to be applied still?  I think I see them all, but I suspect they need
> Makefile changes anyhow.

Yes, they definitely need some massaging. I'll repost the CM_T35 related
patches tomorrow as well.

Thanks,
Stefan

^ permalink raw reply	[flat|nested] 11+ messages in thread

* [U-Boot] [PATCH 3/5] arm: omap3: Remove bootargs mem_size handling
  2013-11-12 12:14 [U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules Stefan Roese
  2013-11-12 12:15 ` [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530 Stefan Roese
@ 2013-11-12 12:15 ` Stefan Roese
  2013-11-12 12:15 ` [U-Boot] [PATCH 4/5] arm: omap3: Add board revision output to tao3530 Stefan Roese
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 11+ messages in thread
From: Stefan Roese @ 2013-11-12 12:15 UTC (permalink / raw)
  To: u-boot

The memory size is autodetected and is passed to the Linux kernel
either via ATAGs or device-tree (dtb). So there is no need to
pass it via the bootargs.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>
---
 board/technexion/tao3530/tao3530.c | 12 ------------
 include/configs/tao3530.h          |  3 ---
 2 files changed, 15 deletions(-)

diff --git a/board/technexion/tao3530/tao3530.c b/board/technexion/tao3530/tao3530.c
index 7cf5aa6..f9ea131 100644
--- a/board/technexion/tao3530/tao3530.c
+++ b/board/technexion/tao3530/tao3530.c
@@ -133,18 +133,6 @@ int misc_init_r(void)
 
 	dieid_num_r();
 
-	/* Set memory size environment variable, depending on revision */
-	switch (tao3530_revision()) {
-	case 0x2:  /* Rev C1 -- 256MB */
-		 setenv("mem_size", "mem=256M");
-		 break;
-	case 0x3: /* Rev A2/B2 -- 128MB */
-		 setenv("mem_size", "mem=128M");
-		 break;
-	default:
-		 printf("Warning: Unknown TAO3530 rev, setting mem=128M\n");
-	}
-
 	return 0;
 }
 
diff --git a/include/configs/tao3530.h b/include/configs/tao3530.h
index 03eb85e..9c8e8cf 100644
--- a/include/configs/tao3530.h
+++ b/include/configs/tao3530.h
@@ -150,21 +150,18 @@
 	"video_mode=omapdss.def_disp=lcd vram=6M omapfb.vram=0:2M,1:2M,2:2M\0" \
 	"lcd_mode=omapfb.mode=lcd:800x480 at 60 \0" \
 	"extra_options= \0" \
-	"mem_size=mem=128M \0" \
 	"mmcdev=0\0" \
 	"mmcroot=/dev/mmcblk0p2 rw\0" \
 	"mmcrootfstype=ext3 rootwait\0" \
 	"nandroot=ubi0:rootfs ubi.mtd=4\0" \
 	"nandrootfstype=ubifs\0" \
 	"mmcargs=setenv bootargs console=${console} " \
-		"${mem_size} " \
 		"mpurate=${mpurate} " \
 		"${video_mode} " \
 		"root=${mmcroot} " \
 		"rootfstype=${mmcrootfstype} " \
 		"${extra_options}\0" \
 	"nandargs=setenv bootargs console=${console} " \
-		"${mem_size} " \
 		"mpurate=${mpurate} " \
 		"${video_mode} " \
 		"${network_setting} " \
-- 
1.8.4.3

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [U-Boot] [PATCH 4/5] arm: omap3: Add board revision output to tao3530
  2013-11-12 12:14 [U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules Stefan Roese
  2013-11-12 12:15 ` [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530 Stefan Roese
  2013-11-12 12:15 ` [U-Boot] [PATCH 3/5] arm: omap3: Remove bootargs mem_size handling Stefan Roese
@ 2013-11-12 12:15 ` Stefan Roese
  2013-11-12 12:15 ` [U-Boot] [PATCH 5/5] arm: omap3: Add HEAD acoustics (HA) board variant omap3_ha " Stefan Roese
  2013-12-03 19:22 ` [U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules Tom Rini
  4 siblings, 0 replies; 11+ messages in thread
From: Stefan Roese @ 2013-11-12 12:15 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>
---
 board/technexion/tao3530/tao3530.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/board/technexion/tao3530/tao3530.c b/board/technexion/tao3530/tao3530.c
index f9ea131..2f3f929 100644
--- a/board/technexion/tao3530/tao3530.c
+++ b/board/technexion/tao3530/tao3530.c
@@ -131,6 +131,23 @@ int misc_init_r(void)
 	writel(GPIO31 | GPIO30 | GPIO29 | GPIO28 | GPIO22 | GPIO21 |
 	       GPIO15 | GPIO14 | GPIO13 | GPIO12, &gpio5_base->setdataout);
 
+	switch (tao3530_revision()) {
+	case 0:
+		printf("TAO-3530 REV Reserve 1\n");
+		break;
+	case 1:
+		printf("TAO-3530 REV Reserve 2\n");
+		break;
+	case 2:
+		printf("TAO-3530 REV Cx\n");
+		break;
+	case 3:
+		printf("TAO-3530 REV Ax/Bx\n");
+		break;
+	default:
+		printf("Unknown board revision\n");
+	}
+
 	dieid_num_r();
 
 	return 0;
-- 
1.8.4.3

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [U-Boot] [PATCH 5/5] arm: omap3: Add HEAD acoustics (HA) board variant omap3_ha to tao3530
  2013-11-12 12:14 [U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules Stefan Roese
                   ` (2 preceding siblings ...)
  2013-11-12 12:15 ` [U-Boot] [PATCH 4/5] arm: omap3: Add board revision output to tao3530 Stefan Roese
@ 2013-11-12 12:15 ` Stefan Roese
  2013-12-03 19:22 ` [U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules Tom Rini
  4 siblings, 0 replies; 11+ messages in thread
From: Stefan Roese @ 2013-11-12 12:15 UTC (permalink / raw)
  To: u-boot

The Head acoustics (HA) baseboard used the Technexion TAO3530 SOM
and has only some minor differences to the Technexion Thunder baseboard.
This patch adds support for this HA baseboard / TAO3530 as the "omap3_ha"
build target.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Tapani Utriainen <tapani@technexion.com>
Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
Cc: Tom Rini <trini@ti.com>
---
 board/technexion/tao3530/tao3530.c | 15 +++++++++++++++
 board/technexion/tao3530/tao3530.h |  7 +++++++
 boards.cfg                         |  1 +
 3 files changed, 23 insertions(+)

diff --git a/board/technexion/tao3530/tao3530.c b/board/technexion/tao3530/tao3530.c
index 2f3f929..e829d6f 100644
--- a/board/technexion/tao3530/tao3530.c
+++ b/board/technexion/tao3530/tao3530.c
@@ -75,6 +75,18 @@ out:
  */
 void get_board_mem_timings(struct board_sdrc_timings *timings)
 {
+#if defined(CONFIG_SYS_BOARD_OMAP3_HA)
+	/*
+	 * Switch baseboard LED to red upon power-on
+	 */
+	MUX_OMAP3_HA();
+
+	/* Request a gpio before using it */
+	gpio_request(111, "");
+	/* Sets the gpio as output and its value to 1, switch LED to red */
+	gpio_direction_output(111, 1);
+#endif
+
 	if (tao3530_revision() < 3) {
 		/* 256MB / Bank */
 		timings->mcfg = MCFG(256 << 20, 14);	/* RAS-width 14 */
@@ -162,6 +174,9 @@ int misc_init_r(void)
 void set_muxconf_regs(void)
 {
 	MUX_TAO3530();
+#if defined(CONFIG_SYS_BOARD_OMAP3_HA)
+	MUX_OMAP3_HA();
+#endif
 }
 
 #if defined(CONFIG_GENERIC_MMC) && !defined(CONFIG_SPL_BUILD)
diff --git a/board/technexion/tao3530/tao3530.h b/board/technexion/tao3530/tao3530.h
index 1ea767d..5c0330c 100644
--- a/board/technexion/tao3530/tao3530.h
+++ b/board/technexion/tao3530/tao3530.h
@@ -9,7 +9,11 @@
 
 const omap3_sysinfo sysinfo = {
 	DDR_STACKED,
+#if defined(CONFIG_SYS_BOARD_OMAP3_HA)
+	"HEAD acoustics OMAP3-HA\n",
+#else
 	"OMAP3 TAO-3530 board",
+#endif
 	"NAND",
 };
 
@@ -361,4 +365,7 @@ const omap3_sysinfo sysinfo = {
 	MUX_VAL(CP(SDRC_CKE0),	(IDIS | PTU | EN  | M0)) \
 	MUX_VAL(CP(SDRC_CKE1),	(IDIS | PTU | EN  | M0))
 
+#define MUX_OMAP3_HA() \
+	MUX_VAL(CP(CAM_XCLKB),	(IDIS | PTD | DIS | M4)) /* GPIO_111 */
+
 #endif
diff --git a/boards.cfg b/boards.cfg
index d72be99..90923db 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -325,6 +325,7 @@ Active  arm         armv7          omap3       logicpd         zoom1
 Active  arm         armv7          omap3       logicpd         zoom2               omap3_zoom2                          -                                                                                                                                 Tom Rix <Tom.Rix@windriver.com>
 Active  arm         armv7          omap3       matrix_vision   mvblx               omap3_mvblx                          -                                                                                                                                 Michael Jones <michael.jones@matrix-vision.de>
 Active  arm         armv7          omap3       nokia           rx51                nokia_rx51                           -                                                                                                                                 Pali Roh?r <pali.rohar@gmail.com>
+Active  arm         armv7          omap3       technexion      tao3530             omap3_ha                             tao3530:SYS_BOARD_OMAP3_HA                                                                                                        Stefan Roese <sr@denx.de>
 Active  arm         armv7          omap3       technexion      tao3530             tao3530                              -                                                                                                                                 Tapani Utriainen <linuxfae@technexion.com>
 Active  arm         armv7          omap3       technexion      twister             twister                              -                                                                                                                                 Stefano Babic <sbabic@denx.de>
 Active  arm         armv7          omap3       teejet          mt_ventoux          mt_ventoux                           -                                                                                                                                 Stefano Babic <sbabic@denx.de>
-- 
1.8.4.3

^ permalink raw reply related	[flat|nested] 11+ messages in thread

* [U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules
  2013-11-12 12:14 [U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules Stefan Roese
                   ` (3 preceding siblings ...)
  2013-11-12 12:15 ` [U-Boot] [PATCH 5/5] arm: omap3: Add HEAD acoustics (HA) board variant omap3_ha " Stefan Roese
@ 2013-12-03 19:22 ` Tom Rini
  4 siblings, 0 replies; 11+ messages in thread
From: Tom Rini @ 2013-12-03 19:22 UTC (permalink / raw)
  To: u-boot

On Tue, Nov 12, 2013 at 01:14:59PM +0100, Stefan Roese wrote:

> From: Tapani Utriainen <tapani@technexion.com>
> 
> Add support for TechNexion TAO3530 SoM
> 
> This patch has been posted quite a long time ago. I ported it to
> the latest mainline U-Boot version. With some additional cleanup
> and enhancements.
> 
> Signed-off-by: Tapani Utriainen <tapani@technexion.com>
> CC: Sandeep Paulraj <s-paulraj@ti.com>
> Signed-off-by: Stefan Roese <sr@denx.de>
> Cc: Thorsten Eisbein <thorsten.eisbein@head-acoustics.de>
> Cc: Tom Rini <trini@ti.com>

Sorry for taking so long to get back to this, and I was going to just
fixup a few things, until I got farther into the series:

> diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h
> index 440b041..cb7604a 100644
> --- a/arch/arm/include/asm/mach-types.h
> +++ b/arch/arm/include/asm/mach-types.h
> @@ -470,6 +470,7 @@ extern unsigned int __machine_arch_type;
>  #define MACH_TYPE_EUKREA_CPUIMX35SD    2821
>  #define MACH_TYPE_EUKREA_CPUIMX51SD    2822
>  #define MACH_TYPE_EUKREA_CPUIMX51      2823
> +#define MACH_TYPE_OMAP3_TAO3530        2836
>  #define MACH_TYPE_SMDKC210             2838
>  #define MACH_TYPE_OMAP3_BRAILLO        2839
>  #define MACH_TYPE_SPYPLUG              2840

Put this into the config file until we re-sync mach-types.h, IF you need
to suppot non-DT booting kernels.

> diff --git a/board/technexion/tao3530/Makefile b/board/technexion/tao3530/Makefile
> new file mode 100644
> index 0000000..2aff383
> --- /dev/null
> +++ b/board/technexion/tao3530/Makefile

This needs to be re-written now.

> +		printf("Error? GPIO 65 not available\n");

Here and elsewhere, printf without formatting chars should be puts.

> +	/* Set memory size environment variable, depending on revision */
> +	switch (tao3530_revision()) {
> +	case 0x2:  /* Rev C1 -- 256MB */
> +		 setenv("mem_size", "mem=256M");
> +		 break;
> +	case 0x3: /* Rev A2/B2 -- 128MB */
> +		 setenv("mem_size", "mem=128M");
> +		 break;
> +	default:
> +		 printf("Warning: Unknown TAO3530 rev, setting mem=128M\n");
> +	}

This hunk gets dropped in a later patch, just fixup/squash it in.  The
other patches that do similar things too.

> +#define CONFIG_ARMV7			/* This is an ARM V7 CPU core */
> +#define CONFIG_OMAP34XX			/* which is a 34XX */
> +#define CONFIG_OMAP3430			/* which is in a 3430 */
> +#define CONFIG_OMAP3_TAO3530		/* working with TAO-3530 */

Unused.

> +#undef CONFIG_USE_IRQ				/* no support for IRQs */

... so don't #undef it please, it's never being set.

> +#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
> +					115200}

Please use the default table then.

> +#define CONFIG_SYS_PROMPT_HUSH_PS2	"> "

No need to set this.

> +#define CONFIG_AUTO_COMPLETE
> +#define CONFIG_AUTOCOMPLETE

One of these is needed, not both.

> +#define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0)	/* memtest */
> +								/* works on */
> +#define CONFIG_SYS_MEMTEST_END		(OMAP34XX_SDRC_CS0 + \
> +					0x01F00000) /* 31MB */

Please see doc/README.memory-test

And please compare with omap3_beagle.h and similar, I think there's a
few other style things that have changed since when this file was first
done. Thanks!

-- 
Tom
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^ permalink raw reply	[flat|nested] 11+ messages in thread

end of thread, other threads:[~2013-12-03 19:22 UTC | newest]

Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-11-12 12:14 [U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules Stefan Roese
2013-11-12 12:15 ` [U-Boot] [PATCH 2/5] arm: omap3: Add SPL support to tao3530 Stefan Roese
2013-11-14  8:55   ` Tapani Utriainen
2013-11-14 17:18   ` Tom Rini
2013-11-14 17:47     ` Stefan Roese
2013-11-14 18:16       ` Tom Rini
2013-11-14 18:23         ` Stefan Roese
2013-11-12 12:15 ` [U-Boot] [PATCH 3/5] arm: omap3: Remove bootargs mem_size handling Stefan Roese
2013-11-12 12:15 ` [U-Boot] [PATCH 4/5] arm: omap3: Add board revision output to tao3530 Stefan Roese
2013-11-12 12:15 ` [U-Boot] [PATCH 5/5] arm: omap3: Add HEAD acoustics (HA) board variant omap3_ha " Stefan Roese
2013-12-03 19:22 ` [U-Boot] [PATCH 1/5] arm, omap3: Add support for TechNexion modules Tom Rini

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