From: Heiko Schocher <hs@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] i2c: samsung: register i2c busses for Exynso5420 and Exynos5250
Date: Thu, 05 Dec 2013 12:26:19 +0100 [thread overview]
Message-ID: <52A062DB.3010006@denx.de> (raw)
In-Reply-To: <1385378884-14033-1-git-send-email-ch.naveen@samsung.com>
Hello Naveen,
Sorry for the late reply ...
Am 25.11.2013 12:28, schrieb Naveen Krishna Ch:
> This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels
> on Exynos5420 and Exynos5250 and also adds support for init function
> for hsi2c channels
>
> Signed-off-by: Naveen Krishna Chatradhi<ch.naveen@samsung.com>
>
> ---
> README | 6 ++
> drivers/i2c/s3c24x0_i2c.c | 222 +++++++++++++++++++++++++++++++++++----------
> 2 files changed, 180 insertions(+), 48 deletions(-)
>
> diff --git a/README b/README
> index c97ff0a..c04e352 100644
> --- a/README
> +++ b/README
> @@ -2076,6 +2076,12 @@ CBFS (Coreboot Filesystem) support
> - set CONFIG_SYS_I2C_ZYNQ_SPEED for speed setting
> - set CONFIG_SYS_I2C_ZYNQ_SLAVE for slave addr
>
> + - drivers/i2c/s3c24x0_i2c.c:
> + - activate this driver with CONFIG_SYS_I2C_S3C24X0
> + - This driver adds i2c buses (11 for Exynos5250, Exynos5420
> + 9 i2c buses for Exynos4 and 1 for S3C24X0 SoCs from Samsung)
> + with a fix speed from 100000 and the slave addr 0!
> +
> additional defines:
>
> CONFIG_SYS_NUM_I2C_BUSES
> diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c
> index 1e9dba0..6e719ec 100644
> --- a/drivers/i2c/s3c24x0_i2c.c
> +++ b/drivers/i2c/s3c24x0_i2c.c
> @@ -721,6 +721,15 @@ static unsigned int s3c24x0_i2c_set_bus_speed(struct i2c_adapter *adap,
> return 0;
> }
>
> +static void exynos_i2c_init(struct i2c_adapter *adap, int speed, int slaveaddr)
> +{
> + /* This will override the speed selected in the fdt for that port */
> + debug("i2c_init(speed=%u, slaveaddr=0x%x)\n", speed, slaveaddr);
> + if (i2c_set_bus_speed(speed))
> + printf("i2c_init: failed to init bus %d for speed = %d\n",
> + adap->hwadapnr, speed);
> +}
> +
> /*
> * cmd_type is 0 for write, 1 for read.
> *
> @@ -1071,51 +1080,168 @@ int i2c_reset_port_fdt(const void *blob, int node)
> /*
> * Register s3c24x0 i2c adapters
> */
> -U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_0, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> - s3c24x0_i2c_read, s3c24x0_i2c_write,
> - s3c24x0_i2c_set_bus_speed,
> - CONFIG_SYS_I2C_S3C24X0_SPEED,
> - CONFIG_SYS_I2C_S3C24X0_SLAVE,
> - 0)
> -U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_1, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> - s3c24x0_i2c_read, s3c24x0_i2c_write,
> - s3c24x0_i2c_set_bus_speed,
> - CONFIG_SYS_I2C_S3C24X0_SPEED,
> - CONFIG_SYS_I2C_S3C24X0_SLAVE,
> - 1)
> -U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_2, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> - s3c24x0_i2c_read, s3c24x0_i2c_write,
> - s3c24x0_i2c_set_bus_speed,
> - CONFIG_SYS_I2C_S3C24X0_SPEED,
> - CONFIG_SYS_I2C_S3C24X0_SLAVE,
> - 2)
> -U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_3, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> - s3c24x0_i2c_read, s3c24x0_i2c_write,
> - s3c24x0_i2c_set_bus_speed,
> - CONFIG_SYS_I2C_S3C24X0_SPEED,
> - CONFIG_SYS_I2C_S3C24X0_SLAVE,
> - 3)
> -U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_4, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> - s3c24x0_i2c_read, s3c24x0_i2c_write,
> - s3c24x0_i2c_set_bus_speed,
> - CONFIG_SYS_I2C_S3C24X0_SPEED,
> - CONFIG_SYS_I2C_S3C24X0_SLAVE,
> - 4)
> -U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_5, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> - s3c24x0_i2c_read, s3c24x0_i2c_write,
> - s3c24x0_i2c_set_bus_speed,
> - CONFIG_SYS_I2C_S3C24X0_SPEED,
> - CONFIG_SYS_I2C_S3C24X0_SLAVE,
> - 5)
> -U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_6, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> - s3c24x0_i2c_read, s3c24x0_i2c_write,
> - s3c24x0_i2c_set_bus_speed,
> - CONFIG_SYS_I2C_S3C24X0_SPEED,
> - CONFIG_SYS_I2C_S3C24X0_SLAVE,
> - 6)
> -U_BOOT_I2C_ADAP_COMPLETE(s3c24x0_7, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> - s3c24x0_i2c_read, s3c24x0_i2c_write,
> - s3c24x0_i2c_set_bus_speed,
> - CONFIG_SYS_I2C_S3C24X0_SPEED,
> - CONFIG_SYS_I2C_S3C24X0_SLAVE,
> - 7)
> +#if defined(CONFIG_EXYNOS5420)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c00, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 0)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c01, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 1)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c02, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 2)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c03, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 3)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c04, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 4)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c05, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 5)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c06, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 6)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c07, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 7)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c08, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 8)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c09, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 9)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c10, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 10)
> +#elif defined(CONFIG_EXYNOS5250)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c00, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 0)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c01, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 1)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c02, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 2)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c03, exynos_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 3)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c04, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 4)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c05, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 5)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c06, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 6)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c07, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 7)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c08, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 8)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c09, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 9)
> +U_BOOT_I2C_ADAP_COMPLETE(s3c10, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 10)
> +#elif defined(CONFIG_EXYNOS4)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c00, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 0)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c01, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 1)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c02, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 2)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c03, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 3)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c04, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 4)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c05, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 5)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c06, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 6)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c07, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 7)
> +U_BOOT_I2C_ADAP_COMPLETE(i2c08, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 8
^
leads in a compile error for trats and trats2, could you please fix?
Hmm... could you reformat this very long list in something like this:
U_BOOT_I2C_ADAP_COMPLETE(s3c0, s3c24x0_i2c_init, s3c24x0_i2c_probe,
if defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5420) || defined(CONFIG_EXYNOS5420)
U_BOOT_I2C_ADAP_COMPLETE(s3c1, s3c24x0_i2c_init, s3c24x0_i2c_probe,
[...]
U_BOOT_I2C_ADAP_COMPLETE(s3c8, s3c24x0_i2c_init, s3c24x0_i2c_probe,
#endif
if defined(CONFIG_EXYNOS5420) || defined(CONFIG_EXYNOS5420)
U_BOOT_I2C_ADAP_COMPLETE(s3c9, s3c24x0_i2c_init, s3c24x0_i2c_probe,
U_BOOT_I2C_ADAP_COMPLETE(s3c10, s3c24x0_i2c_init, s3c24x0_i2c_probe,
#endif
> +#else
> +U_BOOT_I2C_ADAP_COMPLETE(s3c0, s3c24x0_i2c_init, s3c24x0_i2c_probe,
> + s3c24x0_i2c_read, s3c24x0_i2c_write,
> + s3c24x0_i2c_set_bus_speed,
> + CONFIG_SYS_I2C_S3C24X0_SPEED,
> + CONFIG_SYS_I2C_S3C24X0_SLAVE, 0)
> +#endif
bye,
Heiko
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
next prev parent reply other threads:[~2013-12-05 11:26 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-12 10:58 [U-Boot] [PATCH] i2c: s3c24xx: add hsi2c controller support Naveen Krishna Chatradhi
2013-03-12 13:11 ` Simon Glass
2013-03-12 14:03 ` Naveen Krishna Ch
2013-04-06 1:37 ` [U-Boot] [PATCH v4] " Naveen Krishna Chatradhi
2013-04-13 4:42 ` Naveen Krishna Ch
2013-04-15 5:48 ` Heiko Schocher
2013-04-15 12:48 ` Tom Rini
2013-04-26 3:08 ` Naveen Krishna Ch
2013-04-29 6:36 ` Minkyu Kang
2013-04-30 4:14 ` Heiko Schocher
2013-05-01 19:04 ` Naveen Krishna Ch
2013-05-02 10:06 ` Heiko Schocher
2013-05-02 17:52 ` Naveen Krishna Ch
2013-09-30 6:58 ` [U-Boot] [PATCH 0/3] i2c: improve s3c24x0 with High-speed and new SYS_I2C framework support Naveen Krishna Chatradhi
2013-09-30 6:58 ` [U-Boot] [PATCH 1/4] exynos: i2c: Fix i2c driver to handle NACKs properly Naveen Krishna Chatradhi
2013-10-02 13:51 ` Heiko Schocher
2013-09-30 6:58 ` [U-Boot] [PATCH 2/4] exynos: i2c: Change FDT bus setup code to enumerate ports correctly Naveen Krishna Chatradhi
2013-10-03 11:23 ` [U-Boot] [PATCH 2/3 v2] " Naveen Krishna Chatradhi
[not found] ` <1380524290-9644-3-git-send-email-ch.naveen-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2013-10-15 5:13 ` [PATCH 2/3 v3] " Naveen Krishna Chatradhi
2013-10-15 5:13 ` Naveen Krishna Chatradhi
2013-10-15 10:32 ` [U-Boot] [PATCH 2/3 v4] " Naveen Krishna Chatradhi
2013-10-17 6:31 ` [U-Boot] [U-Boot, 2/3, " Heiko Schocher
2013-09-30 6:58 ` [U-Boot] [PATCH v5 3/4] i2c: s3c24xx: add hsi2c controller support Naveen Krishna Chatradhi
2013-09-30 6:58 ` [U-Boot] [PATCH] RFC: samsung: i2c: Enable new CONFIG_SYS_I2C framework Naveen Krishna Chatradhi
2013-10-14 6:06 ` Heiko Schocher
2013-11-08 7:45 ` Piotr Wilczek
2013-11-08 7:59 ` Naveen Krishna Ch
2013-11-20 10:50 ` [U-Boot] [PATCH 2/2 v2] " Naveen Krishna Chatradhi
2013-11-25 11:28 ` [U-Boot] [PATCH] i2c: samsung: register i2c busses for Exynso5420 and Exynos5250 Naveen Krishna Chatradhi
2013-11-25 11:31 ` Naveen Krishna Ch
2013-12-05 11:26 ` Heiko Schocher [this message]
2013-12-05 12:21 ` [U-Boot] " Naveen Krishna Ch
2013-12-05 12:47 ` Heiko Schocher
2013-12-06 5:47 ` Naveen Krishna Ch
2013-12-06 6:16 ` Heiko Schocher
2013-12-06 6:42 ` [U-Boot] [PATCH v2] " Naveen Krishna Chatradhi
2013-12-09 6:58 ` [U-Boot] [U-Boot, " Heiko Schocher
2013-09-30 8:05 ` [U-Boot] [PATCH 0/3] i2c: improve s3c24x0 with High-speed and new SYS_I2C framework support Heiko Schocher
2013-09-30 10:03 ` Naveen Krishna Ch
2013-10-01 6:05 ` Heiko Schocher
2013-10-01 6:19 ` Naveen Krishna Ch
2013-10-01 6:36 ` Heiko Schocher
2013-10-03 11:22 ` [U-Boot] [PATCH 1/3 v2] exynos: i2c: Fix i2c driver to handle NACKs properly Naveen Krishna Chatradhi
2013-10-14 6:29 ` Heiko Schocher
2013-10-15 4:48 ` Naveen Krishna Ch
2013-10-15 5:10 ` Heiko Schocher
2013-10-15 6:34 ` Lukasz Majewski
2013-10-15 5:12 ` [PATCH 1/3 v3] " Naveen Krishna Chatradhi
2013-10-15 6:06 ` Heiko Schocher
[not found] ` <525CDB51.70408-ynQEQJNshbs@public.gmane.org>
2013-10-15 6:12 ` Naveen Krishna Ch
2013-10-15 6:12 ` Naveen Krishna Ch
2013-10-15 10:31 ` [U-Boot] [PATCH 1/3 v4] " Naveen Krishna Chatradhi
2013-10-17 6:29 ` [U-Boot] [U-Boot, 1/3, " Heiko Schocher
2013-10-15 6:07 ` [U-Boot] [PATCH 1/3 v3] " Naveen Krishna Chatradhi
2013-10-15 6:07 ` [U-Boot] [PATCH 2/3 v3] exynos: i2c: Change FDT bus setup code to enumerate ports correctly Naveen Krishna Chatradhi
2013-10-15 6:07 ` [U-Boot] [PATCH 3/3 v6] i2c: s3c24xx: add hsi2c controller support Naveen Krishna Chatradhi
2013-10-15 6:40 ` Heiko Schocher
2013-10-15 9:34 ` Naveen Krishna Ch
2013-10-15 9:39 ` Heiko Schocher
2013-10-15 9:44 ` Naveen Krishna Ch
2013-10-03 11:24 ` [U-Boot] [PATCH 3/3 v2]: " Naveen Krishna Chatradhi
2013-10-15 5:13 ` [PATCH 3/3 v6] " Naveen Krishna Chatradhi
2013-10-15 10:32 ` [U-Boot] [PATCH 3/3 v7] " Naveen Krishna Chatradhi
2013-10-17 6:32 ` [U-Boot] [U-Boot, 3/3, " Heiko Schocher
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