From: Richard Henderson <rth@twiddle.net>
To: Aurelien Jarno <aurelien@aurel32.net>, qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>, qemu-stable@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 1/4] tcg/optimize: fix known-zero bits for right shift ops
Date: Sat, 07 Dec 2013 06:53:57 +1300 [thread overview]
Message-ID: <52A20F35.5090002@twiddle.net> (raw)
In-Reply-To: <1378747670-25512-2-git-send-email-aurelien@aurel32.net>
On 09/10/2013 05:27 AM, Aurelien Jarno wrote:
> 32-bit versions of sar and shr ops should not propagate known-zero bits
> from the unused 32 high bits. For sar it could even lead to wrong code
> being generated.
>
> Cc: Richard Henderson <rth@twiddle.net>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: qemu-stable@nongnu.org
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
> ---
> tcg/optimize.c | 21 +++++++++++++++++----
> 1 file changed, 17 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <rth@twiddle.net>
r~
next prev parent reply other threads:[~2013-12-06 17:54 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-09 17:27 [Qemu-devel] [PATCH v2 0/4] tcg/optimize: fixes and improvements Aurelien Jarno
2013-09-09 17:27 ` [Qemu-devel] [PATCH v2 1/4] tcg/optimize: fix known-zero bits for right shift ops Aurelien Jarno
2013-12-06 17:53 ` Richard Henderson [this message]
2014-02-16 5:42 ` Michael Roth
2013-09-09 17:27 ` [Qemu-devel] [PATCH v2 2/4] tcg/optimize: fix known-zero bits optimization Aurelien Jarno
2013-12-06 17:54 ` Richard Henderson
2013-09-09 17:27 ` [Qemu-devel] [PATCH v2 3/4] tcg/optimize: improve known-zero bits for 32-bit ops Aurelien Jarno
2013-12-06 17:54 ` Richard Henderson
2013-09-09 17:27 ` [Qemu-devel] [PATCH v2 4/4] tcg/optimize: add known-zero bits compute for load ops Aurelien Jarno
2013-12-06 17:53 ` Richard Henderson
2013-11-29 9:32 ` [Qemu-devel] [PATCH v2 0/4] tcg/optimize: fixes and improvements Paolo Bonzini
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