From: Richard Henderson <rth@twiddle.net>
To: Aurelien Jarno <aurelien@aurel32.net>, qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v2 3/4] tcg/optimize: improve known-zero bits for 32-bit ops
Date: Sat, 07 Dec 2013 06:54:47 +1300 [thread overview]
Message-ID: <52A20F67.9030603@twiddle.net> (raw)
In-Reply-To: <1378747670-25512-4-git-send-email-aurelien@aurel32.net>
On 09/10/2013 05:27 AM, Aurelien Jarno wrote:
> The shl_i32 op might set some bits of the unused 32 high bits of the
> mask. Fix that by clearing the unused 32 high bits for all 32-bit ops
> except load/store which operate on tl values.
>
> Cc: Richard Henderson <rth@twiddle.net>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
> ---
> tcg/optimize.c | 6 ++++++
> 1 file changed, 6 insertions(+)
Reviewed-by: Richard Henderson <rth@twiddle.net>
r~
next prev parent reply other threads:[~2013-12-06 17:55 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-09 17:27 [Qemu-devel] [PATCH v2 0/4] tcg/optimize: fixes and improvements Aurelien Jarno
2013-09-09 17:27 ` [Qemu-devel] [PATCH v2 1/4] tcg/optimize: fix known-zero bits for right shift ops Aurelien Jarno
2013-12-06 17:53 ` Richard Henderson
2014-02-16 5:42 ` Michael Roth
2013-09-09 17:27 ` [Qemu-devel] [PATCH v2 2/4] tcg/optimize: fix known-zero bits optimization Aurelien Jarno
2013-12-06 17:54 ` Richard Henderson
2013-09-09 17:27 ` [Qemu-devel] [PATCH v2 3/4] tcg/optimize: improve known-zero bits for 32-bit ops Aurelien Jarno
2013-12-06 17:54 ` Richard Henderson [this message]
2013-09-09 17:27 ` [Qemu-devel] [PATCH v2 4/4] tcg/optimize: add known-zero bits compute for load ops Aurelien Jarno
2013-12-06 17:53 ` Richard Henderson
2013-11-29 9:32 ` [Qemu-devel] [PATCH v2 0/4] tcg/optimize: fixes and improvements Paolo Bonzini
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