All of lore.kernel.org
 help / color / mirror / Atom feed
From: Michael Tokarev <mjt@tls.msk.ru>
To: Alexander Graf <agraf@suse.de>
Cc: qemu-trivial <qemu-trivial@nongnu.org>,
	QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-trivial] [PATCH] x86: only allow real mode to access 32bit without LMA
Date: Sat, 07 Dec 2013 22:49:06 +0400	[thread overview]
Message-ID: <52A36DA2.4050508@msgid.tls.msk.ru> (raw)
In-Reply-To: <1386334344-24620-1-git-send-email-agraf@suse.de>

06.12.2013 16:52, Alexander Graf wrote:
> When we're running in non-64bit mode with qemu-system-x86_64 we can
> still end up with virtual addresses that are above the 32bit boundary
> if a segment offset is set up.
> 
> GNU Hurd does exactly that. It sets the segment offset to 0x80000000 and
> puts its EIP value to 0x8xxxxxxx to access low memory.
> 
> This doesn't hit us when we enable paging, as there we just mask away the
> unused bits. But with real mode, we assume that vaddr == paddr which is
> wrong in this case. Real hardware wraps the virtual address around at the
> 32bit boundary. So let's do the same.
> 
> This fixes booting GNU Hurd in qemu-system-x86_64 for me.

Since i386 tcg code has no active maintainer and since this is a rather
simple change, I'll queue it up to trivial-patches.

Thank you!

/mjt


WARNING: multiple messages have this Message-ID (diff)
From: Michael Tokarev <mjt@tls.msk.ru>
To: Alexander Graf <agraf@suse.de>
Cc: qemu-trivial <qemu-trivial@nongnu.org>,
	QEMU Developers <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH] x86: only allow real mode to access 32bit without LMA
Date: Sat, 07 Dec 2013 22:49:06 +0400	[thread overview]
Message-ID: <52A36DA2.4050508@msgid.tls.msk.ru> (raw)
In-Reply-To: <1386334344-24620-1-git-send-email-agraf@suse.de>

06.12.2013 16:52, Alexander Graf wrote:
> When we're running in non-64bit mode with qemu-system-x86_64 we can
> still end up with virtual addresses that are above the 32bit boundary
> if a segment offset is set up.
> 
> GNU Hurd does exactly that. It sets the segment offset to 0x80000000 and
> puts its EIP value to 0x8xxxxxxx to access low memory.
> 
> This doesn't hit us when we enable paging, as there we just mask away the
> unused bits. But with real mode, we assume that vaddr == paddr which is
> wrong in this case. Real hardware wraps the virtual address around at the
> 32bit boundary. So let's do the same.
> 
> This fixes booting GNU Hurd in qemu-system-x86_64 for me.

Since i386 tcg code has no active maintainer and since this is a rather
simple change, I'll queue it up to trivial-patches.

Thank you!

/mjt

  parent reply	other threads:[~2013-12-07 18:49 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-06 12:52 [Qemu-devel] [PATCH] x86: only allow real mode to access 32bit without LMA Alexander Graf
2013-12-06 17:46 ` Richard Henderson
2013-12-06 18:48 ` Michael Tokarev
2013-12-06 18:57   ` Stefan Weil
2013-12-07 18:49 ` Michael Tokarev [this message]
2013-12-07 18:49   ` Michael Tokarev

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=52A36DA2.4050508@msgid.tls.msk.ru \
    --to=mjt@tls.msk.ru \
    --cc=agraf@suse.de \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-trivial@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.