Re: [Qemu-devel] [PATCH v2 20/25] target-arm: Widen exclusive-access support struct fields to 64 bits

[Richard Henderson <rth@twiddle.net>]

On 12/22/2013 02:50 PM, Peter Maydell wrote:
> In preparation for adding support for A64 load/store exclusive instructions,
> widen the fields in the CPU state struct that deal with address and data values
> for exclusives from 32 to 64 bits. Although in practice AArch64 and AArch32
> exclusive accesses will be generally separate there are some odd theoretical
> corner cases (eg you should be able to do the exclusive load in AArch32, take
> an exception to AArch64 and successfully do the store exclusive there), and it's
> also easier to reason about.
> 
> The changes in semantics for the variables are:
>  exclusive_addr  -> extended to 64 bits; -1ULL for "monitor lost",
>    otherwise always < 2^32 for AArch32
>  exclusive_val   -> extended to 64 bits. 64 bit exclusives in AArch32 now
>    use the high half of exclusive_val instead of a separate exclusive_high
>  exclusive_high  -> is no longer used in AArch32; extended to 64 bits as
>    it will be needed for AArch64's pair-of-64-bit-values exclusives.
>  exclusive_test  -> extended to 64 bits, as it is an address. Since this is
>    a linux-user-only field, in arm-linux-user it will always have the top
>    32 bits zero.
>  exclusive_info  -> stays 32 bits, as it is neither data nor address, but
>    simply holds register indexes etc. AArch64 will be able to fit all its
>    information into 32 bits as well.
> 
> Note that the refactoring of gen_store_exclusive() coincidentally fixes
> a minor bug where ldrexd would incorrectly update the first CPU register
> even if the load for the second register faulted.
> 
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---

Reviewed-by: Richard Henderson <rth@twiddle.net>


r~