* [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device
@ 2013-11-14 12:25 ` Sricharan R
0 siblings, 0 replies; 24+ messages in thread
From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw)
To: r.sricharan, linux-kernel, devicetree, linux-doc,
linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak,
marc.zyngier, grant.likely, mark.rutland, robherring2, tglx,
galak, rob.herring, santosh.shilimkar, nm, bcousson
Some socs have a large number of interrupts requests to service
the needs of its many peripherals and subsystems. All of the interrupt
requests lines from the subsystems are not needed at the same
time, so they have to be muxed to the controllers appropriately.
In such places a interrupt controllers are preceded by an
IRQ CROSSBAR that provides flexibility in muxing the device interrupt
requests to the controller inputs.
The driver support for the same was added here.
http://marc.info/?l=linux-omap&m=138443167321614&w=2
The dts file update to support the crossbar device and convert
peripheral irq numbers to crossbar number are added here.
This series was originally a part of the series [1] and now split
to keep the DTS updates separately as per comments from
Santosh Shilimkar <santosh.shilimkar@ti.com>
Applied this series on top of
git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git
for_3.13/dts
[1] http://www.kernelhub.org/?msg=356470&p=2
Sricharan R (3):
ARM: DTS: DRA: Add crossbar device binding
ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar
inputs
ARM: DTS: DRA7: Add routable-irqs property for gic node
arch/arm/boot/dts/dra7.dtsi | 95 +++++++++++++++++++++++--------------------
1 file changed, 52 insertions(+), 43 deletions(-)
--
1.7.9.5
^ permalink raw reply [flat|nested] 24+ messages in thread* [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device @ 2013-11-14 12:25 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw) To: r.sricharan, linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, nm, bcousson Some socs have a large number of interrupts requests to service the needs of its many peripherals and subsystems. All of the interrupt requests lines from the subsystems are not needed at the same time, so they have to be muxed to the controllers appropriately. In such places a interrupt controllers are preceded by an IRQ CROSSBAR that provides flexibility in muxing the device interrupt requests to the controller inputs. The driver support for the same was added here. http://marc.info/?l=linux-omap&m=138443167321614&w=2 The dts file update to support the crossbar device and convert peripheral irq numbers to crossbar number are added here. This series was originally a part of the series [1] and now split to keep the DTS updates separately as per comments from Santosh Shilimkar <santosh.shilimkar@ti.com> Applied this series on top of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git for_3.13/dts [1] http://www.kernelhub.org/?msg=356470&p=2 Sricharan R (3): ARM: DTS: DRA: Add crossbar device binding ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar inputs ARM: DTS: DRA7: Add routable-irqs property for gic node arch/arm/boot/dts/dra7.dtsi | 95 +++++++++++++++++++++++-------------------- 1 file changed, 52 insertions(+), 43 deletions(-) -- 1.7.9.5 ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device @ 2013-11-14 12:25 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw) To: linux-arm-kernel Some socs have a large number of interrupts requests to service the needs of its many peripherals and subsystems. All of the interrupt requests lines from the subsystems are not needed at the same time, so they have to be muxed to the controllers appropriately. In such places a interrupt controllers are preceded by an IRQ CROSSBAR that provides flexibility in muxing the device interrupt requests to the controller inputs. The driver support for the same was added here. http://marc.info/?l=linux-omap&m=138443167321614&w=2 The dts file update to support the crossbar device and convert peripheral irq numbers to crossbar number are added here. This series was originally a part of the series [1] and now split to keep the DTS updates separately as per comments from Santosh Shilimkar <santosh.shilimkar@ti.com> Applied this series on top of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git for_3.13/dts [1] http://www.kernelhub.org/?msg=356470&p=2 Sricharan R (3): ARM: DTS: DRA: Add crossbar device binding ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar inputs ARM: DTS: DRA7: Add routable-irqs property for gic node arch/arm/boot/dts/dra7.dtsi | 95 +++++++++++++++++++++++-------------------- 1 file changed, 52 insertions(+), 43 deletions(-) -- 1.7.9.5 ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH V4 1/3] ARM: DTS: DRA7: Add crossbar device binding 2013-11-14 12:25 ` Sricharan R (?) @ 2013-11-14 12:25 ` Sricharan R -1 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw) To: r.sricharan, linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, nm, bcousson This adds the irq crossbar device node. There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The Peripheral irq requests are connected to only one crossbar input and the output of the crossbar is connected to only one controller's input line. The crossbar device is used to map a peripheral input to a free mpu's interrupt controller line. Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index d0df4c4..cf0d6ca 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -583,4 +583,12 @@ status = "disabled"; }; }; + + crossbar_mpu: crossbar@4a020000 { + compatible = "ti,irq-crossbar"; + reg = <0x4a002a48 0x130>; + ti,max-irqs = <160>; + ti,reg-size = <2>; + ti,irqs-reserved = <0 1 2 3 5 6 131 132 139 140>; + }; }; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH V4 1/3] ARM: DTS: DRA7: Add crossbar device binding @ 2013-11-14 12:25 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw) To: r.sricharan, linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, nm, bcousson This adds the irq crossbar device node. There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The Peripheral irq requests are connected to only one crossbar input and the output of the crossbar is connected to only one controller's input line. The crossbar device is used to map a peripheral input to a free mpu's interrupt controller line. Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index d0df4c4..cf0d6ca 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -583,4 +583,12 @@ status = "disabled"; }; }; + + crossbar_mpu: crossbar@4a020000 { + compatible = "ti,irq-crossbar"; + reg = <0x4a002a48 0x130>; + ti,max-irqs = <160>; + ti,reg-size = <2>; + ti,irqs-reserved = <0 1 2 3 5 6 131 132 139 140>; + }; }; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH V4 1/3] ARM: DTS: DRA7: Add crossbar device binding @ 2013-11-14 12:25 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw) To: linux-arm-kernel This adds the irq crossbar device node. There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The Peripheral irq requests are connected to only one crossbar input and the output of the crossbar is connected to only one controller's input line. The crossbar device is used to map a peripheral input to a free mpu's interrupt controller line. Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index d0df4c4..cf0d6ca 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -583,4 +583,12 @@ status = "disabled"; }; }; + + crossbar_mpu: crossbar at 4a020000 { + compatible = "ti,irq-crossbar"; + reg = <0x4a002a48 0x130>; + ti,max-irqs = <160>; + ti,reg-size = <2>; + ti,irqs-reserved = <0 1 2 3 5 6 131 132 139 140>; + }; }; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH V4 2/3] ARM: DTS: DRA7: Replace peripheral interrupt numbers with crossbar inputs 2013-11-14 12:25 ` Sricharan R (?) @ 2013-11-14 12:25 ` Sricharan R -1 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw) To: r.sricharan, linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, nm, bcousson Now with the crossbar IP in picture, the peripherals do not have the fixed interrupt lines. Instead they rely on the crossbar irqchip to allocate and map a free interrupt line to its crossbar input. So replacing all the peripheral interrupt numbers with its fixed crossbar input lines. Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 86 +++++++++++++++++++++---------------------- 1 file changed, 43 insertions(+), 43 deletions(-) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index cf0d6ca..8b93b7a 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -122,10 +122,10 @@ sdma: dma-controller@4a056000 { compatible = "ti,omap4430-sdma"; reg = <0x4a056000 0x1000>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; #dma-channels = <32>; #dma-requests = <127>; @@ -134,7 +134,7 @@ gpio1: gpio@4ae10000 { compatible = "ti,omap4-gpio"; reg = <0x4ae10000 0x200>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio1"; gpio-controller; #gpio-cells = <2>; @@ -145,7 +145,7 @@ gpio2: gpio@48055000 { compatible = "ti,omap4-gpio"; reg = <0x48055000 0x200>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <2>; @@ -156,7 +156,7 @@ gpio3: gpio@48057000 { compatible = "ti,omap4-gpio"; reg = <0x48057000 0x200>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <2>; @@ -167,7 +167,7 @@ gpio4: gpio@48059000 { compatible = "ti,omap4-gpio"; reg = <0x48059000 0x200>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <2>; @@ -178,7 +178,7 @@ gpio5: gpio@4805b000 { compatible = "ti,omap4-gpio"; reg = <0x4805b000 0x200>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <2>; @@ -189,7 +189,7 @@ gpio6: gpio@4805d000 { compatible = "ti,omap4-gpio"; reg = <0x4805d000 0x200>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; @@ -200,7 +200,7 @@ gpio7: gpio@48051000 { compatible = "ti,omap4-gpio"; reg = <0x48051000 0x200>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio7"; gpio-controller; #gpio-cells = <2>; @@ -211,7 +211,7 @@ gpio8: gpio@48053000 { compatible = "ti,omap4-gpio"; reg = <0x48053000 0x200>; - interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio8"; gpio-controller; #gpio-cells = <2>; @@ -222,7 +222,7 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart1"; clock-frequency = <48000000>; status = "disabled"; @@ -231,7 +231,7 @@ uart2: serial@4806c000 { compatible = "ti,omap4-uart"; reg = <0x4806c000 0x100>; - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart2"; clock-frequency = <48000000>; status = "disabled"; @@ -240,7 +240,7 @@ uart3: serial@48020000 { compatible = "ti,omap4-uart"; reg = <0x48020000 0x100>; - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart3"; clock-frequency = <48000000>; status = "disabled"; @@ -249,7 +249,7 @@ uart4: serial@4806e000 { compatible = "ti,omap4-uart"; reg = <0x4806e000 0x100>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart4"; clock-frequency = <48000000>; status = "disabled"; @@ -258,7 +258,7 @@ uart5: serial@48066000 { compatible = "ti,omap4-uart"; reg = <0x48066000 0x100>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart5"; clock-frequency = <48000000>; status = "disabled"; @@ -267,7 +267,7 @@ uart6: serial@48068000 { compatible = "ti,omap4-uart"; reg = <0x48068000 0x100>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart6"; clock-frequency = <48000000>; status = "disabled"; @@ -308,7 +308,7 @@ timer1: timer@4ae18000 { compatible = "ti,omap5430-timer"; reg = <0x4ae18000 0x80>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer1"; ti,timer-alwon; }; @@ -316,28 +316,28 @@ timer2: timer@48032000 { compatible = "ti,omap5430-timer"; reg = <0x48032000 0x80>; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer2"; }; timer3: timer@48034000 { compatible = "ti,omap5430-timer"; reg = <0x48034000 0x80>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer3"; }; timer4: timer@48036000 { compatible = "ti,omap5430-timer"; reg = <0x48036000 0x80>; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer4"; }; timer5: timer@48820000 { compatible = "ti,omap5430-timer"; reg = <0x48820000 0x80>; - interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer5"; ti,timer-dsp; }; @@ -345,7 +345,7 @@ timer6: timer@48822000 { compatible = "ti,omap5430-timer"; reg = <0x48822000 0x80>; - interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer6"; ti,timer-dsp; ti,timer-pwm; @@ -354,7 +354,7 @@ timer7: timer@48824000 { compatible = "ti,omap5430-timer"; reg = <0x48824000 0x80>; - interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer7"; ti,timer-dsp; }; @@ -362,7 +362,7 @@ timer8: timer@48826000 { compatible = "ti,omap5430-timer"; reg = <0x48826000 0x80>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer8"; ti,timer-dsp; ti,timer-pwm; @@ -371,21 +371,21 @@ timer9: timer@4803e000 { compatible = "ti,omap5430-timer"; reg = <0x4803e000 0x80>; - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer9"; }; timer10: timer@48086000 { compatible = "ti,omap5430-timer"; reg = <0x48086000 0x80>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer10"; }; timer11: timer@48088000 { compatible = "ti,omap5430-timer"; reg = <0x48088000 0x80>; - interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer11"; ti,timer-pwm; }; @@ -421,14 +421,14 @@ wdt2: wdt@4ae14000 { compatible = "ti,omap4-wdt"; reg = <0x4ae14000 0x80>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "wd_timer2"; }; i2c1: i2c@48070000 { compatible = "ti,omap4-i2c"; reg = <0x48070000 0x100>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; @@ -438,7 +438,7 @@ i2c2: i2c@48072000 { compatible = "ti,omap4-i2c"; reg = <0x48072000 0x100>; - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; @@ -448,7 +448,7 @@ i2c3: i2c@48060000 { compatible = "ti,omap4-i2c"; reg = <0x48060000 0x100>; - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; @@ -458,7 +458,7 @@ i2c4: i2c@4807a000 { compatible = "ti,omap4-i2c"; reg = <0x4807a000 0x100>; - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c4"; @@ -468,7 +468,7 @@ i2c5: i2c@4807c000 { compatible = "ti,omap4-i2c"; reg = <0x4807c000 0x100>; - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c5"; @@ -478,7 +478,7 @@ mmc1: mmc@4809c000 { compatible = "ti,omap4-hsmmc"; reg = <0x4809c000 0x400>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; @@ -490,7 +490,7 @@ mmc2: mmc@480b4000 { compatible = "ti,omap4-hsmmc"; reg = <0x480b4000 0x400>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc2"; ti,needs-special-reset; dmas = <&sdma 47>, <&sdma 48>; @@ -501,7 +501,7 @@ mmc3: mmc@480ad000 { compatible = "ti,omap4-hsmmc"; reg = <0x480ad000 0x400>; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc3"; ti,needs-special-reset; dmas = <&sdma 77>, <&sdma 78>; @@ -512,7 +512,7 @@ mmc4: mmc@480d1000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d1000 0x400>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc4"; ti,needs-special-reset; dmas = <&sdma 57>, <&sdma 58>; @@ -523,7 +523,7 @@ mcspi1: spi@48098000 { compatible = "ti,omap4-mcspi"; reg = <0x48098000 0x200>; - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi1"; @@ -544,7 +544,7 @@ mcspi2: spi@4809a000 { compatible = "ti,omap4-mcspi"; reg = <0x4809a000 0x200>; - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi2"; @@ -560,7 +560,7 @@ mcspi3: spi@480b8000 { compatible = "ti,omap4-mcspi"; reg = <0x480b8000 0x200>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi3"; @@ -573,7 +573,7 @@ mcspi4: spi@480ba000 { compatible = "ti,omap4-mcspi"; reg = <0x480ba000 0x200>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi4"; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH V4 2/3] ARM: DTS: DRA7: Replace peripheral interrupt numbers with crossbar inputs @ 2013-11-14 12:25 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw) To: r.sricharan, linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, nm, bcousson Now with the crossbar IP in picture, the peripherals do not have the fixed interrupt lines. Instead they rely on the crossbar irqchip to allocate and map a free interrupt line to its crossbar input. So replacing all the peripheral interrupt numbers with its fixed crossbar input lines. Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 86 +++++++++++++++++++++---------------------- 1 file changed, 43 insertions(+), 43 deletions(-) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index cf0d6ca..8b93b7a 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -122,10 +122,10 @@ sdma: dma-controller@4a056000 { compatible = "ti,omap4430-sdma"; reg = <0x4a056000 0x1000>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; #dma-channels = <32>; #dma-requests = <127>; @@ -134,7 +134,7 @@ gpio1: gpio@4ae10000 { compatible = "ti,omap4-gpio"; reg = <0x4ae10000 0x200>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio1"; gpio-controller; #gpio-cells = <2>; @@ -145,7 +145,7 @@ gpio2: gpio@48055000 { compatible = "ti,omap4-gpio"; reg = <0x48055000 0x200>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <2>; @@ -156,7 +156,7 @@ gpio3: gpio@48057000 { compatible = "ti,omap4-gpio"; reg = <0x48057000 0x200>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <2>; @@ -167,7 +167,7 @@ gpio4: gpio@48059000 { compatible = "ti,omap4-gpio"; reg = <0x48059000 0x200>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <2>; @@ -178,7 +178,7 @@ gpio5: gpio@4805b000 { compatible = "ti,omap4-gpio"; reg = <0x4805b000 0x200>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <2>; @@ -189,7 +189,7 @@ gpio6: gpio@4805d000 { compatible = "ti,omap4-gpio"; reg = <0x4805d000 0x200>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; @@ -200,7 +200,7 @@ gpio7: gpio@48051000 { compatible = "ti,omap4-gpio"; reg = <0x48051000 0x200>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio7"; gpio-controller; #gpio-cells = <2>; @@ -211,7 +211,7 @@ gpio8: gpio@48053000 { compatible = "ti,omap4-gpio"; reg = <0x48053000 0x200>; - interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio8"; gpio-controller; #gpio-cells = <2>; @@ -222,7 +222,7 @@ uart1: serial@4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart1"; clock-frequency = <48000000>; status = "disabled"; @@ -231,7 +231,7 @@ uart2: serial@4806c000 { compatible = "ti,omap4-uart"; reg = <0x4806c000 0x100>; - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart2"; clock-frequency = <48000000>; status = "disabled"; @@ -240,7 +240,7 @@ uart3: serial@48020000 { compatible = "ti,omap4-uart"; reg = <0x48020000 0x100>; - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart3"; clock-frequency = <48000000>; status = "disabled"; @@ -249,7 +249,7 @@ uart4: serial@4806e000 { compatible = "ti,omap4-uart"; reg = <0x4806e000 0x100>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart4"; clock-frequency = <48000000>; status = "disabled"; @@ -258,7 +258,7 @@ uart5: serial@48066000 { compatible = "ti,omap4-uart"; reg = <0x48066000 0x100>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart5"; clock-frequency = <48000000>; status = "disabled"; @@ -267,7 +267,7 @@ uart6: serial@48068000 { compatible = "ti,omap4-uart"; reg = <0x48068000 0x100>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart6"; clock-frequency = <48000000>; status = "disabled"; @@ -308,7 +308,7 @@ timer1: timer@4ae18000 { compatible = "ti,omap5430-timer"; reg = <0x4ae18000 0x80>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer1"; ti,timer-alwon; }; @@ -316,28 +316,28 @@ timer2: timer@48032000 { compatible = "ti,omap5430-timer"; reg = <0x48032000 0x80>; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer2"; }; timer3: timer@48034000 { compatible = "ti,omap5430-timer"; reg = <0x48034000 0x80>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer3"; }; timer4: timer@48036000 { compatible = "ti,omap5430-timer"; reg = <0x48036000 0x80>; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer4"; }; timer5: timer@48820000 { compatible = "ti,omap5430-timer"; reg = <0x48820000 0x80>; - interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer5"; ti,timer-dsp; }; @@ -345,7 +345,7 @@ timer6: timer@48822000 { compatible = "ti,omap5430-timer"; reg = <0x48822000 0x80>; - interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer6"; ti,timer-dsp; ti,timer-pwm; @@ -354,7 +354,7 @@ timer7: timer@48824000 { compatible = "ti,omap5430-timer"; reg = <0x48824000 0x80>; - interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer7"; ti,timer-dsp; }; @@ -362,7 +362,7 @@ timer8: timer@48826000 { compatible = "ti,omap5430-timer"; reg = <0x48826000 0x80>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer8"; ti,timer-dsp; ti,timer-pwm; @@ -371,21 +371,21 @@ timer9: timer@4803e000 { compatible = "ti,omap5430-timer"; reg = <0x4803e000 0x80>; - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer9"; }; timer10: timer@48086000 { compatible = "ti,omap5430-timer"; reg = <0x48086000 0x80>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer10"; }; timer11: timer@48088000 { compatible = "ti,omap5430-timer"; reg = <0x48088000 0x80>; - interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer11"; ti,timer-pwm; }; @@ -421,14 +421,14 @@ wdt2: wdt@4ae14000 { compatible = "ti,omap4-wdt"; reg = <0x4ae14000 0x80>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "wd_timer2"; }; i2c1: i2c@48070000 { compatible = "ti,omap4-i2c"; reg = <0x48070000 0x100>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; @@ -438,7 +438,7 @@ i2c2: i2c@48072000 { compatible = "ti,omap4-i2c"; reg = <0x48072000 0x100>; - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; @@ -448,7 +448,7 @@ i2c3: i2c@48060000 { compatible = "ti,omap4-i2c"; reg = <0x48060000 0x100>; - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; @@ -458,7 +458,7 @@ i2c4: i2c@4807a000 { compatible = "ti,omap4-i2c"; reg = <0x4807a000 0x100>; - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c4"; @@ -468,7 +468,7 @@ i2c5: i2c@4807c000 { compatible = "ti,omap4-i2c"; reg = <0x4807c000 0x100>; - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c5"; @@ -478,7 +478,7 @@ mmc1: mmc@4809c000 { compatible = "ti,omap4-hsmmc"; reg = <0x4809c000 0x400>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; @@ -490,7 +490,7 @@ mmc2: mmc@480b4000 { compatible = "ti,omap4-hsmmc"; reg = <0x480b4000 0x400>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc2"; ti,needs-special-reset; dmas = <&sdma 47>, <&sdma 48>; @@ -501,7 +501,7 @@ mmc3: mmc@480ad000 { compatible = "ti,omap4-hsmmc"; reg = <0x480ad000 0x400>; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc3"; ti,needs-special-reset; dmas = <&sdma 77>, <&sdma 78>; @@ -512,7 +512,7 @@ mmc4: mmc@480d1000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d1000 0x400>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc4"; ti,needs-special-reset; dmas = <&sdma 57>, <&sdma 58>; @@ -523,7 +523,7 @@ mcspi1: spi@48098000 { compatible = "ti,omap4-mcspi"; reg = <0x48098000 0x200>; - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi1"; @@ -544,7 +544,7 @@ mcspi2: spi@4809a000 { compatible = "ti,omap4-mcspi"; reg = <0x4809a000 0x200>; - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi2"; @@ -560,7 +560,7 @@ mcspi3: spi@480b8000 { compatible = "ti,omap4-mcspi"; reg = <0x480b8000 0x200>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi3"; @@ -573,7 +573,7 @@ mcspi4: spi@480ba000 { compatible = "ti,omap4-mcspi"; reg = <0x480ba000 0x200>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi4"; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH V4 2/3] ARM: DTS: DRA7: Replace peripheral interrupt numbers with crossbar inputs @ 2013-11-14 12:25 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw) To: linux-arm-kernel Now with the crossbar IP in picture, the peripherals do not have the fixed interrupt lines. Instead they rely on the crossbar irqchip to allocate and map a free interrupt line to its crossbar input. So replacing all the peripheral interrupt numbers with its fixed crossbar input lines. Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 86 +++++++++++++++++++++---------------------- 1 file changed, 43 insertions(+), 43 deletions(-) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index cf0d6ca..8b93b7a 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -122,10 +122,10 @@ sdma: dma-controller at 4a056000 { compatible = "ti,omap4430-sdma"; reg = <0x4a056000 0x1000>; - interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; #dma-channels = <32>; #dma-requests = <127>; @@ -134,7 +134,7 @@ gpio1: gpio at 4ae10000 { compatible = "ti,omap4-gpio"; reg = <0x4ae10000 0x200>; - interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio1"; gpio-controller; #gpio-cells = <2>; @@ -145,7 +145,7 @@ gpio2: gpio at 48055000 { compatible = "ti,omap4-gpio"; reg = <0x48055000 0x200>; - interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio2"; gpio-controller; #gpio-cells = <2>; @@ -156,7 +156,7 @@ gpio3: gpio at 48057000 { compatible = "ti,omap4-gpio"; reg = <0x48057000 0x200>; - interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio3"; gpio-controller; #gpio-cells = <2>; @@ -167,7 +167,7 @@ gpio4: gpio at 48059000 { compatible = "ti,omap4-gpio"; reg = <0x48059000 0x200>; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio4"; gpio-controller; #gpio-cells = <2>; @@ -178,7 +178,7 @@ gpio5: gpio at 4805b000 { compatible = "ti,omap4-gpio"; reg = <0x4805b000 0x200>; - interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio5"; gpio-controller; #gpio-cells = <2>; @@ -189,7 +189,7 @@ gpio6: gpio at 4805d000 { compatible = "ti,omap4-gpio"; reg = <0x4805d000 0x200>; - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio6"; gpio-controller; #gpio-cells = <2>; @@ -200,7 +200,7 @@ gpio7: gpio at 48051000 { compatible = "ti,omap4-gpio"; reg = <0x48051000 0x200>; - interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio7"; gpio-controller; #gpio-cells = <2>; @@ -211,7 +211,7 @@ gpio8: gpio at 48053000 { compatible = "ti,omap4-gpio"; reg = <0x48053000 0x200>; - interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "gpio8"; gpio-controller; #gpio-cells = <2>; @@ -222,7 +222,7 @@ uart1: serial at 4806a000 { compatible = "ti,omap4-uart"; reg = <0x4806a000 0x100>; - interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart1"; clock-frequency = <48000000>; status = "disabled"; @@ -231,7 +231,7 @@ uart2: serial at 4806c000 { compatible = "ti,omap4-uart"; reg = <0x4806c000 0x100>; - interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart2"; clock-frequency = <48000000>; status = "disabled"; @@ -240,7 +240,7 @@ uart3: serial at 48020000 { compatible = "ti,omap4-uart"; reg = <0x48020000 0x100>; - interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart3"; clock-frequency = <48000000>; status = "disabled"; @@ -249,7 +249,7 @@ uart4: serial at 4806e000 { compatible = "ti,omap4-uart"; reg = <0x4806e000 0x100>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart4"; clock-frequency = <48000000>; status = "disabled"; @@ -258,7 +258,7 @@ uart5: serial at 48066000 { compatible = "ti,omap4-uart"; reg = <0x48066000 0x100>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart5"; clock-frequency = <48000000>; status = "disabled"; @@ -267,7 +267,7 @@ uart6: serial at 48068000 { compatible = "ti,omap4-uart"; reg = <0x48068000 0x100>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "uart6"; clock-frequency = <48000000>; status = "disabled"; @@ -308,7 +308,7 @@ timer1: timer at 4ae18000 { compatible = "ti,omap5430-timer"; reg = <0x4ae18000 0x80>; - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer1"; ti,timer-alwon; }; @@ -316,28 +316,28 @@ timer2: timer at 48032000 { compatible = "ti,omap5430-timer"; reg = <0x48032000 0x80>; - interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer2"; }; timer3: timer at 48034000 { compatible = "ti,omap5430-timer"; reg = <0x48034000 0x80>; - interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer3"; }; timer4: timer at 48036000 { compatible = "ti,omap5430-timer"; reg = <0x48036000 0x80>; - interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer4"; }; timer5: timer at 48820000 { compatible = "ti,omap5430-timer"; reg = <0x48820000 0x80>; - interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer5"; ti,timer-dsp; }; @@ -345,7 +345,7 @@ timer6: timer at 48822000 { compatible = "ti,omap5430-timer"; reg = <0x48822000 0x80>; - interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer6"; ti,timer-dsp; ti,timer-pwm; @@ -354,7 +354,7 @@ timer7: timer at 48824000 { compatible = "ti,omap5430-timer"; reg = <0x48824000 0x80>; - interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer7"; ti,timer-dsp; }; @@ -362,7 +362,7 @@ timer8: timer at 48826000 { compatible = "ti,omap5430-timer"; reg = <0x48826000 0x80>; - interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer8"; ti,timer-dsp; ti,timer-pwm; @@ -371,21 +371,21 @@ timer9: timer at 4803e000 { compatible = "ti,omap5430-timer"; reg = <0x4803e000 0x80>; - interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer9"; }; timer10: timer at 48086000 { compatible = "ti,omap5430-timer"; reg = <0x48086000 0x80>; - interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer10"; }; timer11: timer at 48088000 { compatible = "ti,omap5430-timer"; reg = <0x48088000 0x80>; - interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer11"; ti,timer-pwm; }; @@ -421,14 +421,14 @@ wdt2: wdt at 4ae14000 { compatible = "ti,omap4-wdt"; reg = <0x4ae14000 0x80>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "wd_timer2"; }; i2c1: i2c at 48070000 { compatible = "ti,omap4-i2c"; reg = <0x48070000 0x100>; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c1"; @@ -438,7 +438,7 @@ i2c2: i2c at 48072000 { compatible = "ti,omap4-i2c"; reg = <0x48072000 0x100>; - interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c2"; @@ -448,7 +448,7 @@ i2c3: i2c at 48060000 { compatible = "ti,omap4-i2c"; reg = <0x48060000 0x100>; - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c3"; @@ -458,7 +458,7 @@ i2c4: i2c at 4807a000 { compatible = "ti,omap4-i2c"; reg = <0x4807a000 0x100>; - interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c4"; @@ -468,7 +468,7 @@ i2c5: i2c at 4807c000 { compatible = "ti,omap4-i2c"; reg = <0x4807c000 0x100>; - interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "i2c5"; @@ -478,7 +478,7 @@ mmc1: mmc at 4809c000 { compatible = "ti,omap4-hsmmc"; reg = <0x4809c000 0x400>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc1"; ti,dual-volt; ti,needs-special-reset; @@ -490,7 +490,7 @@ mmc2: mmc at 480b4000 { compatible = "ti,omap4-hsmmc"; reg = <0x480b4000 0x400>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc2"; ti,needs-special-reset; dmas = <&sdma 47>, <&sdma 48>; @@ -501,7 +501,7 @@ mmc3: mmc at 480ad000 { compatible = "ti,omap4-hsmmc"; reg = <0x480ad000 0x400>; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc3"; ti,needs-special-reset; dmas = <&sdma 77>, <&sdma 78>; @@ -512,7 +512,7 @@ mmc4: mmc at 480d1000 { compatible = "ti,omap4-hsmmc"; reg = <0x480d1000 0x400>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "mmc4"; ti,needs-special-reset; dmas = <&sdma 57>, <&sdma 58>; @@ -523,7 +523,7 @@ mcspi1: spi at 48098000 { compatible = "ti,omap4-mcspi"; reg = <0x48098000 0x200>; - interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi1"; @@ -544,7 +544,7 @@ mcspi2: spi at 4809a000 { compatible = "ti,omap4-mcspi"; reg = <0x4809a000 0x200>; - interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi2"; @@ -560,7 +560,7 @@ mcspi3: spi at 480b8000 { compatible = "ti,omap4-mcspi"; reg = <0x480b8000 0x200>; - interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi3"; @@ -573,7 +573,7 @@ mcspi4: spi at 480ba000 { compatible = "ti,omap4-mcspi"; reg = <0x480ba000 0x200>; - interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>; #size-cells = <0>; ti,hwmods = "mcspi4"; -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH V4 3/3] ARM: DTS: DRA7: Add routable-irqs property for gic node 2013-11-14 12:25 ` Sricharan R (?) @ 2013-11-14 12:25 ` Sricharan R -1 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw) To: r.sricharan, linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, nm, bcousson There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 8b93b7a..fd58a09 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -67,6 +67,7 @@ compatible = "arm,cortex-a15-gic"; interrupt-controller; #interrupt-cells = <3>; + arm,routable-irqs = <160>; reg = <0x48211000 0x1000>, <0x48212000 0x1000>, <0x48214000 0x2000>, -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH V4 3/3] ARM: DTS: DRA7: Add routable-irqs property for gic node @ 2013-11-14 12:25 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw) To: r.sricharan, linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, nm, bcousson There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 8b93b7a..fd58a09 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -67,6 +67,7 @@ compatible = "arm,cortex-a15-gic"; interrupt-controller; #interrupt-cells = <3>; + arm,routable-irqs = <160>; reg = <0x48211000 0x1000>, <0x48212000 0x1000>, <0x48214000 0x2000>, -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH V4 3/3] ARM: DTS: DRA7: Add routable-irqs property for gic node @ 2013-11-14 12:25 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-11-14 12:25 UTC (permalink / raw) To: linux-arm-kernel There is a IRQ crossbar device in the soc, which maps the irq requests from the peripherals to the mpu interrupt controller's inputs. The gic provides the support for such IPs in the form of routable-irqs. So adding the property here to gic node. Cc: Benoit Cousson <bcousson@baylibre.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Tony Lindgren <tony@atomide.com> Signed-off-by: Sricharan R <r.sricharan@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> --- arch/arm/boot/dts/dra7.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 8b93b7a..fd58a09 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -67,6 +67,7 @@ compatible = "arm,cortex-a15-gic"; interrupt-controller; #interrupt-cells = <3>; + arm,routable-irqs = <160>; reg = <0x48211000 0x1000>, <0x48212000 0x1000>, <0x48214000 0x2000>, -- 1.7.9.5 ^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device 2013-11-14 12:25 ` Sricharan R (?) @ 2013-11-14 14:23 ` Santosh Shilimkar -1 siblings, 0 replies; 24+ messages in thread From: Santosh Shilimkar @ 2013-11-14 14:23 UTC (permalink / raw) To: Sricharan R Cc: linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, nm, bcousson On Thursday 14 November 2013 07:25 AM, Sricharan R wrote: > Some socs have a large number of interrupts requests to service > the needs of its many peripherals and subsystems. All of the interrupt > requests lines from the subsystems are not needed at the same > time, so they have to be muxed to the controllers appropriately. > In such places a interrupt controllers are preceded by an > IRQ CROSSBAR that provides flexibility in muxing the device interrupt > requests to the controller inputs. > > The driver support for the same was added here. > http://marc.info/?l=linux-omap&m=138443167321614&w=2 > > The dts file update to support the crossbar device and convert > peripheral irq numbers to crossbar number are added here. > This series was originally a part of the series [1] and now split > to keep the DTS updates separately as per comments from > Santosh Shilimkar <santosh.shilimkar@ti.com> > > Applied this series on top of > git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git > for_3.13/dts > > [1] http://www.kernelhub.org/?msg=356470&p=2 > > Sricharan R (3): > ARM: DTS: DRA: Add crossbar device binding > ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar > inputs > ARM: DTS: DRA7: Add routable-irqs property for gic node > For entire series, Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device @ 2013-11-14 14:23 ` Santosh Shilimkar 0 siblings, 0 replies; 24+ messages in thread From: Santosh Shilimkar @ 2013-11-14 14:23 UTC (permalink / raw) To: Sricharan R Cc: linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, nm, bcousson On Thursday 14 November 2013 07:25 AM, Sricharan R wrote: > Some socs have a large number of interrupts requests to service > the needs of its many peripherals and subsystems. All of the interrupt > requests lines from the subsystems are not needed at the same > time, so they have to be muxed to the controllers appropriately. > In such places a interrupt controllers are preceded by an > IRQ CROSSBAR that provides flexibility in muxing the device interrupt > requests to the controller inputs. > > The driver support for the same was added here. > http://marc.info/?l=linux-omap&m=138443167321614&w=2 > > The dts file update to support the crossbar device and convert > peripheral irq numbers to crossbar number are added here. > This series was originally a part of the series [1] and now split > to keep the DTS updates separately as per comments from > Santosh Shilimkar <santosh.shilimkar@ti.com> > > Applied this series on top of > git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git > for_3.13/dts > > [1] http://www.kernelhub.org/?msg=356470&p=2 > > Sricharan R (3): > ARM: DTS: DRA: Add crossbar device binding > ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar > inputs > ARM: DTS: DRA7: Add routable-irqs property for gic node > For entire series, Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device @ 2013-11-14 14:23 ` Santosh Shilimkar 0 siblings, 0 replies; 24+ messages in thread From: Santosh Shilimkar @ 2013-11-14 14:23 UTC (permalink / raw) To: linux-arm-kernel On Thursday 14 November 2013 07:25 AM, Sricharan R wrote: > Some socs have a large number of interrupts requests to service > the needs of its many peripherals and subsystems. All of the interrupt > requests lines from the subsystems are not needed at the same > time, so they have to be muxed to the controllers appropriately. > In such places a interrupt controllers are preceded by an > IRQ CROSSBAR that provides flexibility in muxing the device interrupt > requests to the controller inputs. > > The driver support for the same was added here. > http://marc.info/?l=linux-omap&m=138443167321614&w=2 > > The dts file update to support the crossbar device and convert > peripheral irq numbers to crossbar number are added here. > This series was originally a part of the series [1] and now split > to keep the DTS updates separately as per comments from > Santosh Shilimkar <santosh.shilimkar@ti.com> > > Applied this series on top of > git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git > for_3.13/dts > > [1] http://www.kernelhub.org/?msg=356470&p=2 > > Sricharan R (3): > ARM: DTS: DRA: Add crossbar device binding > ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar > inputs > ARM: DTS: DRA7: Add routable-irqs property for gic node > For entire series, Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device 2013-11-14 12:25 ` Sricharan R (?) @ 2013-12-30 6:58 ` Sricharan R -1 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-12-30 6:58 UTC (permalink / raw) To: Sricharan R Cc: linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, nm, bcousson Hi Benoit, On Thursday 14 November 2013 05:55 PM, Sricharan R wrote: > Some socs have a large number of interrupts requests to service > the needs of its many peripherals and subsystems. All of the interrupt > requests lines from the subsystems are not needed at the same > time, so they have to be muxed to the controllers appropriately. > In such places a interrupt controllers are preceded by an > IRQ CROSSBAR that provides flexibility in muxing the device interrupt > requests to the controller inputs. > > The driver support for the same was added here. > http://marc.info/?l=linux-omap&m=138443167321614&w=2 > > The dts file update to support the crossbar device and convert > peripheral irq numbers to crossbar number are added here. > This series was originally a part of the series [1] and now split > to keep the DTS updates separately as per comments from > Santosh Shilimkar <santosh.shilimkar@ti.com> > > Applied this series on top of > git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git > for_3.13/dts > > [1] http://www.kernelhub.org/?msg=356470&p=2 > > Sricharan R (3): > ARM: DTS: DRA: Add crossbar device binding > ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar > inputs > ARM: DTS: DRA7: Add routable-irqs property for gic node > > arch/arm/boot/dts/dra7.dtsi | 95 +++++++++++++++++++++++-------------------- > 1 file changed, 52 insertions(+), 43 deletions(-) > I have pushed a branch with this series here git://github.com/Sricharanti/sricharan.git branch: crossbar_dts This is on top of your for_3.14/dts branch This series has a dependency with crossbar driver functional changes, which is yet to be pulled https://lkml.org/lkml/2013/12/30/9 Regards, Sricharan ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device @ 2013-12-30 6:58 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-12-30 6:58 UTC (permalink / raw) To: Sricharan R Cc: linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, nm, bcousson Hi Benoit, On Thursday 14 November 2013 05:55 PM, Sricharan R wrote: > Some socs have a large number of interrupts requests to service > the needs of its many peripherals and subsystems. All of the interrupt > requests lines from the subsystems are not needed at the same > time, so they have to be muxed to the controllers appropriately. > In such places a interrupt controllers are preceded by an > IRQ CROSSBAR that provides flexibility in muxing the device interrupt > requests to the controller inputs. > > The driver support for the same was added here. > http://marc.info/?l=linux-omap&m=138443167321614&w=2 > > The dts file update to support the crossbar device and convert > peripheral irq numbers to crossbar number are added here. > This series was originally a part of the series [1] and now split > to keep the DTS updates separately as per comments from > Santosh Shilimkar <santosh.shilimkar@ti.com> > > Applied this series on top of > git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git > for_3.13/dts > > [1] http://www.kernelhub.org/?msg=356470&p=2 > > Sricharan R (3): > ARM: DTS: DRA: Add crossbar device binding > ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar > inputs > ARM: DTS: DRA7: Add routable-irqs property for gic node > > arch/arm/boot/dts/dra7.dtsi | 95 +++++++++++++++++++++++-------------------- > 1 file changed, 52 insertions(+), 43 deletions(-) > I have pushed a branch with this series here git://github.com/Sricharanti/sricharan.git branch: crossbar_dts This is on top of your for_3.14/dts branch This series has a dependency with crossbar driver functional changes, which is yet to be pulled https://lkml.org/lkml/2013/12/30/9 Regards, Sricharan ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device @ 2013-12-30 6:58 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2013-12-30 6:58 UTC (permalink / raw) To: linux-arm-kernel Hi Benoit, On Thursday 14 November 2013 05:55 PM, Sricharan R wrote: > Some socs have a large number of interrupts requests to service > the needs of its many peripherals and subsystems. All of the interrupt > requests lines from the subsystems are not needed at the same > time, so they have to be muxed to the controllers appropriately. > In such places a interrupt controllers are preceded by an > IRQ CROSSBAR that provides flexibility in muxing the device interrupt > requests to the controller inputs. > > The driver support for the same was added here. > http://marc.info/?l=linux-omap&m=138443167321614&w=2 > > The dts file update to support the crossbar device and convert > peripheral irq numbers to crossbar number are added here. > This series was originally a part of the series [1] and now split > to keep the DTS updates separately as per comments from > Santosh Shilimkar <santosh.shilimkar@ti.com> > > Applied this series on top of > git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git > for_3.13/dts > > [1] http://www.kernelhub.org/?msg=356470&p=2 > > Sricharan R (3): > ARM: DTS: DRA: Add crossbar device binding > ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar > inputs > ARM: DTS: DRA7: Add routable-irqs property for gic node > > arch/arm/boot/dts/dra7.dtsi | 95 +++++++++++++++++++++++-------------------- > 1 file changed, 52 insertions(+), 43 deletions(-) > I have pushed a branch with this series here git://github.com/Sricharanti/sricharan.git branch: crossbar_dts This is on top of your for_3.14/dts branch This series has a dependency with crossbar driver functional changes, which is yet to be pulled https://lkml.org/lkml/2013/12/30/9 Regards, Sricharan ^ permalink raw reply [flat|nested] 24+ messages in thread
[parent not found: <52C1197A.5010701-l0cyMroinI0@public.gmane.org>]
* Re: [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device 2013-12-30 6:58 ` Sricharan R (?) @ 2014-05-05 14:37 ` Sricharan R -1 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2014-05-05 14:37 UTC (permalink / raw) To: Sricharan R Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA, devicetree-u79uwXL29TY76Z2rM5mHXA, linux-doc-u79uwXL29TY76Z2rM5mHXA, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r, linux-omap-u79uwXL29TY76Z2rM5mHXA, linus.walleij-QSEj5FYQhm4dnm+yROfE0A, linux-lFZ/pmaqli7XmaaqVzeoHQ, tony-4v6yS6AI5VpBDgjK7y7TUQ, rnayak-l0cyMroinI0, marc.zyngier-5wv7dgnIgG8, grant.likely-QSEj5FYQhm4dnm+yROfE0A, mark.rutland-5wv7dgnIgG8, robherring2-Re5JQEeQqe8AvxtiuMwx3w, tglx-hfZtesqFncYOwBW4kG4KsQ, galak-sgV2jX0FEOL9JmXXK+q4OQ, rob.herring-bsGFqQB8/DxBDgjK7y7TUQ, santosh.shilimkar-l0cyMroinI0, nm-l0cyMroinI0, bcousson-rdvid1DuHRBWk0Htik3J/w Hi Tony, On Monday 30 December 2013 12:28 PM, Sricharan R wrote: > Hi Benoit, > > On Thursday 14 November 2013 05:55 PM, Sricharan R wrote: >> Some socs have a large number of interrupts requests to service >> the needs of its many peripherals and subsystems. All of the interrupt >> requests lines from the subsystems are not needed at the same >> time, so they have to be muxed to the controllers appropriately. >> In such places a interrupt controllers are preceded by an >> IRQ CROSSBAR that provides flexibility in muxing the device interrupt >> requests to the controller inputs. >> >> The driver support for the same was added here. >> http://marc.info/?l=linux-omap&m=138443167321614&w=2 >> >> The dts file update to support the crossbar device and convert >> peripheral irq numbers to crossbar number are added here. >> This series was originally a part of the series [1] and now split >> to keep the DTS updates separately as per comments from >> Santosh Shilimkar <santosh.shilimkar-l0cyMroinI0@public.gmane.org> >> >> Applied this series on top of >> git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git >> for_3.13/dts >> >> [1] http://www.kernelhub.org/?msg=356470&p=2 >> >> Sricharan R (3): >> ARM: DTS: DRA: Add crossbar device binding >> ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar >> inputs >> ARM: DTS: DRA7: Add routable-irqs property for gic node >> >> arch/arm/boot/dts/dra7.dtsi | 95 +++++++++++++++++++++++-------------------- >> 1 file changed, 52 insertions(+), 43 deletions(-) >> > I have pushed a branch with this series here > > git://github.com/Sricharanti/sricharan.git > branch: crossbar_dts > > This is on top of your for_3.14/dts branch > > This series has a dependency with crossbar driver functional changes, which is yet > to be pulled > > https://lkml.org/lkml/2013/12/30/9 > > Regards, > Sricharan I have pushed the below branch for the crossbar-dts data rebased on 3.15-rc4 git-9UaJU3cA/F/QT0dZR+AlfA@public.gmane.org:Sricharanti/sricharan.git branch: crossbar_dts_3.15_rc4 These patches are dependent on the crossbar driver fixes sent below. http://marc.info/?l=linux-omap&m=139929963420299&w=2 Regards, Sricharan - -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device @ 2014-05-05 14:37 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2014-05-05 14:37 UTC (permalink / raw) To: Sricharan R Cc: linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, nm, bcousson Hi Tony, On Monday 30 December 2013 12:28 PM, Sricharan R wrote: > Hi Benoit, > > On Thursday 14 November 2013 05:55 PM, Sricharan R wrote: >> Some socs have a large number of interrupts requests to service >> the needs of its many peripherals and subsystems. All of the interrupt >> requests lines from the subsystems are not needed at the same >> time, so they have to be muxed to the controllers appropriately. >> In such places a interrupt controllers are preceded by an >> IRQ CROSSBAR that provides flexibility in muxing the device interrupt >> requests to the controller inputs. >> >> The driver support for the same was added here. >> http://marc.info/?l=linux-omap&m=138443167321614&w=2 >> >> The dts file update to support the crossbar device and convert >> peripheral irq numbers to crossbar number are added here. >> This series was originally a part of the series [1] and now split >> to keep the DTS updates separately as per comments from >> Santosh Shilimkar <santosh.shilimkar@ti.com> >> >> Applied this series on top of >> git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git >> for_3.13/dts >> >> [1] http://www.kernelhub.org/?msg=356470&p=2 >> >> Sricharan R (3): >> ARM: DTS: DRA: Add crossbar device binding >> ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar >> inputs >> ARM: DTS: DRA7: Add routable-irqs property for gic node >> >> arch/arm/boot/dts/dra7.dtsi | 95 +++++++++++++++++++++++-------------------- >> 1 file changed, 52 insertions(+), 43 deletions(-) >> > I have pushed a branch with this series here > > git://github.com/Sricharanti/sricharan.git > branch: crossbar_dts > > This is on top of your for_3.14/dts branch > > This series has a dependency with crossbar driver functional changes, which is yet > to be pulled > > https://lkml.org/lkml/2013/12/30/9 > > Regards, > Sricharan I have pushed the below branch for the crossbar-dts data rebased on 3.15-rc4 git@github.com:Sricharanti/sricharan.git branch: crossbar_dts_3.15_rc4 These patches are dependent on the crossbar driver fixes sent below. http://marc.info/?l=linux-omap&m=139929963420299&w=2 Regards, Sricharan - ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device @ 2014-05-05 14:37 ` Sricharan R 0 siblings, 0 replies; 24+ messages in thread From: Sricharan R @ 2014-05-05 14:37 UTC (permalink / raw) To: linux-arm-kernel Hi Tony, On Monday 30 December 2013 12:28 PM, Sricharan R wrote: > Hi Benoit, > > On Thursday 14 November 2013 05:55 PM, Sricharan R wrote: >> Some socs have a large number of interrupts requests to service >> the needs of its many peripherals and subsystems. All of the interrupt >> requests lines from the subsystems are not needed at the same >> time, so they have to be muxed to the controllers appropriately. >> In such places a interrupt controllers are preceded by an >> IRQ CROSSBAR that provides flexibility in muxing the device interrupt >> requests to the controller inputs. >> >> The driver support for the same was added here. >> http://marc.info/?l=linux-omap&m=138443167321614&w=2 >> >> The dts file update to support the crossbar device and convert >> peripheral irq numbers to crossbar number are added here. >> This series was originally a part of the series [1] and now split >> to keep the DTS updates separately as per comments from >> Santosh Shilimkar <santosh.shilimkar@ti.com> >> >> Applied this series on top of >> git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt.git >> for_3.13/dts >> >> [1] http://www.kernelhub.org/?msg=356470&p=2 >> >> Sricharan R (3): >> ARM: DTS: DRA: Add crossbar device binding >> ARM: DTS: DRA: Replace peripheral interrupt numbers with crossbar >> inputs >> ARM: DTS: DRA7: Add routable-irqs property for gic node >> >> arch/arm/boot/dts/dra7.dtsi | 95 +++++++++++++++++++++++-------------------- >> 1 file changed, 52 insertions(+), 43 deletions(-) >> > I have pushed a branch with this series here > > git://github.com/Sricharanti/sricharan.git > branch: crossbar_dts > > This is on top of your for_3.14/dts branch > > This series has a dependency with crossbar driver functional changes, which is yet > to be pulled > > https://lkml.org/lkml/2013/12/30/9 > > Regards, > Sricharan I have pushed the below branch for the crossbar-dts data rebased on 3.15-rc4 git at github.com:Sricharanti/sricharan.git branch: crossbar_dts_3.15_rc4 These patches are dependent on the crossbar driver fixes sent below. http://marc.info/?l=linux-omap&m=139929963420299&w=2 Regards, Sricharan - ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device 2014-05-05 14:37 ` Sricharan R (?) @ 2014-05-05 14:55 ` Nishanth Menon -1 siblings, 0 replies; 24+ messages in thread From: Nishanth Menon @ 2014-05-05 14:55 UTC (permalink / raw) To: Sricharan R Cc: linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, bcousson On 05/05/2014 09:37 AM, Sricharan R wrote: [..] > I have pushed the below branch for the crossbar-dts data rebased on 3.15-rc4 > > git@github.com:Sricharanti/sricharan.git > branch: crossbar_dts_3.15_rc4 > > These patches are dependent on the crossbar driver fixes sent below. > > http://marc.info/?l=linux-omap&m=139929963420299&w=2 > I suggest reposting the DTS patches if there has been any changes since the last revision posted. -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device @ 2014-05-05 14:55 ` Nishanth Menon 0 siblings, 0 replies; 24+ messages in thread From: Nishanth Menon @ 2014-05-05 14:55 UTC (permalink / raw) To: Sricharan R Cc: linux-kernel, devicetree, linux-doc, linux-arm-kernel, linux-omap, linus.walleij, linux, tony, rnayak, marc.zyngier, grant.likely, mark.rutland, robherring2, tglx, galak, rob.herring, santosh.shilimkar, bcousson On 05/05/2014 09:37 AM, Sricharan R wrote: [..] > I have pushed the below branch for the crossbar-dts data rebased on 3.15-rc4 > > git@github.com:Sricharanti/sricharan.git > branch: crossbar_dts_3.15_rc4 > > These patches are dependent on the crossbar driver fixes sent below. > > http://marc.info/?l=linux-omap&m=139929963420299&w=2 > I suggest reposting the DTS patches if there has been any changes since the last revision posted. -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device @ 2014-05-05 14:55 ` Nishanth Menon 0 siblings, 0 replies; 24+ messages in thread From: Nishanth Menon @ 2014-05-05 14:55 UTC (permalink / raw) To: linux-arm-kernel On 05/05/2014 09:37 AM, Sricharan R wrote: [..] > I have pushed the below branch for the crossbar-dts data rebased on 3.15-rc4 > > git at github.com:Sricharanti/sricharan.git > branch: crossbar_dts_3.15_rc4 > > These patches are dependent on the crossbar driver fixes sent below. > > http://marc.info/?l=linux-omap&m=139929963420299&w=2 > I suggest reposting the DTS patches if there has been any changes since the last revision posted. -- Regards, Nishanth Menon ^ permalink raw reply [flat|nested] 24+ messages in thread
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Thread overview: 24+ messages (download: mbox.gz follow: Atom feed
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2013-11-14 12:25 [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device Sricharan R
2013-11-14 12:25 ` Sricharan R
2013-11-14 12:25 ` Sricharan R
2013-11-14 12:25 ` [PATCH V4 1/3] ARM: DTS: DRA7: Add crossbar device binding Sricharan R
2013-11-14 12:25 ` Sricharan R
2013-11-14 12:25 ` Sricharan R
2013-11-14 12:25 ` [PATCH V4 2/3] ARM: DTS: DRA7: Replace peripheral interrupt numbers with crossbar inputs Sricharan R
2013-11-14 12:25 ` Sricharan R
2013-11-14 12:25 ` Sricharan R
2013-11-14 12:25 ` [PATCH V4 3/3] ARM: DTS: DRA7: Add routable-irqs property for gic node Sricharan R
2013-11-14 12:25 ` Sricharan R
2013-11-14 12:25 ` Sricharan R
2013-11-14 14:23 ` [PATCH V4 0/3] ARM: DTS: DRA7: Updates for adding crossbar device Santosh Shilimkar
2013-11-14 14:23 ` Santosh Shilimkar
2013-11-14 14:23 ` Santosh Shilimkar
2013-12-30 6:58 ` Sricharan R
2013-12-30 6:58 ` Sricharan R
2013-12-30 6:58 ` Sricharan R
[not found] ` <52C1197A.5010701-l0cyMroinI0@public.gmane.org>
2014-05-05 14:37 ` Sricharan R
2014-05-05 14:37 ` Sricharan R
2014-05-05 14:37 ` Sricharan R
2014-05-05 14:55 ` Nishanth Menon
2014-05-05 14:55 ` Nishanth Menon
2014-05-05 14:55 ` Nishanth Menon
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