* [PATCH] nested EPT: fixing wrong handling for L2 guest's direct mmio access
@ 2014-01-17 6:35 Yang Zhang
2014-01-17 8:59 ` Egger, Christoph
2014-01-17 13:16 ` Tim Deegan
0 siblings, 2 replies; 4+ messages in thread
From: Yang Zhang @ 2014-01-17 6:35 UTC (permalink / raw)
To: xen-devel
Cc: JBeulich, andrew.cooper3, eddie.dong, jun.nakajima, Yang Zhang,
xiantao.zhang
From: Yang Zhang <yang.z.zhang@Intel.com>
L2 guest will access the physical device directly(nested VT-d). For such access,
Shadow EPT table should point to device's MMIO. But in current logic, L0 doesn't
distinguish the MMIO whether from qemu or physical device when building shadow EPT table.
This is wrong. This patch will setup the correct shadow EPT table for such MMIO ranges.
Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
---
xen/arch/x86/mm/hap/nested_hap.c | 10 ++++++++--
xen/include/asm-x86/hvm/nestedhvm.h | 1 +
2 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/xen/arch/x86/mm/hap/nested_hap.c b/xen/arch/x86/mm/hap/nested_hap.c
index c2ef1d1..38e2327 100644
--- a/xen/arch/x86/mm/hap/nested_hap.c
+++ b/xen/arch/x86/mm/hap/nested_hap.c
@@ -170,8 +170,11 @@ nestedhap_walk_L0_p2m(struct p2m_domain *p2m, paddr_t L1_gpa, paddr_t *L0_gpa,
mfn = get_gfn_type_access(p2m, L1_gpa >> PAGE_SHIFT, p2mt, p2ma,
0, page_order);
+ rc = NESTEDHVM_PAGEFAULT_DIRECT_MMIO;
+ if ( *p2mt == p2m_mmio_direct )
+ goto direct_mmio_out;
rc = NESTEDHVM_PAGEFAULT_MMIO;
- if ( p2m_is_mmio(*p2mt) )
+ if ( *p2mt == p2m_mmio_dm )
goto out;
rc = NESTEDHVM_PAGEFAULT_L0_ERROR;
@@ -184,8 +187,9 @@ nestedhap_walk_L0_p2m(struct p2m_domain *p2m, paddr_t L1_gpa, paddr_t *L0_gpa,
if ( !mfn_valid(mfn) )
goto out;
- *L0_gpa = (mfn_x(mfn) << PAGE_SHIFT) + (L1_gpa & ~PAGE_MASK);
rc = NESTEDHVM_PAGEFAULT_DONE;
+direct_mmio_out:
+ *L0_gpa = (mfn_x(mfn) << PAGE_SHIFT) + (L1_gpa & ~PAGE_MASK);
out:
__put_gfn(p2m, L1_gpa >> PAGE_SHIFT);
return rc;
@@ -245,6 +249,8 @@ nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa,
break;
case NESTEDHVM_PAGEFAULT_MMIO:
return rv;
+ case NESTEDHVM_PAGEFAULT_DIRECT_MMIO:
+ break;
default:
BUG();
break;
diff --git a/xen/include/asm-x86/hvm/nestedhvm.h b/xen/include/asm-x86/hvm/nestedhvm.h
index d8124cf..cca41b3 100644
--- a/xen/include/asm-x86/hvm/nestedhvm.h
+++ b/xen/include/asm-x86/hvm/nestedhvm.h
@@ -53,6 +53,7 @@ bool_t nestedhvm_vcpu_in_guestmode(struct vcpu *v);
#define NESTEDHVM_PAGEFAULT_L0_ERROR 3
#define NESTEDHVM_PAGEFAULT_MMIO 4
#define NESTEDHVM_PAGEFAULT_RETRY 5
+#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6
int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa,
bool_t access_r, bool_t access_w, bool_t access_x);
--
1.7.1
^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [PATCH] nested EPT: fixing wrong handling for L2 guest's direct mmio access
2014-01-17 6:35 [PATCH] nested EPT: fixing wrong handling for L2 guest's direct mmio access Yang Zhang
@ 2014-01-17 8:59 ` Egger, Christoph
2014-01-17 13:10 ` Tim Deegan
2014-01-17 13:16 ` Tim Deegan
1 sibling, 1 reply; 4+ messages in thread
From: Egger, Christoph @ 2014-01-17 8:59 UTC (permalink / raw)
To: Yang Zhang, xen-devel
Cc: andrew.cooper3, xiantao.zhang, eddie.dong, jun.nakajima, JBeulich
On 17.01.14 07:35, Yang Zhang wrote:
> From: Yang Zhang <yang.z.zhang@Intel.com>
>
> L2 guest will access the physical device directly(nested VT-d). For such access,
> Shadow EPT table should point to device's MMIO. But in current logic, L0 doesn't
> distinguish the MMIO whether from qemu or physical device when building shadow EPT table.
> This is wrong. This patch will setup the correct shadow EPT table for such MMIO ranges.
>
> Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
> ---
> xen/arch/x86/mm/hap/nested_hap.c | 10 ++++++++--
> xen/include/asm-x86/hvm/nestedhvm.h | 1 +
> 2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/xen/arch/x86/mm/hap/nested_hap.c b/xen/arch/x86/mm/hap/nested_hap.c
> index c2ef1d1..38e2327 100644
> --- a/xen/arch/x86/mm/hap/nested_hap.c
> +++ b/xen/arch/x86/mm/hap/nested_hap.c
> @@ -170,8 +170,11 @@ nestedhap_walk_L0_p2m(struct p2m_domain *p2m, paddr_t L1_gpa, paddr_t *L0_gpa,
> mfn = get_gfn_type_access(p2m, L1_gpa >> PAGE_SHIFT, p2mt, p2ma,
> 0, page_order);
>
> + rc = NESTEDHVM_PAGEFAULT_DIRECT_MMIO;
> + if ( *p2mt == p2m_mmio_direct )
> + goto direct_mmio_out;
> rc = NESTEDHVM_PAGEFAULT_MMIO;
> - if ( p2m_is_mmio(*p2mt) )
> + if ( *p2mt == p2m_mmio_dm )
> goto out;
Why does p2m_is_mmio() not cover p2m_mmio_direct ?
Christoph
> rc = NESTEDHVM_PAGEFAULT_L0_ERROR;
> @@ -184,8 +187,9 @@ nestedhap_walk_L0_p2m(struct p2m_domain *p2m, paddr_t L1_gpa, paddr_t *L0_gpa,
> if ( !mfn_valid(mfn) )
> goto out;
>
> - *L0_gpa = (mfn_x(mfn) << PAGE_SHIFT) + (L1_gpa & ~PAGE_MASK);
> rc = NESTEDHVM_PAGEFAULT_DONE;
> +direct_mmio_out:
> + *L0_gpa = (mfn_x(mfn) << PAGE_SHIFT) + (L1_gpa & ~PAGE_MASK);
> out:
> __put_gfn(p2m, L1_gpa >> PAGE_SHIFT);
> return rc;
> @@ -245,6 +249,8 @@ nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa,
> break;
> case NESTEDHVM_PAGEFAULT_MMIO:
> return rv;
> + case NESTEDHVM_PAGEFAULT_DIRECT_MMIO:
> + break;
> default:
> BUG();
> break;
> diff --git a/xen/include/asm-x86/hvm/nestedhvm.h b/xen/include/asm-x86/hvm/nestedhvm.h
> index d8124cf..cca41b3 100644
> --- a/xen/include/asm-x86/hvm/nestedhvm.h
> +++ b/xen/include/asm-x86/hvm/nestedhvm.h
> @@ -53,6 +53,7 @@ bool_t nestedhvm_vcpu_in_guestmode(struct vcpu *v);
> #define NESTEDHVM_PAGEFAULT_L0_ERROR 3
> #define NESTEDHVM_PAGEFAULT_MMIO 4
> #define NESTEDHVM_PAGEFAULT_RETRY 5
> +#define NESTEDHVM_PAGEFAULT_DIRECT_MMIO 6
> int nestedhvm_hap_nested_page_fault(struct vcpu *v, paddr_t *L2_gpa,
> bool_t access_r, bool_t access_w, bool_t access_x);
>
>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] nested EPT: fixing wrong handling for L2 guest's direct mmio access
2014-01-17 8:59 ` Egger, Christoph
@ 2014-01-17 13:10 ` Tim Deegan
0 siblings, 0 replies; 4+ messages in thread
From: Tim Deegan @ 2014-01-17 13:10 UTC (permalink / raw)
To: Egger, Christoph
Cc: JBeulich, andrew.cooper3, eddie.dong, xen-devel, jun.nakajima,
Yang Zhang, xiantao.zhang
At 09:59 +0100 on 17 Jan (1389949194), Egger, Christoph wrote:
> On 17.01.14 07:35, Yang Zhang wrote:
> > From: Yang Zhang <yang.z.zhang@Intel.com>
> >
> > L2 guest will access the physical device directly(nested VT-d). For such access,
> > Shadow EPT table should point to device's MMIO. But in current logic, L0 doesn't
> > distinguish the MMIO whether from qemu or physical device when building shadow EPT table.
> > This is wrong. This patch will setup the correct shadow EPT table for such MMIO ranges.
> >
> > Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
> > ---
> > xen/arch/x86/mm/hap/nested_hap.c | 10 ++++++++--
> > xen/include/asm-x86/hvm/nestedhvm.h | 1 +
> > 2 files changed, 9 insertions(+), 2 deletions(-)
> >
> > diff --git a/xen/arch/x86/mm/hap/nested_hap.c b/xen/arch/x86/mm/hap/nested_hap.c
> > index c2ef1d1..38e2327 100644
> > --- a/xen/arch/x86/mm/hap/nested_hap.c
> > +++ b/xen/arch/x86/mm/hap/nested_hap.c
> > @@ -170,8 +170,11 @@ nestedhap_walk_L0_p2m(struct p2m_domain *p2m, paddr_t L1_gpa, paddr_t *L0_gpa,
> > mfn = get_gfn_type_access(p2m, L1_gpa >> PAGE_SHIFT, p2mt, p2ma,
> > 0, page_order);
> >
> > + rc = NESTEDHVM_PAGEFAULT_DIRECT_MMIO;
> > + if ( *p2mt == p2m_mmio_direct )
> > + goto direct_mmio_out;
> > rc = NESTEDHVM_PAGEFAULT_MMIO;
> > - if ( p2m_is_mmio(*p2mt) )
> > + if ( *p2mt == p2m_mmio_dm )
> > goto out;
>
> Why does p2m_is_mmio() not cover p2m_mmio_direct ?
It does. This code is changing to cover the two kinds of mmio
separately.
Tim.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] nested EPT: fixing wrong handling for L2 guest's direct mmio access
2014-01-17 6:35 [PATCH] nested EPT: fixing wrong handling for L2 guest's direct mmio access Yang Zhang
2014-01-17 8:59 ` Egger, Christoph
@ 2014-01-17 13:16 ` Tim Deegan
1 sibling, 0 replies; 4+ messages in thread
From: Tim Deegan @ 2014-01-17 13:16 UTC (permalink / raw)
To: Yang Zhang
Cc: JBeulich, andrew.cooper3, eddie.dong, xen-devel, jun.nakajima,
xiantao.zhang
At 14:35 +0800 on 17 Jan (1389965708), Yang Zhang wrote:
> From: Yang Zhang <yang.z.zhang@Intel.com>
>
> L2 guest will access the physical device directly(nested VT-d). For such access,
> Shadow EPT table should point to device's MMIO. But in current logic, L0 doesn't
> distinguish the MMIO whether from qemu or physical device when building shadow EPT table.
> This is wrong. This patch will setup the correct shadow EPT table for such MMIO ranges.
>
> Signed-off-by: Yang Zhang <yang.z.zhang@Intel.com>
Acked-by: Tim Deegan <tim@xen.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2014-01-17 13:16 UTC | newest]
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2014-01-17 6:35 [PATCH] nested EPT: fixing wrong handling for L2 guest's direct mmio access Yang Zhang
2014-01-17 8:59 ` Egger, Christoph
2014-01-17 13:10 ` Tim Deegan
2014-01-17 13:16 ` Tim Deegan
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