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From: Jan Kiszka <jan.kiszka@siemens.com>
To: Peter Zijlstra <a.p.zijlstra@chello.nl>,
	Ingo Molnar <mingo@elte.hu>, Thomas Gleixner <tglx@linutronix.de>,
	"H. Peter Anvin" <hpa@zytor.com>
Cc: Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: x86: Inconsistent xAPIC synchronization in arch_irq_work_raise?
Date: Tue, 21 Jan 2014 14:02:06 +0100	[thread overview]
Message-ID: <52DE6FCE.2050708@siemens.com> (raw)

Hi all,

while trying to plug a race in the CPU hotplug code on xAPIC systems, I
was analyzing IPI transmission patterns. The handlers in
arch/x86/include/asm/ipi.h first wait for ICR, then send. In contrast,
arch_irq_work_raise sends the self-IPI directly and then waits. This
looks inconsistent. Is it intended?

BTW, the races are in wakeup_secondary_cpu_via_init and
wakeup_secondary_cpu_via_nmi (lacking IRQ disable around ICR accesses).
There we also send first, then wait for completion. But I guess that is
due to the code originally only being used during boot. Will send fixes
for those once the sync pattern is clear to me.

Jan

-- 
Siemens AG, Corporate Technology, CT RTC ITP SES-DE
Corporate Competence Center Embedded Linux

             reply	other threads:[~2014-01-21 13:28 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-01-21 13:02 Jan Kiszka [this message]
2014-01-21 14:01 ` x86: Inconsistent xAPIC synchronization in arch_irq_work_raise? Peter Zijlstra
2014-01-21 14:10   ` Ingo Molnar
2014-01-21 14:11   ` Jan Kiszka
2014-01-21 14:34     ` Jan Kiszka
2014-01-21 14:51   ` Peter Zijlstra
2014-01-21 23:20     ` Huang Ying
2014-01-22 18:43       ` Andi Kleen
2014-01-23 18:51         ` Jan Kiszka
2014-01-23 19:11           ` Peter Zijlstra
2014-01-23 19:22           ` Andi Kleen
2014-01-23 19:51             ` Jan Kiszka
2014-01-23 20:17               ` Andi Kleen

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