* [U-Boot] [PATCH] mx6qsabreauto: Update imximage.cfg @ 2014-01-27 16:05 Fabio Estevam 2014-01-27 16:05 ` [U-Boot] [PATCH 2/2] mx6qsabreauto: Add splash screen support Fabio Estevam 2014-02-11 10:26 ` [U-Boot] [PATCH] mx6qsabreauto: Update imximage.cfg Stefano Babic 0 siblings, 2 replies; 4+ messages in thread From: Fabio Estevam @ 2014-01-27 16:05 UTC (permalink / raw) To: u-boot Use the latest DDR and clock settings as the one from Freescale BSP. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> --- board/freescale/mx6qsabreauto/imximage.cfg | 136 +++++++++++++---------------- 1 file changed, 59 insertions(+), 77 deletions(-) diff --git a/board/freescale/mx6qsabreauto/imximage.cfg b/board/freescale/mx6qsabreauto/imximage.cfg index 6d192a6..16bf473 100644 --- a/board/freescale/mx6qsabreauto/imximage.cfg +++ b/board/freescale/mx6qsabreauto/imximage.cfg @@ -29,119 +29,101 @@ BOOT_FROM sd * Address absolute address of the register * value value to be stored in the register */ +DATA 4 0x020e0798 0x000C0000 +DATA 4 0x020e0758 0x00000000 +DATA 4 0x020e0588 0x00000030 +DATA 4 0x020e0594 0x00000030 +DATA 4 0x020e056c 0x00000030 +DATA 4 0x020e0578 0x00000030 +DATA 4 0x020e074c 0x00000030 +DATA 4 0x020e057c 0x00000030 +DATA 4 0x020e058c 0x00000000 +DATA 4 0x020e059c 0x00000030 +DATA 4 0x020e05a0 0x00000030 +DATA 4 0x020e078c 0x00000030 +DATA 4 0x020e0750 0x00020000 DATA 4 0x020e05a8 0x00000028 DATA 4 0x020e05b0 0x00000028 DATA 4 0x020e0524 0x00000028 DATA 4 0x020e051c 0x00000028 - DATA 4 0x020e0518 0x00000028 DATA 4 0x020e050c 0x00000028 DATA 4 0x020e05b8 0x00000028 DATA 4 0x020e05c0 0x00000028 - -DATA 4 0x020e05ac 0x00000028 -DATA 4 0x020e05b4 0x00000028 -DATA 4 0x020e0528 0x00000028 -DATA 4 0x020e0520 0x00000028 - -DATA 4 0x020e0514 0x00000028 -DATA 4 0x020e0510 0x00000028 -DATA 4 0x020e05bc 0x00000028 -DATA 4 0x020e05c4 0x00000028 - -DATA 4 0x020e056c 0x00000030 -DATA 4 0x020e0578 0x00000030 -DATA 4 0x020e0588 0x00000030 -DATA 4 0x020e0594 0x00000030 - -DATA 4 0x020e057c 0x00000030 -DATA 4 0x020e0590 0x00000030 -DATA 4 0x020e0598 0x00000030 -DATA 4 0x020e058c 0x00000000 - -DATA 4 0x020e059c 0x00003030 -DATA 4 0x020e05a0 0x00003030 +DATA 4 0x020e0774 0x00020000 DATA 4 0x020e0784 0x00000028 DATA 4 0x020e0788 0x00000028 - DATA 4 0x020e0794 0x00000028 DATA 4 0x020e079c 0x00000028 DATA 4 0x020e07a0 0x00000028 DATA 4 0x020e07a4 0x00000028 - DATA 4 0x020e07a8 0x00000028 DATA 4 0x020e0748 0x00000028 -DATA 4 0x020e074c 0x00000030 -DATA 4 0x020e0750 0x00020000 - -DATA 4 0x020e0758 0x00000000 -DATA 4 0x020e0774 0x00020000 -DATA 4 0x020e078c 0x00000030 -DATA 4 0x020e0798 0x000C0000 - +DATA 4 0x020e05ac 0x00000028 +DATA 4 0x020e05b4 0x00000028 +DATA 4 0x020e0528 0x00000028 +DATA 4 0x020e0520 0x00000028 +DATA 4 0x020e0514 0x00000028 +DATA 4 0x020e0510 0x00000028 +DATA 4 0x020e05bc 0x00000028 +DATA 4 0x020e05c4 0x00000028 +DATA 4 0x021b0800 0xa1390003 +DATA 4 0x021b080c 0x001F001F +DATA 4 0x021b0810 0x001F001F +DATA 4 0x021b480c 0x001F001F +DATA 4 0x021b4810 0x001F001F +DATA 4 0x021b083c 0x43260335 +DATA 4 0x021b0840 0x031A030B +DATA 4 0x021b483c 0x4323033B +DATA 4 0x021b4840 0x0323026F +DATA 4 0x021b0848 0x483D4545 +DATA 4 0x021b4848 0x44433E48 +DATA 4 0x021b0850 0x41444840 +DATA 4 0x021b4850 0x4835483E DATA 4 0x021b081c 0x33333333 DATA 4 0x021b0820 0x33333333 DATA 4 0x021b0824 0x33333333 DATA 4 0x021b0828 0x33333333 - DATA 4 0x021b481c 0x33333333 DATA 4 0x021b4820 0x33333333 DATA 4 0x021b4824 0x33333333 DATA 4 0x021b4828 0x33333333 - +DATA 4 0x021b08b8 0x00000800 +DATA 4 0x021b48b8 0x00000800 +DATA 4 0x021b0004 0x00020036 +DATA 4 0x021b0008 0x09444040 +DATA 4 0x021b000c 0x8A8F7955 +DATA 4 0x021b0010 0xFF328F64 +DATA 4 0x021b0014 0x01FF00DB DATA 4 0x021b0018 0x00001740 - DATA 4 0x021b001c 0x00008000 -DATA 4 0x021b000c 0x8A8F7975 -DATA 4 0x021b0010 0xFF538E64 -DATA 4 0x021b0014 0x01FF00DB -DATA 4 0x021b002c 0x000026D2 - -DATA 4 0x021b0030 0x008F0E21 -DATA 4 0x021b0008 0x09444040 -DATA 4 0x021b0004 0x00020036 +DATA 4 0x021b002c 0x000026d2 +DATA 4 0x021b0030 0x008F1023 DATA 4 0x021b0040 0x00000047 DATA 4 0x021b0000 0x841A0000 - DATA 4 0x021b001c 0x04088032 DATA 4 0x021b001c 0x00008033 -DATA 4 0x021b001c 0x00428031 +DATA 4 0x021b001c 0x00048031 DATA 4 0x021b001c 0x09408030 - DATA 4 0x021b001c 0x04008040 -DATA 4 0x021b0800 0xA1380003 DATA 4 0x021b0020 0x00005800 -DATA 4 0x021b0818 0x00000007 -DATA 4 0x021b4818 0x00000007 - -/* Calibration values based on ARD and 528MHz */ -DATA 4 0x021b083c 0x434B0358 -DATA 4 0x021b0840 0x033D033C -DATA 4 0x021b483c 0x03520362 -DATA 4 0x021b4840 0x03480318 -DATA 4 0x021b0848 0x41383A3C -DATA 4 0x021b4848 0x3F3C374A -DATA 4 0x021b0850 0x42434444 -DATA 4 0x021b4850 0x4932473A - -DATA 4 0x021b080c 0x001F001F -DATA 4 0x021b0810 0x001F001F - -DATA 4 0x021b480c 0x001F001F -DATA 4 0x021b4810 0x001F001F - -DATA 4 0x021b08b8 0x00000800 -DATA 4 0x021b48b8 0x00000800 - -DATA 4 0x021b0404 0x00011006 +DATA 4 0x021b0818 0x00011117 +DATA 4 0x021b4818 0x00011117 DATA 4 0x021b0004 0x00025576 - +DATA 4 0x021b0404 0x00011006 DATA 4 0x021b001c 0x00000000 +/* set the default clock gate to save power */ DATA 4 0x020c4068 0x00C03F3F -DATA 4 0x020c406c 0x0030FC00 +DATA 4 0x020c406c 0x0030FC03 DATA 4 0x020c4070 0x0FFFC000 DATA 4 0x020c4074 0x3FF00000 -DATA 4 0x020c4078 0x00FFF300 -DATA 4 0x020c407c 0x0F0000C3 -DATA 4 0x020c4080 0x000003FF +DATA 4 0x020c4078 0xFFFFF300 +DATA 4 0x020c407c 0x0F0000F3 +DATA 4 0x020c4080 0x00000FFF + +/* enable AXI cache for VDOA/VPU/IPU */ +DATA 4 0x020e0010 0xF00000CF +/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ +DATA 4 0x020e0018 0x007F007F +DATA 4 0x020e001c 0x007F007F -- 1.8.1.2 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH 2/2] mx6qsabreauto: Add splash screen support 2014-01-27 16:05 [U-Boot] [PATCH] mx6qsabreauto: Update imximage.cfg Fabio Estevam @ 2014-01-27 16:05 ` Fabio Estevam 2014-01-28 10:36 ` Stefano Babic 2014-02-11 10:26 ` [U-Boot] [PATCH] mx6qsabreauto: Update imximage.cfg Stefano Babic 1 sibling, 1 reply; 4+ messages in thread From: Fabio Estevam @ 2014-01-27 16:05 UTC (permalink / raw) To: u-boot Allow the splash screen to work on LVDS or HDMI. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> --- board/freescale/mx6qsabreauto/mx6qsabreauto.c | 195 ++++++++++++++++++++++++++ include/configs/mx6qsabreauto.h | 16 +++ 2 files changed, 211 insertions(+) diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c index 928dadf..44fc71a 100644 --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c @@ -23,6 +23,10 @@ #include <netdev.h> #include <asm/arch/sys_proto.h> #include <i2c.h> +#include <asm/arch/mxc_hdmi.h> +#include <asm/arch/crm_regs.h> +#include <linux/fb.h> +#include <ipu_pixfmt.h> DECLARE_GLOBAL_DATA_PTR; @@ -43,6 +47,8 @@ DECLARE_GLOBAL_DATA_PTR; #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) +#define LVDS_BACKLIGHT IMX_GPIO_NR(2, 9) + int dram_init(void) { gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); @@ -132,6 +138,10 @@ iomux_v3_cfg_t const usdhc3_pads[] = { MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), }; +static iomux_v3_cfg_t const backlight[] = { + MX6_PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(ENET_PAD_CTRL), +}; + static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); @@ -190,6 +200,186 @@ int board_phy_config(struct phy_device *phydev) return 0; } +#if defined(CONFIG_VIDEO_IPUV3) +struct display_info_t { + int bus; + int addr; + int pixfmt; + int (*detect)(struct display_info_t const *dev); + void (*enable)(struct display_info_t const *dev); + struct fb_videomode mode; +}; + +static int detect_hdmi(struct display_info_t const *dev) +{ + struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; + return readb(&hdmi->phy_stat0) & HDMI_DVI_STAT; +} + +static void disable_lvds(struct display_info_t const *dev) +{ + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + int reg = readl(&iomux->gpr[2]); + reg &= ~IOMUXC_GPR2_LVDS_CH0_MODE_MASK; + writel(reg, &iomux->gpr[2]); +} + +static void do_enable_hdmi(struct display_info_t const *dev) +{ + disable_lvds(dev); + imx_enable_hdmi_phy(); +} + +static void enable_lvds(struct display_info_t const *dev) +{ + struct iomuxc *iomux = (struct iomuxc *) + IOMUXC_BASE_ADDR; + u32 reg = readl(&iomux->gpr[2]); + reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT; + writel(reg, &iomux->gpr[2]); +} + +static struct display_info_t const displays[] = {{ + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB666, + .detect = NULL, + .enable = enable_lvds, + .mode = { + .name = "Hannstar-XGA", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} }, { + .bus = -1, + .addr = 0, + .pixfmt = IPU_PIX_FMT_RGB24, + .detect = detect_hdmi, + .enable = do_enable_hdmi, + .mode = { + .name = "HDMI", + .refresh = 60, + .xres = 1024, + .yres = 768, + .pixclock = 15385, + .left_margin = 220, + .right_margin = 40, + .upper_margin = 21, + .lower_margin = 7, + .hsync_len = 60, + .vsync_len = 10, + .sync = FB_SYNC_EXT, + .vmode = FB_VMODE_NONINTERLACED +} } }; + +int board_video_skip(void) +{ + int i; + int ret; + char const *panel = getenv("panel"); + if (!panel) { + for (i = 0; i < ARRAY_SIZE(displays); i++) { + struct display_info_t const *dev = displays+i; + if (dev->detect && dev->detect(dev)) { + panel = dev->mode.name; + printf("auto-detected panel %s\n", panel); + break; + } + } + if (!panel) { + panel = displays[0].mode.name; + printf("No panel detected: default to %s\n", panel); + i = 0; + } + } else { + for (i = 0; i < ARRAY_SIZE(displays); i++) { + if (!strcmp(panel, displays[i].mode.name)) + break; + } + } + if (i < ARRAY_SIZE(displays)) { + ret = ipuv3_fb_init(&displays[i].mode, 0, + displays[i].pixfmt); + if (!ret) { + displays[i].enable(displays+i); + printf("Display: %s (%ux%u)\n", + displays[i].mode.name, + displays[i].mode.xres, + displays[i].mode.yres); + } else + printf("LCD %s cannot be configured: %d\n", + displays[i].mode.name, ret); + } else { + printf("unsupported panel %s\n", panel); + return -EINVAL; + } + + return 0; +} + +static void setup_display(void) +{ + struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; + int reg; + + enable_ipu_clock(); + imx_setup_hdmi(); + + /* Turn on LDB0, LDB1, IPU,IPU DI0 clocks */ + reg = readl(&mxc_ccm->CCGR3); + reg |= MXC_CCM_CCGR3_LDB_DI0_MASK; + writel(reg, &mxc_ccm->CCGR3); + + /* set LDB0, LDB1 clk select to 011/011 */ + reg = readl(&mxc_ccm->cs2cdr); + reg &= ~MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK; + reg |= (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET); + writel(reg, &mxc_ccm->cs2cdr); + + reg = readl(&mxc_ccm->cscmr2); + reg |= MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV; + writel(reg, &mxc_ccm->cscmr2); + + reg = readl(&mxc_ccm->chsccdr); + reg |= (CHSCCDR_CLK_SEL_LDB_DI0 + << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET); + writel(reg, &mxc_ccm->chsccdr); + + reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES + | IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW + | IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG + | IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT + | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; + writel(reg, &iomux->gpr[2]); + + reg = readl(&iomux->gpr[3]); + reg = (reg & ~(IOMUXC_GPR3_LVDS0_MUX_CTL_MASK + | IOMUXC_GPR3_HDMI_MUX_CTL_MASK)) + | (IOMUXC_GPR3_MUX_SRC_IPU1_DI0 + << IOMUXC_GPR3_LVDS1_MUX_CTL_OFFSET); + writel(reg, &iomux->gpr[3]); +} +#endif /* CONFIG_VIDEO_IPUV3 */ + +/* + * Do not overwrite the console + * Use always serial for U-Boot console + */ +int overwrite_console(void) +{ + return 1; +} + int board_eth_init(bd_t *bis) { setup_iomux_enet(); @@ -238,6 +428,11 @@ int board_early_init_f(void) { setup_iomux_uart(); +#if defined(CONFIG_VIDEO_IPUV3) + imx_iomux_v3_setup_multiple_pads(backlight, ARRAY_SIZE(backlight)); + gpio_direction_output(LVDS_BACKLIGHT, 1); + setup_display(); +#endif return 0; } diff --git a/include/configs/mx6qsabreauto.h b/include/configs/mx6qsabreauto.h index dbbb6f0..95c0803 100644 --- a/include/configs/mx6qsabreauto.h +++ b/include/configs/mx6qsabreauto.h @@ -41,4 +41,20 @@ #define CONFIG_SYS_I2C_MXC #define CONFIG_SYS_I2C_SPEED 100000 +/* Framebuffer */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_IPUV3 +#define CONFIG_CFB_CONSOLE +#define CONFIG_VGA_AS_SINGLE_DEVICE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE +#define CONFIG_VIDEO_BMP_RLE8 +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_BMP_16BPP +#define CONFIG_VIDEO_LOGO +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_IPUV3_CLK 260000000 +#define CONFIG_IMX_HDMI + #endif /* __MX6QSABREAUTO_CONFIG_H */ -- 1.8.1.2 ^ permalink raw reply related [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH 2/2] mx6qsabreauto: Add splash screen support 2014-01-27 16:05 ` [U-Boot] [PATCH 2/2] mx6qsabreauto: Add splash screen support Fabio Estevam @ 2014-01-28 10:36 ` Stefano Babic 0 siblings, 0 replies; 4+ messages in thread From: Stefano Babic @ 2014-01-28 10:36 UTC (permalink / raw) To: u-boot Hi Fabio, On 27/01/2014 17:05, Fabio Estevam wrote: > Allow the splash screen to work on LVDS or HDMI. > > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> > --- > board/freescale/mx6qsabreauto/mx6qsabreauto.c | 195 ++++++++++++++++++++++++++ > include/configs/mx6qsabreauto.h | 16 +++ > 2 files changed, 211 insertions(+) > > diff --git a/board/freescale/mx6qsabreauto/mx6qsabreauto.c b/board/freescale/mx6qsabreauto/mx6qsabreauto.c > index 928dadf..44fc71a 100644 > --- a/board/freescale/mx6qsabreauto/mx6qsabreauto.c > +++ b/board/freescale/mx6qsabreauto/mx6qsabreauto.c > @@ -23,6 +23,10 @@ > #include <netdev.h> > #include <asm/arch/sys_proto.h> > #include <i2c.h> > +#include <asm/arch/mxc_hdmi.h> > +#include <asm/arch/crm_regs.h> > +#include <linux/fb.h> > +#include <ipu_pixfmt.h> > > DECLARE_GLOBAL_DATA_PTR; > > @@ -43,6 +47,8 @@ DECLARE_GLOBAL_DATA_PTR; > > #define PC MUX_PAD_CTRL(I2C_PAD_CTRL) > > +#define LVDS_BACKLIGHT IMX_GPIO_NR(2, 9) > + > int dram_init(void) > { > gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); > @@ -132,6 +138,10 @@ iomux_v3_cfg_t const usdhc3_pads[] = { > MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), > }; > > +static iomux_v3_cfg_t const backlight[] = { > + MX6_PAD_SD4_DAT1__GPIO2_IO09 | MUX_PAD_CTRL(ENET_PAD_CTRL), > +}; > + > static void setup_iomux_uart(void) > { > imx_iomux_v3_setup_multiple_pads(uart4_pads, ARRAY_SIZE(uart4_pads)); > @@ -190,6 +200,186 @@ int board_phy_config(struct phy_device *phydev) > return 0; > } > > +#if defined(CONFIG_VIDEO_IPUV3) > +struct display_info_t { > + int bus; > + int addr; > + int pixfmt; > + int (*detect)(struct display_info_t const *dev); > + void (*enable)(struct display_info_t const *dev); > + struct fb_videomode mode; > +}; > + > +static int detect_hdmi(struct display_info_t const *dev) > +{ > + struct hdmi_regs *hdmi = (struct hdmi_regs *)HDMI_ARB_BASE_ADDR; > + return readb(&hdmi->phy_stat0) & HDMI_DVI_STAT; > +} > + > +static void disable_lvds(struct display_info_t const *dev) > +{ > + struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; > + int reg = readl(&iomux->gpr[2]); > + reg &= ~IOMUXC_GPR2_LVDS_CH0_MODE_MASK; > + writel(reg, &iomux->gpr[2]); > +} > + > +static void do_enable_hdmi(struct display_info_t const *dev) > +{ > + disable_lvds(dev); > + imx_enable_hdmi_phy(); > +} > + > +static void enable_lvds(struct display_info_t const *dev) > +{ > + struct iomuxc *iomux = (struct iomuxc *) > + IOMUXC_BASE_ADDR; > + u32 reg = readl(&iomux->gpr[2]); > + reg |= IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT; > + writel(reg, &iomux->gpr[2]); > +} > + > +static struct display_info_t const displays[] = {{ > + .bus = -1, > + .addr = 0, > + .pixfmt = IPU_PIX_FMT_RGB666, > + .detect = NULL, > + .enable = enable_lvds, > + .mode = { > + .name = "Hannstar-XGA", > + .refresh = 60, > + .xres = 1024, > + .yres = 768, > + .pixclock = 15385, > + .left_margin = 220, > + .right_margin = 40, > + .upper_margin = 21, > + .lower_margin = 7, > + .hsync_len = 60, > + .vsync_len = 10, > + .sync = FB_SYNC_EXT, > + .vmode = FB_VMODE_NONINTERLACED > +} }, { > + .bus = -1, > + .addr = 0, > + .pixfmt = IPU_PIX_FMT_RGB24, > + .detect = detect_hdmi, > + .enable = do_enable_hdmi, > + .mode = { > + .name = "HDMI", > + .refresh = 60, > + .xres = 1024, > + .yres = 768, > + .pixclock = 15385, > + .left_margin = 220, > + .right_margin = 40, > + .upper_margin = 21, > + .lower_margin = 7, > + .hsync_len = 60, > + .vsync_len = 10, > + .sync = FB_SYNC_EXT, > + .vmode = FB_VMODE_NONINTERLACED > +} } }; > + > +int board_video_skip(void) > +{ > + int i; > + int ret; > + char const *panel = getenv("panel"); > + if (!panel) { > + for (i = 0; i < ARRAY_SIZE(displays); i++) { > + struct display_info_t const *dev = displays+i; > + if (dev->detect && dev->detect(dev)) { > + panel = dev->mode.name; > + printf("auto-detected panel %s\n", panel); > + break; > + } > + } > + if (!panel) { > + panel = displays[0].mode.name; > + printf("No panel detected: default to %s\n", panel); > + i = 0; > + } > + } else { > + for (i = 0; i < ARRAY_SIZE(displays); i++) { > + if (!strcmp(panel, displays[i].mode.name)) > + break; > + } > + } > + if (i < ARRAY_SIZE(displays)) { > + ret = ipuv3_fb_init(&displays[i].mode, 0, > + displays[i].pixfmt); > + if (!ret) { > + displays[i].enable(displays+i); > + printf("Display: %s (%ux%u)\n", > + displays[i].mode.name, > + displays[i].mode.xres, > + displays[i].mode.yres); > + } else > + printf("LCD %s cannot be configured: %d\n", > + displays[i].mode.name, ret); > + } else { > + printf("unsupported panel %s\n", panel); > + return -EINVAL; > + } > + > + return 0; > +} I think this is the fourth copy of the same function. We need to move it to a common place instead of copying. Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 4+ messages in thread
* [U-Boot] [PATCH] mx6qsabreauto: Update imximage.cfg 2014-01-27 16:05 [U-Boot] [PATCH] mx6qsabreauto: Update imximage.cfg Fabio Estevam 2014-01-27 16:05 ` [U-Boot] [PATCH 2/2] mx6qsabreauto: Add splash screen support Fabio Estevam @ 2014-02-11 10:26 ` Stefano Babic 1 sibling, 0 replies; 4+ messages in thread From: Stefano Babic @ 2014-02-11 10:26 UTC (permalink / raw) To: u-boot On 27/01/2014 17:05, Fabio Estevam wrote: > Use the latest DDR and clock settings as the one from Freescale BSP. > > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> > --- Applied to u-boot-imx, thanks ! Best regards, Stefano Babic -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sbabic at denx.de ===================================================================== ^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2014-02-11 10:26 UTC | newest] Thread overview: 4+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-01-27 16:05 [U-Boot] [PATCH] mx6qsabreauto: Update imximage.cfg Fabio Estevam 2014-01-27 16:05 ` [U-Boot] [PATCH 2/2] mx6qsabreauto: Add splash screen support Fabio Estevam 2014-01-28 10:36 ` Stefano Babic 2014-02-11 10:26 ` [U-Boot] [PATCH] mx6qsabreauto: Update imximage.cfg Stefano Babic
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