[Qemu-devel] GDB info registers vs. monitor info registers

[Qemu-devel] GDB info registers vs. monitor info registers

[Sebastian Huber]

Hello,

I have some trouble to implement a proper system reset for SPARC/LEON.  It 
seems that a Qemu system reset doesn't propagate the state change thoroughly.

(gdb) monitor system_reset
(gdb) info registers
g0             0x0      0
g1             0x40001fa8       1073749928
g2             0x40054f20       1074089760
g3             0x6      6
g4             0x6      6
g5             0x0      0
g6             0x0      0
g7             0x4005d800       1074124800
o0             0x0      0
o1             0x4002c614       1073923604
o2             0x1      1
o3             0x0      0
o4             0x8      8
o5             0x4004c37c       1074054012
sp             0x4005aad8       0x4005aad8
o7             0x4004f6bc       1074067132
l0             0xf30000c3       -218103613
l1             0x40013490       1073820816
l2             0x40013494       1073820820
l3             0x80     128
l4             0xf30000c3       -218103613
l5             0xf30000c3       -218103613
l6             0x3e     62
l7             0x3f     63
i0             0x40054f20       1074089760
i1             0x43fffda8       1140850088
i2             0x1      1
i3             0x0      0
i4             0x55493120       1430860064
i5             0x100    256
fp             0x4005abc0       0x4005abc0
i7             0x4003a11c       1073979676
y              0x0      0
psr            0xf34000e3       [ #0 #1 ET PS S #22 #24 #25 #28 #29 #30 #31 ]
wim            0x20     32
tbr            0x40000060       1073741920
pc             0x40001fb0       0x40001fb0 <Init(rtems_task_argument)+8>
npc            0x40001fb4       0x40001fb4 <Init(rtems_task_argument)+12>
fsr            0x0      [ ]
csr            0x0      0
(gdb) monitor info registers
pc: 40000000  npc: 40000004
%g0-7: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
%o0-7: 00000000 00000001 00000002 00000003 00000004 00000005 00000006 00000007
%l0-7: 00000008 00000009 0000000a 0000000b 0000000c 0000000d 0000000e 0000000f
%i0-7: 00000010 00000011 00000012 00000013 00000014 00000015 00000016 00000017
%f00:  0000000000000000 0000000000000000 0000000000000000 0000000000000000
%f08:  0000000000000000 0000000000000000 0000000000000000 0000000000000000
%f16:  0000000000000000 0000000000000000 0000000000000000 0000000000000000
%f24:  0000000000000000 0000000000000000 0000000000000000 0000000000000000
psr: f30000c0 (icc: ---- SPE: SP-) wim: 00000001
fsr: 00000000 y: 00000000

A "monitor system_reset" triggers a call to main_cpu_reset 
(hw/sparc/leon3.c:51) and the CPUSPARCState is set up correctly, but via GDB I 
see no state change and the program executes as if nothing happened.

Does this work as intended?

-- 
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax     : +49 89 189 47 41-09
E-Mail  : sebastian.huber@embedded-brains.de
PGP     : Public key available on request.

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