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diff for duplicates of <52F2122A.9080603@st.com>

diff --git a/a/1.txt b/N1/1.txt
index 831004e..810283b 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -8,7 +8,7 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 > Hi Patrice,
 >
 > On 30/01/14 14:55, Patrice CHOTARD wrote:
->> From: Alexandre TORGUE <alexandre.torgue@st.com>
+>> From: Alexandre TORGUE <alexandre.torgue-qxv4g6HH51o@public.gmane.org>
 >>
 >> The STid127 integrates all harware components to function as a cable modem
 > s/harware/hardware/
@@ -23,7 +23,7 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 >> 	-UART0
 >> 	-UART2
 >>
->> Signed-off-by: alexandre torgue <alexandre.torgue@st.com>
+>> Signed-off-by: alexandre torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>
 >> ---
 >>   arch/arm/boot/dts/stid127-clock.dtsi   |   31 ++++
 >>   arch/arm/boot/dts/stid127-pinctrl.dtsi |  245 ++++++++++++++++++++++++++++++++
@@ -43,14 +43,14 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 >> + * Copyright (C) 2013 STMicroelectronics (R&D) Limited
 > 2014
 >
->> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro@st.com>
->> + *	      Alexandre Torgue <alexandre.torgue@st.com>
+>> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>
+>> + *	      Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>
 >> + *
 >> + * This program is free software; you can redistribute it and/or modify
 >> + * it under the terms of the GNU General Public License version 2 as
 >> + * published by the Free Software Foundation.
 >> + */
->> +/ {Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
+>> +/ {Acked-by: Srinivas Kandagatla <srinivas.kandagatla-qxv4g6HH51o@public.gmane.org>
 >> +	clocks {
 >> +		/*
 >> +		 * ARM Peripheral clock for timers
@@ -64,7 +64,7 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 >> +		 * Bootloader initialized system infrastructure clock for
 >> +		 * serial devices.
 >> +		 */
->> +		CLK_IC_LP_HD: clockgenA0 at 29 {
+>> +		CLK_IC_LP_HD: clockgenA0@29 {
 >> +			#clock-cells = <0>;
 >> +			compatible = "fixed-clock";
 >> +			clock-frequency = <100000000>;
@@ -82,8 +82,8 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 >> + * Copyright (C) 2012 STMicroelectronics Limited.
 > 2014
 >
->> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro@st.com>
->> + *	      Alexandre Torgue <alexandre.torgue@st.com>
+>> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>
+>> + *	      Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>
 >> + *
 >> + * This program is free software; you can redistribute it and/or modify
 >> + * it under the terms of the GNU General Public License version 2 as
@@ -133,7 +133,7 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 > All these patches are due to be in v3.15.
 >
 >> +
->> +			PIO0: gpio at febe0000 {
+>> +			PIO0: gpio@febe0000 {
 >> +				gpio-controller;
 >> +				#gpio-cells = <1>;
 >> +				reg = <0 0x100>;
@@ -157,8 +157,8 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 >> +/*
 >> + * Copyright (C) 2013 STMicroelectronics Limited.
 > 2014
->> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro@st.com>
->> + *	      Alexandre Torgue <alexandre.torgue@st.com>
+>> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>
+>> + *	      Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>
 >> + *
 >> + * This program is free software; you can redistribute it and/or modify
 >> + * it under the terms of the GNU General Public License version 2 as
@@ -176,19 +176,19 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 >> +		#address-cells = <1>;
 >> +		#size-cells = <0>;
 >> +
->> +		cpu at 0 {
+>> +		cpu@0 {
 >> +			device_type = "cpu";
 >> +			compatible = "arm,cortex-a9";
 >> +			reg = <0>;
 >> +		};
->> +		cpu at 1 {
+>> +		cpu@1 {
 >> +			device_type = "cpu";
 >> +			compatible = "arm,cortex-a9";
 >> +			reg = <1>;
 >> +		};
 >> +	};
 >> +
->> +	intc: interrupt-controller at fffe1000 {
+>> +	intc: interrupt-controller@fffe1000 {
 >> +		compatible = "arm,cortex-a9-gic";
 >> +		#interrupt-cells = <3>;
 >> +		interrupt-controller;
@@ -196,12 +196,12 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 >> +		      <0xfffe0100 0x100>;
 >> +	};
 >> +
->> +	scu at fffe0000 {
+>> +	scu@fffe0000 {
 >> +		compatible = "arm,cortex-a9-scu";
 >> +		reg = <0xfffe0000 0x1000>;
 >> +	};
 >> +
->> +	timer at fffe0200 {
+>> +	timer@fffe0200 {
 >> +			interrupt-parent = <&intc>;
 >> +			compatible = "arm,cortex-a9-global-timer";
 >> +			reg = <0xfffe0200 0x100>;
@@ -211,3 +211,8 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 >
 > Thanks,
 > srini
+
+--
+To unsubscribe from this list: send the line "unsubscribe devicetree" in
+the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+More majordomo info at  http://vger.kernel.org/majordomo-info.html
diff --git a/a/content_digest b/N1/content_digest
index e46d500..4102968 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,10 +1,23 @@
  "ref\01391093744-19905-1-git-send-email-patrice.chotard@st.com\0"
  "ref\01391093744-19905-4-git-send-email-patrice.chotard@st.com\0"
  "ref\052EB9C03.70009@st.com\0"
- "From\0patrice.chotard@st.com (Patrice Chotard)\0"
- "Subject\0[PATCH 3/4] ARM: dts: Add support of STid127 Soc.\0"
+ "ref\052EB9C03.70009-qxv4g6HH51o@public.gmane.org\0"
+ "From\0Patrice Chotard <patrice.chotard-qxv4g6HH51o@public.gmane.org>\0"
+ "Subject\0Re: [PATCH 3/4] ARM: dts: Add support of STid127 Soc.\0"
  "Date\0Wed, 5 Feb 2014 11:27:54 +0100\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0srinivas kandagatla <srinivas.kandagatla-qxv4g6HH51o@public.gmane.org>"
+  Stuart Menefy <stuart.menefy-qxv4g6HH51o@public.gmane.org>
+  Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org>
+  linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
+  kernel-F5mvAk5X5gdBDgjK7y7TUQ@public.gmane.org
+  linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
+  Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
+  Grant Likely <grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
+  Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
+ " devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0"
+ "Cc\0maxime.coquelin-qxv4g6HH51o@public.gmane.org"
+  alexandre.torgue-qxv4g6HH51o@public.gmane.org
+ " Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>\0"
  "\00:1\0"
  "b\0"
  "Hi Srinivas\n"
@@ -17,7 +30,7 @@
  "> Hi Patrice,\n"
  ">\n"
  "> On 30/01/14 14:55, Patrice CHOTARD wrote:\n"
- ">> From: Alexandre TORGUE <alexandre.torgue@st.com>\n"
+ ">> From: Alexandre TORGUE <alexandre.torgue-qxv4g6HH51o@public.gmane.org>\n"
  ">>\n"
  ">> The STid127 integrates all harware components to function as a cable modem\n"
  "> s/harware/hardware/\n"
@@ -32,7 +45,7 @@
  ">> \t-UART0\n"
  ">> \t-UART2\n"
  ">>\n"
- ">> Signed-off-by: alexandre torgue <alexandre.torgue@st.com>\n"
+ ">> Signed-off-by: alexandre torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>\n"
  ">> ---\n"
  ">>   arch/arm/boot/dts/stid127-clock.dtsi   |   31 ++++\n"
  ">>   arch/arm/boot/dts/stid127-pinctrl.dtsi |  245 ++++++++++++++++++++++++++++++++\n"
@@ -52,14 +65,14 @@
  ">> + * Copyright (C) 2013 STMicroelectronics (R&D) Limited\n"
  "> 2014\n"
  ">\n"
- ">> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro@st.com>\n"
- ">> + *\t      Alexandre Torgue <alexandre.torgue@st.com>\n"
+ ">> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>\n"
+ ">> + *\t      Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>\n"
  ">> + *\n"
  ">> + * This program is free software; you can redistribute it and/or modify\n"
  ">> + * it under the terms of the GNU General Public License version 2 as\n"
  ">> + * published by the Free Software Foundation.\n"
  ">> + */\n"
- ">> +/ {Acked-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>\n"
+ ">> +/ {Acked-by: Srinivas Kandagatla <srinivas.kandagatla-qxv4g6HH51o@public.gmane.org>\n"
  ">> +\tclocks {\n"
  ">> +\t\t/*\n"
  ">> +\t\t * ARM Peripheral clock for timers\n"
@@ -73,7 +86,7 @@
  ">> +\t\t * Bootloader initialized system infrastructure clock for\n"
  ">> +\t\t * serial devices.\n"
  ">> +\t\t */\n"
- ">> +\t\tCLK_IC_LP_HD: clockgenA0 at 29 {\n"
+ ">> +\t\tCLK_IC_LP_HD: clockgenA0@29 {\n"
  ">> +\t\t\t#clock-cells = <0>;\n"
  ">> +\t\t\tcompatible = \"fixed-clock\";\n"
  ">> +\t\t\tclock-frequency = <100000000>;\n"
@@ -91,8 +104,8 @@
  ">> + * Copyright (C) 2012 STMicroelectronics Limited.\n"
  "> 2014\n"
  ">\n"
- ">> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro@st.com>\n"
- ">> + *\t      Alexandre Torgue <alexandre.torgue@st.com>\n"
+ ">> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>\n"
+ ">> + *\t      Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>\n"
  ">> + *\n"
  ">> + * This program is free software; you can redistribute it and/or modify\n"
  ">> + * it under the terms of the GNU General Public License version 2 as\n"
@@ -142,7 +155,7 @@
  "> All these patches are due to be in v3.15.\n"
  ">\n"
  ">> +\n"
- ">> +\t\t\tPIO0: gpio at febe0000 {\n"
+ ">> +\t\t\tPIO0: gpio@febe0000 {\n"
  ">> +\t\t\t\tgpio-controller;\n"
  ">> +\t\t\t\t#gpio-cells = <1>;\n"
  ">> +\t\t\t\treg = <0 0x100>;\n"
@@ -166,8 +179,8 @@
  ">> +/*\n"
  ">> + * Copyright (C) 2013 STMicroelectronics Limited.\n"
  "> 2014\n"
- ">> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro@st.com>\n"
- ">> + *\t      Alexandre Torgue <alexandre.torgue@st.com>\n"
+ ">> + * Author(s): Giuseppe Cavallaro <peppe.cavallaro-qxv4g6HH51o@public.gmane.org>\n"
+ ">> + *\t      Alexandre Torgue <alexandre.torgue-qxv4g6HH51o@public.gmane.org>\n"
  ">> + *\n"
  ">> + * This program is free software; you can redistribute it and/or modify\n"
  ">> + * it under the terms of the GNU General Public License version 2 as\n"
@@ -185,19 +198,19 @@
  ">> +\t\t#address-cells = <1>;\n"
  ">> +\t\t#size-cells = <0>;\n"
  ">> +\n"
- ">> +\t\tcpu at 0 {\n"
+ ">> +\t\tcpu@0 {\n"
  ">> +\t\t\tdevice_type = \"cpu\";\n"
  ">> +\t\t\tcompatible = \"arm,cortex-a9\";\n"
  ">> +\t\t\treg = <0>;\n"
  ">> +\t\t};\n"
- ">> +\t\tcpu at 1 {\n"
+ ">> +\t\tcpu@1 {\n"
  ">> +\t\t\tdevice_type = \"cpu\";\n"
  ">> +\t\t\tcompatible = \"arm,cortex-a9\";\n"
  ">> +\t\t\treg = <1>;\n"
  ">> +\t\t};\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tintc: interrupt-controller at fffe1000 {\n"
+ ">> +\tintc: interrupt-controller@fffe1000 {\n"
  ">> +\t\tcompatible = \"arm,cortex-a9-gic\";\n"
  ">> +\t\t#interrupt-cells = <3>;\n"
  ">> +\t\tinterrupt-controller;\n"
@@ -205,12 +218,12 @@
  ">> +\t\t      <0xfffe0100 0x100>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tscu at fffe0000 {\n"
+ ">> +\tscu@fffe0000 {\n"
  ">> +\t\tcompatible = \"arm,cortex-a9-scu\";\n"
  ">> +\t\treg = <0xfffe0000 0x1000>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\ttimer at fffe0200 {\n"
+ ">> +\ttimer@fffe0200 {\n"
  ">> +\t\t\tinterrupt-parent = <&intc>;\n"
  ">> +\t\t\tcompatible = \"arm,cortex-a9-global-timer\";\n"
  ">> +\t\t\treg = <0xfffe0200 0x100>;\n"
@@ -219,6 +232,11 @@
  "> Fix the tab spacing here.\n"
  ">\n"
  "> Thanks,\n"
- > srini
+ "> srini\n"
+ "\n"
+ "--\n"
+ "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n"
+ "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n"
+ More majordomo info at  http://vger.kernel.org/majordomo-info.html
 
-c362905a496005c088cf4a8fd8e9f2599e2f686fc62cffc1a6af66501297731c
+da51d1b473487aae2610ce1263641b1ec3c92f47cbb74ef64d3ee180ed1596b0

diff --git a/a/1.txt b/N2/1.txt
index 831004e..832e0e3 100644
--- a/a/1.txt
+++ b/N2/1.txt
@@ -64,7 +64,7 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 >> +		 * Bootloader initialized system infrastructure clock for
 >> +		 * serial devices.
 >> +		 */
->> +		CLK_IC_LP_HD: clockgenA0 at 29 {
+>> +		CLK_IC_LP_HD: clockgenA0@29 {
 >> +			#clock-cells = <0>;
 >> +			compatible = "fixed-clock";
 >> +			clock-frequency = <100000000>;
@@ -133,7 +133,7 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 > All these patches are due to be in v3.15.
 >
 >> +
->> +			PIO0: gpio at febe0000 {
+>> +			PIO0: gpio@febe0000 {
 >> +				gpio-controller;
 >> +				#gpio-cells = <1>;
 >> +				reg = <0 0x100>;
@@ -176,19 +176,19 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 >> +		#address-cells = <1>;
 >> +		#size-cells = <0>;
 >> +
->> +		cpu at 0 {
+>> +		cpu@0 {
 >> +			device_type = "cpu";
 >> +			compatible = "arm,cortex-a9";
 >> +			reg = <0>;
 >> +		};
->> +		cpu at 1 {
+>> +		cpu@1 {
 >> +			device_type = "cpu";
 >> +			compatible = "arm,cortex-a9";
 >> +			reg = <1>;
 >> +		};
 >> +	};
 >> +
->> +	intc: interrupt-controller at fffe1000 {
+>> +	intc: interrupt-controller@fffe1000 {
 >> +		compatible = "arm,cortex-a9-gic";
 >> +		#interrupt-cells = <3>;
 >> +		interrupt-controller;
@@ -196,12 +196,12 @@ On 01/31/2014 01:50 PM, srinivas kandagatla wrote:
 >> +		      <0xfffe0100 0x100>;
 >> +	};
 >> +
->> +	scu at fffe0000 {
+>> +	scu@fffe0000 {
 >> +		compatible = "arm,cortex-a9-scu";
 >> +		reg = <0xfffe0000 0x1000>;
 >> +	};
 >> +
->> +	timer at fffe0200 {
+>> +	timer@fffe0200 {
 >> +			interrupt-parent = <&intc>;
 >> +			compatible = "arm,cortex-a9-global-timer";
 >> +			reg = <0xfffe0200 0x100>;
diff --git a/a/content_digest b/N2/content_digest
index e46d500..175f051 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,10 +1,22 @@
  "ref\01391093744-19905-1-git-send-email-patrice.chotard@st.com\0"
  "ref\01391093744-19905-4-git-send-email-patrice.chotard@st.com\0"
  "ref\052EB9C03.70009@st.com\0"
- "From\0patrice.chotard@st.com (Patrice Chotard)\0"
- "Subject\0[PATCH 3/4] ARM: dts: Add support of STid127 Soc.\0"
+ "From\0Patrice Chotard <patrice.chotard@st.com>\0"
+ "Subject\0Re: [PATCH 3/4] ARM: dts: Add support of STid127 Soc.\0"
  "Date\0Wed, 5 Feb 2014 11:27:54 +0100\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0srinivas kandagatla <srinivas.kandagatla@st.com>"
+  Stuart Menefy <stuart.menefy@st.com>
+  Russell King <linux@arm.linux.org.uk>
+  <linux-arm-kernel@lists.infradead.org>
+  <kernel@stlinux.com>
+  <linux-kernel@vger.kernel.org>
+  Linus Walleij <linus.walleij@linaro.org>
+  Grant Likely <grant.likely@linaro.org>
+  Rob Herring <robh+dt@kernel.org>
+ " <devicetree@vger.kernel.org>\0"
+ "Cc\0<maxime.coquelin@st.com>"
+  <alexandre.torgue@st.com>
+ " Giuseppe Cavallaro <peppe.cavallaro@st.com>\0"
  "\00:1\0"
  "b\0"
  "Hi Srinivas\n"
@@ -73,7 +85,7 @@
  ">> +\t\t * Bootloader initialized system infrastructure clock for\n"
  ">> +\t\t * serial devices.\n"
  ">> +\t\t */\n"
- ">> +\t\tCLK_IC_LP_HD: clockgenA0 at 29 {\n"
+ ">> +\t\tCLK_IC_LP_HD: clockgenA0@29 {\n"
  ">> +\t\t\t#clock-cells = <0>;\n"
  ">> +\t\t\tcompatible = \"fixed-clock\";\n"
  ">> +\t\t\tclock-frequency = <100000000>;\n"
@@ -142,7 +154,7 @@
  "> All these patches are due to be in v3.15.\n"
  ">\n"
  ">> +\n"
- ">> +\t\t\tPIO0: gpio at febe0000 {\n"
+ ">> +\t\t\tPIO0: gpio@febe0000 {\n"
  ">> +\t\t\t\tgpio-controller;\n"
  ">> +\t\t\t\t#gpio-cells = <1>;\n"
  ">> +\t\t\t\treg = <0 0x100>;\n"
@@ -185,19 +197,19 @@
  ">> +\t\t#address-cells = <1>;\n"
  ">> +\t\t#size-cells = <0>;\n"
  ">> +\n"
- ">> +\t\tcpu at 0 {\n"
+ ">> +\t\tcpu@0 {\n"
  ">> +\t\t\tdevice_type = \"cpu\";\n"
  ">> +\t\t\tcompatible = \"arm,cortex-a9\";\n"
  ">> +\t\t\treg = <0>;\n"
  ">> +\t\t};\n"
- ">> +\t\tcpu at 1 {\n"
+ ">> +\t\tcpu@1 {\n"
  ">> +\t\t\tdevice_type = \"cpu\";\n"
  ">> +\t\t\tcompatible = \"arm,cortex-a9\";\n"
  ">> +\t\t\treg = <1>;\n"
  ">> +\t\t};\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tintc: interrupt-controller at fffe1000 {\n"
+ ">> +\tintc: interrupt-controller@fffe1000 {\n"
  ">> +\t\tcompatible = \"arm,cortex-a9-gic\";\n"
  ">> +\t\t#interrupt-cells = <3>;\n"
  ">> +\t\tinterrupt-controller;\n"
@@ -205,12 +217,12 @@
  ">> +\t\t      <0xfffe0100 0x100>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\tscu at fffe0000 {\n"
+ ">> +\tscu@fffe0000 {\n"
  ">> +\t\tcompatible = \"arm,cortex-a9-scu\";\n"
  ">> +\t\treg = <0xfffe0000 0x1000>;\n"
  ">> +\t};\n"
  ">> +\n"
- ">> +\ttimer at fffe0200 {\n"
+ ">> +\ttimer@fffe0200 {\n"
  ">> +\t\t\tinterrupt-parent = <&intc>;\n"
  ">> +\t\t\tcompatible = \"arm,cortex-a9-global-timer\";\n"
  ">> +\t\t\treg = <0xfffe0200 0x100>;\n"
@@ -221,4 +233,4 @@
  "> Thanks,\n"
  > srini
 
-c362905a496005c088cf4a8fd8e9f2599e2f686fc62cffc1a6af66501297731c
+cff1396f4ccfb363168fdbbc9ba2679f699df5d9843fa78fca6eb2f264866bac

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.