From: York Sun <yorksun@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] board/b4860qds:Slow MDC clock to comply IEEE specs in PBI config
Date: Fri, 7 Mar 2014 11:37:52 -0800 [thread overview]
Message-ID: <531A2010.9040806@freescale.com> (raw)
In-Reply-To: <1393577339-4541-1-git-send-email-prabhakar@freescale.com>
On 02/28/2014 12:48 AM, Prabhakar Kushwaha wrote:
> With the default value of MDIO_CLK_DIV generatee MDC is too high and It is
> violating the IEEE specs much higher than 2.5Mhz.
>
> Although there is errata(A-006260) for EMI2(MDIO2), but same errata is
> been hit on EMI1(MDIO1). unfortunately this errata never hit on B4 rev1.
> So reduced the MDIO_CLK_DIV value.
>
Please fix the typo and some grammar error in the commit message.
What is about B4 Rev 1? We support rev 2 and later in this u-boot.
York
prev parent reply other threads:[~2014-03-07 19:37 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-02-28 8:48 [U-Boot] [PATCH] board/b4860qds:Slow MDC clock to comply IEEE specs in PBI config Prabhakar Kushwaha
2014-03-07 19:37 ` York Sun [this message]
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