From: Paolo Bonzini <pbonzini@redhat.com>
To: James Hogan <james.hogan@imgtec.com>, qemu-devel@nongnu.org
Cc: kvm@vger.kernel.org, Aurelien Jarno <aurelien@aurel32.net>,
Gleb Natapov <gleb@redhat.com>, Sanjay Lal <sanjayl@kymasys.com>
Subject: Re: [PATCH v4 03/10] target-mips: get_physical_address: Add defines for segment bases
Date: Wed, 19 Mar 2014 17:33:51 +0100 [thread overview]
Message-ID: <5329C6EF.5060503@redhat.com> (raw)
In-Reply-To: <1394801281-18997-4-git-send-email-james.hogan@imgtec.com>
Il 14/03/2014 13:47, James Hogan ha scritto:
> Add preprocessor definitions for 32bit segment bases for use in
> get_physical_address(). These will also be taken advantage of in the
> next patch which adds KVM awareness.
>
> Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
> ---
> target-mips/helper.c | 18 ++++++++++++------
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/target-mips/helper.c b/target-mips/helper.c
> index b28ae9b..2b30fc2 100644
> --- a/target-mips/helper.c
> +++ b/target-mips/helper.c
> @@ -118,7 +118,13 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
> qemu_log("user mode %d h %08x\n", user_mode, env->hflags);
> #endif
>
> - if (address <= (int32_t)0x7FFFFFFFUL) {
> +#define USEG_LIMIT 0x7FFFFFFFUL
> +#define KSEG0_BASE 0x80000000UL
> +#define KSEG1_BASE 0xA0000000UL
> +#define KSEG2_BASE 0xC0000000UL
> +#define KSEG3_BASE 0xE0000000UL
> +
Please put these outside the function. (Same for those in patch 4).
> + if (address <= USEG_LIMIT) {
> /* useg */
> if (env->CP0_Status & (1 << CP0St_ERL)) {
> *physical = address & 0xFFFFFFFF;
> @@ -160,23 +166,23 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
> ret = TLBRET_BADADDR;
> }
> #endif
> - } else if (address < (int32_t)0xA0000000UL) {
> + } else if (address < (int32_t)KSEG1_BASE) {
> /* kseg0 */
> if (kernel_mode) {
> - *physical = address - (int32_t)0x80000000UL;
> + *physical = address - (int32_t)KSEG0_BASE;
> *prot = PAGE_READ | PAGE_WRITE;
> } else {
> ret = TLBRET_BADADDR;
> }
> - } else if (address < (int32_t)0xC0000000UL) {
> + } else if (address < (int32_t)KSEG2_BASE) {
> /* kseg1 */
> if (kernel_mode) {
> - *physical = address - (int32_t)0xA0000000UL;
> + *physical = address - (int32_t)KSEG1_BASE;
> *prot = PAGE_READ | PAGE_WRITE;
> } else {
> ret = TLBRET_BADADDR;
> }
> - } else if (address < (int32_t)0xE0000000UL) {
> + } else if (address < (int32_t)KSEG3_BASE) {
> /* sseg (kseg2) */
> if (supervisor_mode || kernel_mode) {
> ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
>
WARNING: multiple messages have this Message-ID (diff)
From: Paolo Bonzini <pbonzini@redhat.com>
To: James Hogan <james.hogan@imgtec.com>, qemu-devel@nongnu.org
Cc: Sanjay Lal <sanjayl@kymasys.com>, Gleb Natapov <gleb@redhat.com>,
Aurelien Jarno <aurelien@aurel32.net>,
kvm@vger.kernel.org
Subject: Re: [Qemu-devel] [PATCH v4 03/10] target-mips: get_physical_address: Add defines for segment bases
Date: Wed, 19 Mar 2014 17:33:51 +0100 [thread overview]
Message-ID: <5329C6EF.5060503@redhat.com> (raw)
In-Reply-To: <1394801281-18997-4-git-send-email-james.hogan@imgtec.com>
Il 14/03/2014 13:47, James Hogan ha scritto:
> Add preprocessor definitions for 32bit segment bases for use in
> get_physical_address(). These will also be taken advantage of in the
> next patch which adds KVM awareness.
>
> Signed-off-by: James Hogan <james.hogan@imgtec.com>
> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
> ---
> target-mips/helper.c | 18 ++++++++++++------
> 1 file changed, 12 insertions(+), 6 deletions(-)
>
> diff --git a/target-mips/helper.c b/target-mips/helper.c
> index b28ae9b..2b30fc2 100644
> --- a/target-mips/helper.c
> +++ b/target-mips/helper.c
> @@ -118,7 +118,13 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
> qemu_log("user mode %d h %08x\n", user_mode, env->hflags);
> #endif
>
> - if (address <= (int32_t)0x7FFFFFFFUL) {
> +#define USEG_LIMIT 0x7FFFFFFFUL
> +#define KSEG0_BASE 0x80000000UL
> +#define KSEG1_BASE 0xA0000000UL
> +#define KSEG2_BASE 0xC0000000UL
> +#define KSEG3_BASE 0xE0000000UL
> +
Please put these outside the function. (Same for those in patch 4).
> + if (address <= USEG_LIMIT) {
> /* useg */
> if (env->CP0_Status & (1 << CP0St_ERL)) {
> *physical = address & 0xFFFFFFFF;
> @@ -160,23 +166,23 @@ static int get_physical_address (CPUMIPSState *env, hwaddr *physical,
> ret = TLBRET_BADADDR;
> }
> #endif
> - } else if (address < (int32_t)0xA0000000UL) {
> + } else if (address < (int32_t)KSEG1_BASE) {
> /* kseg0 */
> if (kernel_mode) {
> - *physical = address - (int32_t)0x80000000UL;
> + *physical = address - (int32_t)KSEG0_BASE;
> *prot = PAGE_READ | PAGE_WRITE;
> } else {
> ret = TLBRET_BADADDR;
> }
> - } else if (address < (int32_t)0xC0000000UL) {
> + } else if (address < (int32_t)KSEG2_BASE) {
> /* kseg1 */
> if (kernel_mode) {
> - *physical = address - (int32_t)0xA0000000UL;
> + *physical = address - (int32_t)KSEG1_BASE;
> *prot = PAGE_READ | PAGE_WRITE;
> } else {
> ret = TLBRET_BADADDR;
> }
> - } else if (address < (int32_t)0xE0000000UL) {
> + } else if (address < (int32_t)KSEG3_BASE) {
> /* sseg (kseg2) */
> if (supervisor_mode || kernel_mode) {
> ret = env->tlb->map_address(env, physical, prot, address, rw, access_type);
>
next prev parent reply other threads:[~2014-03-19 16:34 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-14 12:47 [PATCH v4 00/10] KVM Support for MIPS32 Processors James Hogan
2014-03-14 12:47 ` [Qemu-devel] " James Hogan
2014-03-14 12:47 ` [PATCH v4 01/10] hw/mips/cputimer: Don't start periodic timer in KVM mode James Hogan
2014-03-14 12:47 ` [Qemu-devel] " James Hogan
2014-03-19 16:29 ` Paolo Bonzini
2014-03-19 16:29 ` [Qemu-devel] " Paolo Bonzini
2014-03-20 9:57 ` James Hogan
2014-03-20 9:57 ` [Qemu-devel] " James Hogan
2014-03-20 22:36 ` Paolo Bonzini
2014-03-20 22:36 ` [Qemu-devel] " Paolo Bonzini
2014-03-14 12:47 ` [PATCH v4 02/10] hw/mips: Add API to convert KVM guest KSEG0 <-> GPA James Hogan
2014-03-14 12:47 ` [Qemu-devel] " James Hogan
2014-03-14 12:47 ` [PATCH v4 03/10] target-mips: get_physical_address: Add defines for segment bases James Hogan
2014-03-14 12:47 ` [Qemu-devel] " James Hogan
2014-03-19 16:33 ` Paolo Bonzini [this message]
2014-03-19 16:33 ` Paolo Bonzini
2014-03-14 12:47 ` [PATCH v4 04/10] target-mips: get_physical_address: Add KVM awareness James Hogan
2014-03-14 12:47 ` [Qemu-devel] " James Hogan
2014-03-19 16:33 ` Paolo Bonzini
2014-03-19 16:33 ` [Qemu-devel] " Paolo Bonzini
2014-03-20 10:08 ` James Hogan
2014-03-20 10:08 ` [Qemu-devel] " James Hogan
2014-03-14 12:47 ` [PATCH v4 05/10] kvm: Allow arch to set sigmask length James Hogan
2014-03-14 12:47 ` [Qemu-devel] " James Hogan
2014-03-14 12:47 ` [PATCH v4 06/10] target-mips: kvm: Add main KVM support for MIPS James Hogan
2014-03-14 12:47 ` [Qemu-devel] " James Hogan
2014-03-14 12:47 ` [PATCH v4 07/10] hw/mips: In KVM mode, inject IRQ2 (I/O) interupts via ioctls James Hogan
2014-03-14 12:47 ` [Qemu-devel] " James Hogan
2014-03-14 12:47 ` [PATCH v4 08/10] hw/mips: malta: Add KVM support James Hogan
2014-03-14 12:47 ` [Qemu-devel] " James Hogan
2014-03-19 16:39 ` Paolo Bonzini
2014-03-19 16:39 ` [Qemu-devel] " Paolo Bonzini
2014-03-20 10:17 ` James Hogan
2014-03-20 10:17 ` [Qemu-devel] " James Hogan
2014-03-14 12:48 ` [PATCH v4 09/10] target-mips: Enable KVM support in build system James Hogan
2014-03-14 12:48 ` [Qemu-devel] " James Hogan
2014-03-14 12:48 ` [PATCH v4 10/10] MAINTAINERS: Add entry for MIPS KVM James Hogan
2014-03-14 12:48 ` [Qemu-devel] " James Hogan
2014-03-14 13:27 ` [Qemu-devel] [PATCH v4 00/10] KVM Support for MIPS32 Processors Peter Maydell
2014-03-14 13:27 ` Peter Maydell
2014-03-14 13:29 ` James Hogan
2014-03-14 13:29 ` James Hogan
2014-03-19 16:39 ` Paolo Bonzini
2014-03-19 16:39 ` [Qemu-devel] " Paolo Bonzini
2014-03-20 10:00 ` James Hogan
2014-03-20 10:00 ` [Qemu-devel] " James Hogan
2014-03-20 12:44 ` Paolo Bonzini
2014-03-20 12:44 ` [Qemu-devel] " Paolo Bonzini
2014-03-21 16:51 ` James Hogan
2014-03-21 16:51 ` [Qemu-devel] " James Hogan
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