Re: [PATCH 1/2] GPIO: Add driver for Zynq GPIO controller

[Michal Simek <monstr@monstr.eu>]

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Hi Linus,

On 03/31/2014 10:22 AM, Linus Walleij wrote:
> On Sat, Mar 29, 2014 at 5:44 AM, Harini Katakam
> <harinikatakamlinux@gmail.com> wrote:
>> On Sat, Mar 29, 2014 at 3:20 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
>>> On Thu, Mar 27, 2014 at 4:25 PM, Harini Katakam <harinik@xilinx.com> wrote:
> 
>>>> +/* Read/Write access to the GPIO PS registers */
>>>> +static inline u32 zynq_gpio_readreg(void __iomem *offset)
>>>> +{
>>>> +       return readl_relaxed(offset);
>>>> +}
>>>> +
>>>> +static inline void zynq_gpio_writereg(void __iomem *offset, u32 val)
>>>> +{
>>>> +       writel_relaxed(val, offset);
>>>> +}
>>>
>>> I think this is unnecessary and confusing indirection.
>>> Just use the readl_relaxed/writel_relaxed functions directly in
>>> the code.
>>>
>>
>> This is just to be flexible.
> 
> Define exactly what you mean with "flexible" in this context. I
> only see unnecessary overhead and hard-to-read code.

We have just passed this discussion for watchdog driver
here: https://lkml.org/lkml/2014/4/1/843

Are you ok with doing it in this way?

static inline u32 zynq_gpio_readreg(struct zynq_gpio *gpio, u32 offset)
{
       return readl_relaxed(gpio->base_addr + offset);
}

static inline void zynq_gpio_writereg(struct zynq_gpio *gpio, u32 offset, u32 val)
{
      writel_relaxed(val, gpio->base_addr + offset);
}

Or even like this to be able to handle error cases.

static inline int zynq_gpio_readreg(struct zynq_gpio *gpio, u32 offset, u32 *val)
{
	*val = readl_relaxed(gpio->base_addr + offset);
	return 0;
}

static inline int zynq_gpio_writereg(struct zynq_gpio *gpio, u32 offset, u32 val)
{
	writel_relaxed(val, gpio->base_addr + offset);
	return 0;
}

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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