Re: [PATCH 1/2] devicetree: Add devicetree bindings documentation for Zynq Quad SPI

[Michal Simek <monstr-pSz03upnqPeHXe+LvDLADg@public.gmane.org>]

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Hi Mark and Harini,

On 04/04/2014 05:01 AM, Harini Katakam wrote:
> Hi Mark,
> 
> On Fri, Apr 4, 2014 at 2:31 AM, Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:
>> On Thu, Apr 03, 2014 at 10:33:06PM +0530, Punnaiah Choudary Kalluri wrote:
>>
>>> +Optional properties:
>>> +- num-cs             : Number of chip selects used.
>>
>> What does this translate into?
>>
>>> +             num-cs = /bits/ 16 <1>;
>>
>> Why the odd specification in the example - why not just specify it as a
>> number?
> 
> Same as discussed on SPI cadence thread.

I have discussed this briefly with Rob and it is more up to Mark
if he wants to have this with 16bit width or not. I expect that
"num-cs" is getting to be shared across spi drivers
and maybe in near future you will move "num-cs" of probe to spi core
that's why it should stay 32bit for easier integration.

I have asked Harini some weeks ago to try to do it just with
of_property_read_u16 because you can directly setup
master->num_chipselect and you don't need to read it as u32
and saving to u16.

Thanks,
Michal

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform



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