Re: arch/mips/sgi-ip22/Platform:29: *** gcc doesn't support needed option -mr10k-cache-barrier=store. Stop.

[Joshua Kinard <kumba@gentoo.org>]

On 04/09/2014 20:38, Ralf Baechle wrote:
> On Wed, Apr 09, 2014 at 07:44:42PM -0400, Joshua Kinard wrote:
> 
>> If you weren't using a mips64 compiler, that's probably the issue.  R10000
>> processors are 64-bit only, so a 'mips' toolchain probably doesn't include
>> the R10K cache-barrier code, causing that option to fail.
> 
> No - there's no mode switch.  An R10000 will happily run 32-bit code
> otherwise 32 bit kernels wouldn't work.  32 bit code just doesn't use
> 64 bit addressing, instructions or the upper 32 bit of the 64 bit registers.
> 
> $ mips-linux-gcc -mr10k-cache-barrier=store -c -O2 -o c.o c.c
> c.c:1:0: error: ‘-mr10k-cache-barrier’ requires a target that provides the ‘cache’ instruction
> [...]
> 
> When adding an option like -mips32 the compilation will succeed.

Odd, I thought R10K systems were locked to booting 64-bit kernels only.  At
least the Octane was when it was bootable.  Not sure about IP27.

Maybe that's another one of ARCS' ingenious features...


>> Are you configuring for IP22 (Indy, Indigo2 R4x00), or IP28 (R10000)?  Note,
>> IP26 (R8000) is not supported in Linux.  I think OpenBSD got it working, though.
> 
> Wish I'd have a box ....

They do pop up on eBay from time-to-time.  UPS destroyed the case mine came
in, though.  I've got it in a closet, with duct tape holding the teal skins
on.  It does boot to the PROM, but the RTC is probably dead by now.

-- 
Joshua Kinard
Gentoo/MIPS
kumba@gentoo.org
4096R/D25D95E3 2011-03-28

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