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From: Tomasz Figa <tomasz.figa@gmail.com>
To: Chander Kashyap <chander.kashyap@linaro.org>,
	Tomasz Figa <t.figa@samsung.com>
Cc: "linux-samsung-soc@vger.kernel.org"
	<linux-samsung-soc@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	devicetree@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Kukjin Kim <kgene.kim@samsung.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Marek Szyprowski <m.szyprowski@samsung.com>
Subject: Re: [PATCH 2/4] ARM: EXYNOS: Fix core ID used by platsmp and hotplug code
Date: Sat, 26 Apr 2014 00:47:51 +0200	[thread overview]
Message-ID: <535AE617.9050202@gmail.com> (raw)
In-Reply-To: <CANuQgHF9up5=8+cWgC+9cm-8Bf7sGcRBcg1DyXm-pbmK=EMgmg@mail.gmail.com>

Hi Chander,

On 20.04.2014 09:23, Chander Kashyap wrote:
> Hi Tomasz,
>
>
> On 18 April 2014 20:12, Tomasz Figa <t.figa@samsung.com> wrote:
>> When CPU topology is specified in device tree, cpu_logical_map() does
>> not return core ID anymore, but rather full MPIDR value. This breaks
>> existing calculation of PMU register offsets on Exynos SoCs.
>>
>> This patch fixes the problem by adjusting the code to use only core ID
>> bits of the value returned by cpu_logical_map() to allow CPU topology to
>> be specified in device tree on Exynos SoCs.
>>
>> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
>> ---
>>   arch/arm/mach-exynos/hotplug.c | 10 ++++++----
>>   arch/arm/mach-exynos/platsmp.c | 31 ++++++++++++++++++-------------
>>   2 files changed, 24 insertions(+), 17 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
>> index 7e0f31a..8a5f07d 100644
>> --- a/arch/arm/mach-exynos/hotplug.c
>> +++ b/arch/arm/mach-exynos/hotplug.c
>> @@ -92,11 +92,13 @@ static inline void cpu_leave_lowpower(void)
>>
>>   static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
>>   {
>> +       u32 mpidr = cpu_logical_map(cpu);
>> +       u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
>> +
>>          for (;;) {
>>
>> -               /* make cpu1 to be turned off at next WFI command */
>> -               if (cpu == 1)
>> -                       __raw_writel(0, S5P_ARM_CORE_CONFIGURATION(1));
>
> I think this macro is not yet in ML code.

What do you mean? The S5P_ARM_CORE_CONFIGURATION() macro is being added 
by patch 1/4.

Best regards,
Tomasz

WARNING: multiple messages have this Message-ID (diff)
From: tomasz.figa@gmail.com (Tomasz Figa)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/4] ARM: EXYNOS: Fix core ID used by platsmp and hotplug code
Date: Sat, 26 Apr 2014 00:47:51 +0200	[thread overview]
Message-ID: <535AE617.9050202@gmail.com> (raw)
In-Reply-To: <CANuQgHF9up5=8+cWgC+9cm-8Bf7sGcRBcg1DyXm-pbmK=EMgmg@mail.gmail.com>

Hi Chander,

On 20.04.2014 09:23, Chander Kashyap wrote:
> Hi Tomasz,
>
>
> On 18 April 2014 20:12, Tomasz Figa <t.figa@samsung.com> wrote:
>> When CPU topology is specified in device tree, cpu_logical_map() does
>> not return core ID anymore, but rather full MPIDR value. This breaks
>> existing calculation of PMU register offsets on Exynos SoCs.
>>
>> This patch fixes the problem by adjusting the code to use only core ID
>> bits of the value returned by cpu_logical_map() to allow CPU topology to
>> be specified in device tree on Exynos SoCs.
>>
>> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
>> ---
>>   arch/arm/mach-exynos/hotplug.c | 10 ++++++----
>>   arch/arm/mach-exynos/platsmp.c | 31 ++++++++++++++++++-------------
>>   2 files changed, 24 insertions(+), 17 deletions(-)
>>
>> diff --git a/arch/arm/mach-exynos/hotplug.c b/arch/arm/mach-exynos/hotplug.c
>> index 7e0f31a..8a5f07d 100644
>> --- a/arch/arm/mach-exynos/hotplug.c
>> +++ b/arch/arm/mach-exynos/hotplug.c
>> @@ -92,11 +92,13 @@ static inline void cpu_leave_lowpower(void)
>>
>>   static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
>>   {
>> +       u32 mpidr = cpu_logical_map(cpu);
>> +       u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
>> +
>>          for (;;) {
>>
>> -               /* make cpu1 to be turned off at next WFI command */
>> -               if (cpu == 1)
>> -                       __raw_writel(0, S5P_ARM_CORE_CONFIGURATION(1));
>
> I think this macro is not yet in ML code.

What do you mean? The S5P_ARM_CORE_CONFIGURATION() macro is being added 
by patch 1/4.

Best regards,
Tomasz

  reply	other threads:[~2014-04-25 22:47 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-04-18 14:42 [PATCH 0/4] Fixes for DT CPU topology specification on Exynos Tomasz Figa
2014-04-18 14:42 ` Tomasz Figa
2014-04-18 14:42 ` [PATCH 1/4] ARM: EXYNOS: Fix definitions of S5P_ARM_CORE_* registers Tomasz Figa
2014-04-18 14:42   ` Tomasz Figa
2014-04-19  7:47   ` Chanwoo Choi
2014-04-19  7:47     ` Chanwoo Choi
2014-04-19  8:42     ` Tomasz Figa
2014-04-19  8:42       ` Tomasz Figa
2014-04-18 14:42 ` [PATCH 2/4] ARM: EXYNOS: Fix core ID used by platsmp and hotplug code Tomasz Figa
2014-04-18 14:42   ` Tomasz Figa
2014-04-20  7:23   ` Chander Kashyap
2014-04-20  7:23     ` Chander Kashyap
2014-04-25 22:47     ` Tomasz Figa [this message]
2014-04-25 22:47       ` Tomasz Figa
2014-04-26 10:48       ` Chander Kashyap
2014-04-18 14:43 ` [PATCH 3/4] irqchip: gic: Add support for per CPU bank offset specification in DT Tomasz Figa
2014-04-18 14:43   ` Tomasz Figa
2014-05-08 17:04   ` Rob Herring
2014-05-08 17:04     ` Rob Herring
2014-05-08 17:09     ` Tomasz Figa
2014-05-08 17:09       ` Tomasz Figa
2014-05-08 18:04       ` Rob Herring
2014-05-08 18:04         ` Rob Herring
2014-05-15 20:12         ` Tomasz Figa
2014-05-15 20:12           ` Tomasz Figa
2014-04-18 14:43 ` [PATCH 4/4] ARM: dts: exynos4: Add CPU topology data Tomasz Figa
2014-04-18 14:43   ` Tomasz Figa
2014-05-08 15:24 ` [PATCH 0/4] Fixes for DT CPU topology specification on Exynos Tomasz Figa
2014-05-08 15:24   ` Tomasz Figa
2014-05-15 20:15 ` Tomasz Figa
2014-05-15 20:15   ` Tomasz Figa

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