[PATCH] xen: workaround for 64-bit size/alignment bitops

[PATCH] xen: workaround for 64-bit size/alignment bitops

[Vladimir Murzin]

Xen assumes that bit operations are able to operate on 32-bit size and
alignment. For arm64 bitops are based on atomic exclusive load/store
instructions to guarantee that changes are made atomically. However, these
instructions require that address to be aligned to the data size. Because, by
default, bitops operates on 64-bit size it implies that address should be
aligned appropriately. All these lead to breakage of Xen assumption for bitops
properties.

As a workaround address is aligned forcefully along with adjustment for bit
position.

Cc: Ian Campbell <Ian.Campbell@citrix.com>
Cc: David Vrabel <david.vrabel@citrix.com>

Signed-off-by: Vladimir Murzin <murzin.v@gmail.com>
---

 I followed the way suggested by Ian for making workaround on case side. Not
 sure how much it might affect other parts, but I was able to boot both Dom0
 and DomU with this patch applied. Additionally, I've folded my other
 "starter" patch [1].
 
 @Pranav: Could I have your Tested-by on this patch?
 
 [1] http://lists.xen.org/archives/html/xen-devel/2014-04/msg02109.html 

 drivers/xen/events/events_fifo.c | 30 ++++++++++++++++++------------
 1 file changed, 18 insertions(+), 12 deletions(-)

diff --git a/drivers/xen/events/events_fifo.c b/drivers/xen/events/events_fifo.c
index 96109a9..bff9841 100644
--- a/drivers/xen/events/events_fifo.c
+++ b/drivers/xen/events/events_fifo.c
@@ -66,7 +66,9 @@ static DEFINE_PER_CPU(struct evtchn_fifo_queue, cpu_queue);
 static event_word_t *event_array[MAX_EVENT_ARRAY_PAGES] __read_mostly;
 static unsigned event_array_pages __read_mostly;
 
-#define BM(w) ((unsigned long *)(w))
+
+#define BM(w) (unsigned long *)((unsigned long)w & ~0x7UL)
+#define EVTCHN_FIFO_BIT(b, w) (((unsigned long)w & 0x4UL) ? (EVTCHN_FIFO_ ##b + 32) : EVTCHN_FIFO_ ##b)
 
 static inline event_word_t *event_word_from_port(unsigned port)
 {
@@ -161,33 +163,38 @@ static void evtchn_fifo_bind_to_cpu(struct irq_info *info, unsigned cpu)
 static void evtchn_fifo_clear_pending(unsigned port)
 {
 	event_word_t *word = event_word_from_port(port);
-	sync_clear_bit(EVTCHN_FIFO_PENDING, BM(word));
+	sync_clear_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word));
 }
 
 static void evtchn_fifo_set_pending(unsigned port)
 {
 	event_word_t *word = event_word_from_port(port);
-	sync_set_bit(EVTCHN_FIFO_PENDING, BM(word));
+	sync_set_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word));
 }
 
 static bool evtchn_fifo_is_pending(unsigned port)
 {
 	event_word_t *word = event_word_from_port(port);
-	return sync_test_bit(EVTCHN_FIFO_PENDING, BM(word));
+	return sync_test_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word));
 }
 
 static bool evtchn_fifo_test_and_set_mask(unsigned port)
 {
 	event_word_t *word = event_word_from_port(port);
-	return sync_test_and_set_bit(EVTCHN_FIFO_MASKED, BM(word));
+	return sync_test_and_set_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word));
 }
 
 static void evtchn_fifo_mask(unsigned port)
 {
 	event_word_t *word = event_word_from_port(port);
-	sync_set_bit(EVTCHN_FIFO_MASKED, BM(word));
+	sync_set_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word));
 }
 
+static bool evtchn_fifo_is_masked(unsigned port)
+{
+	event_word_t *word = event_word_from_port(port);
+	return sync_test_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word));
+}
 /*
  * Clear MASKED, spinning if BUSY is set.
  */
@@ -211,7 +218,7 @@ static void evtchn_fifo_unmask(unsigned port)
 	BUG_ON(!irqs_disabled());
 
 	clear_masked(word);
-	if (sync_test_bit(EVTCHN_FIFO_PENDING, BM(word))) {
+	if (evtchn_fifo_is_pending(port)) {
 		struct evtchn_unmask unmask = { .port = port };
 		(void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
 	}
@@ -243,7 +250,7 @@ static void handle_irq_for_port(unsigned port)
 
 static void consume_one_event(unsigned cpu,
 			      struct evtchn_fifo_control_block *control_block,
-			      unsigned priority, uint32_t *ready)
+			      unsigned priority, unsigned long *ready)
 {
 	struct evtchn_fifo_queue *q = &per_cpu(cpu_queue, cpu);
 	uint32_t head;
@@ -273,10 +280,9 @@ static void consume_one_event(unsigned cpu,
 	 * copy of the ready word.
 	 */
 	if (head == 0)
-		clear_bit(priority, BM(ready));
+		clear_bit(priority, ready);
 
-	if (sync_test_bit(EVTCHN_FIFO_PENDING, BM(word))
-	    && !sync_test_bit(EVTCHN_FIFO_MASKED, BM(word)))
+	if (evtchn_fifo_is_pending(port) && !evtchn_fifo_is_masked(port))
 		handle_irq_for_port(port);
 
 	q->head[priority] = head;
@@ -285,7 +291,7 @@ static void consume_one_event(unsigned cpu,
 static void evtchn_fifo_handle_events(unsigned cpu)
 {
 	struct evtchn_fifo_control_block *control_block;
-	uint32_t ready;
+	unsigned long ready;
 	unsigned q;
 
 	control_block = per_cpu(cpu_control_block, cpu);
-- 
1.8.3.2

Re: [PATCH] xen: workaround for 64-bit size/alignment bitops

[Pranavkumar Sawargaonkar]

On 27 April 2014 14:39, Vladimir Murzin <murzin.v@gmail.com> wrote:
> Xen assumes that bit operations are able to operate on 32-bit size and
> alignment. For arm64 bitops are based on atomic exclusive load/store
> instructions to guarantee that changes are made atomically. However, these
> instructions require that address to be aligned to the data size. Because, by
> default, bitops operates on 64-bit size it implies that address should be
> aligned appropriately. All these lead to breakage of Xen assumption for bitops
> properties.
>
> As a workaround address is aligned forcefully along with adjustment for bit
> position.
>
> Cc: Ian Campbell <Ian.Campbell@citrix.com>
> Cc: David Vrabel <david.vrabel@citrix.com>
>
> Signed-off-by: Vladimir Murzin <murzin.v@gmail.com>
> ---
>
>  I followed the way suggested by Ian for making workaround on case side. Not
>  sure how much it might affect other parts, but I was able to boot both Dom0
>  and DomU with this patch applied. Additionally, I've folded my other
>  "starter" patch [1].
>
>  @Pranav: Could I have your Tested-by on this patch?
>
>  [1] http://lists.xen.org/archives/html/xen-devel/2014-04/msg02109.html
>
>  drivers/xen/events/events_fifo.c | 30 ++++++++++++++++++------------
>  1 file changed, 18 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/xen/events/events_fifo.c b/drivers/xen/events/events_fifo.c
> index 96109a9..bff9841 100644
> --- a/drivers/xen/events/events_fifo.c
> +++ b/drivers/xen/events/events_fifo.c
> @@ -66,7 +66,9 @@ static DEFINE_PER_CPU(struct evtchn_fifo_queue, cpu_queue);
>  static event_word_t *event_array[MAX_EVENT_ARRAY_PAGES] __read_mostly;
>  static unsigned event_array_pages __read_mostly;
>
> -#define BM(w) ((unsigned long *)(w))
> +
> +#define BM(w) (unsigned long *)((unsigned long)w & ~0x7UL)
> +#define EVTCHN_FIFO_BIT(b, w) (((unsigned long)w & 0x4UL) ? (EVTCHN_FIFO_ ##b + 32) : EVTCHN_FIFO_ ##b)
>
>  static inline event_word_t *event_word_from_port(unsigned port)
>  {
> @@ -161,33 +163,38 @@ static void evtchn_fifo_bind_to_cpu(struct irq_info *info, unsigned cpu)
>  static void evtchn_fifo_clear_pending(unsigned port)
>  {
>         event_word_t *word = event_word_from_port(port);
> -       sync_clear_bit(EVTCHN_FIFO_PENDING, BM(word));
> +       sync_clear_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word));
>  }
>
>  static void evtchn_fifo_set_pending(unsigned port)
>  {
>         event_word_t *word = event_word_from_port(port);
> -       sync_set_bit(EVTCHN_FIFO_PENDING, BM(word));
> +       sync_set_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word));
>  }
>
>  static bool evtchn_fifo_is_pending(unsigned port)
>  {
>         event_word_t *word = event_word_from_port(port);
> -       return sync_test_bit(EVTCHN_FIFO_PENDING, BM(word));
> +       return sync_test_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word));
>  }
>
>  static bool evtchn_fifo_test_and_set_mask(unsigned port)
>  {
>         event_word_t *word = event_word_from_port(port);
> -       return sync_test_and_set_bit(EVTCHN_FIFO_MASKED, BM(word));
> +       return sync_test_and_set_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word));
>  }
>
>  static void evtchn_fifo_mask(unsigned port)
>  {
>         event_word_t *word = event_word_from_port(port);
> -       sync_set_bit(EVTCHN_FIFO_MASKED, BM(word));
> +       sync_set_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word));
>  }
>
> +static bool evtchn_fifo_is_masked(unsigned port)
> +{
> +       event_word_t *word = event_word_from_port(port);
> +       return sync_test_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word));
> +}
>  /*
>   * Clear MASKED, spinning if BUSY is set.
>   */
> @@ -211,7 +218,7 @@ static void evtchn_fifo_unmask(unsigned port)
>         BUG_ON(!irqs_disabled());
>
>         clear_masked(word);
> -       if (sync_test_bit(EVTCHN_FIFO_PENDING, BM(word))) {
> +       if (evtchn_fifo_is_pending(port)) {
>                 struct evtchn_unmask unmask = { .port = port };
>                 (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
>         }
> @@ -243,7 +250,7 @@ static void handle_irq_for_port(unsigned port)
>
>  static void consume_one_event(unsigned cpu,
>                               struct evtchn_fifo_control_block *control_block,
> -                             unsigned priority, uint32_t *ready)
> +                             unsigned priority, unsigned long *ready)
>  {
>         struct evtchn_fifo_queue *q = &per_cpu(cpu_queue, cpu);
>         uint32_t head;
> @@ -273,10 +280,9 @@ static void consume_one_event(unsigned cpu,
>          * copy of the ready word.
>          */
>         if (head == 0)
> -               clear_bit(priority, BM(ready));
> +               clear_bit(priority, ready);
>
> -       if (sync_test_bit(EVTCHN_FIFO_PENDING, BM(word))
> -           && !sync_test_bit(EVTCHN_FIFO_MASKED, BM(word)))
> +       if (evtchn_fifo_is_pending(port) && !evtchn_fifo_is_masked(port))
>                 handle_irq_for_port(port);
>
>         q->head[priority] = head;
> @@ -285,7 +291,7 @@ static void consume_one_event(unsigned cpu,
>  static void evtchn_fifo_handle_events(unsigned cpu)
>  {
>         struct evtchn_fifo_control_block *control_block;
> -       uint32_t ready;
> +       unsigned long ready;
>         unsigned q;
>
>         control_block = per_cpu(cpu_control_block, cpu);
> --
> 1.8.3.2
>

I have tried this patch on XGENE and works fine, I have managed to get
dom0 and domU working with it.

Tested-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>

Thanks,
Pranav

Re: [PATCH] xen: workaround for 64-bit size/alignment bitops

[David Vrabel]

On 28/04/14 09:47, Pranavkumar Sawargaonkar wrote:
> On 27 April 2014 14:39, Vladimir Murzin <murzin.v@gmail.com> wrote:
>> Xen assumes that bit operations are able to operate on 32-bit size and
>> alignment. For arm64 bitops are based on atomic exclusive load/store
>> instructions to guarantee that changes are made atomically. However, these
>> instructions require that address to be aligned to the data size. Because, by
>> default, bitops operates on 64-bit size it implies that address should be
>> aligned appropriately. All these lead to breakage of Xen assumption for bitops
>> properties.
>>
>> As a workaround address is aligned forcefully along with adjustment for bit
>> position.
>>
[...]
> 
> I have tried this patch on XGENE and works fine, I have managed to get
> dom0 and domU working with it.
> 
> Tested-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>

Thanks.  Are there arm64 platforms that support Xen currently available
in 3.15?  Or can this wait until 3.16?

David

Re: [PATCH] xen: workaround for 64-bit size/alignment bitops

[Ian Campbell]

On Mon, 2014-04-28 at 10:10 +0100, David Vrabel wrote:
> On 28/04/14 09:47, Pranavkumar Sawargaonkar wrote:
> > On 27 April 2014 14:39, Vladimir Murzin <murzin.v@gmail.com> wrote:
> >> Xen assumes that bit operations are able to operate on 32-bit size and
> >> alignment. For arm64 bitops are based on atomic exclusive load/store
> >> instructions to guarantee that changes are made atomically. However, these
> >> instructions require that address to be aligned to the data size. Because, by
> >> default, bitops operates on 64-bit size it implies that address should be
> >> aligned appropriately. All these lead to breakage of Xen assumption for bitops
> >> properties.
> >>
> >> As a workaround address is aligned forcefully along with adjustment for bit
> >> position.
> >>
> [...]
> > 
> > I have tried this patch on XGENE and works fine, I have managed to get
> > dom0 and domU working with it.
> > 
> > Tested-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
> 
> Thanks.  Are there arm64 platforms that support Xen currently available
> in 3.15?  Or can this wait until 3.16?

The foundation model and fastmodels are supported by 3.15. Xgene is
partially available in 3.15 I think. This should be fixed in 3.15
please, and ideally be queued for backport to whichever version
introduced the FIFO evtchn stuff.

Ian.

Re: [PATCH] xen: workaround for 64-bit size/alignment bitops

[Ian Campbell]

On Sun, 2014-04-27 at 10:09 +0100, Vladimir Murzin wrote:
> diff --git a/drivers/xen/events/events_fifo.c b/drivers/xen/events/events_fifo.c
> index 96109a9..bff9841 100644
> --- a/drivers/xen/events/events_fifo.c
> +++ b/drivers/xen/events/events_fifo.c
> @@ -66,7 +66,9 @@ static DEFINE_PER_CPU(struct evtchn_fifo_queue, cpu_queue);
>  static event_word_t *event_array[MAX_EVENT_ARRAY_PAGES] __read_mostly;
>  static unsigned event_array_pages __read_mostly;
>  
> -#define BM(w) ((unsigned long *)(w))
> +
> +#define BM(w) (unsigned long *)((unsigned long)w & ~0x7UL)
> +#define EVTCHN_FIFO_BIT(b, w) (((unsigned long)w & 0x4UL) ? (EVTCHN_FIFO_ ##b + 32) : EVTCHN_FIFO_ ##b)

A comment to describe why we jump through these hoops might be nice.
Apart from that: Reviewed-by: Ian Campbell <ian.campbell@citrix.com>

Re: [PATCH] xen: workaround for 64-bit size/alignment bitops

[David Vrabel]

On 28/04/14 10:13, Ian Campbell wrote:
> On Sun, 2014-04-27 at 10:09 +0100, Vladimir Murzin wrote:
>> diff --git a/drivers/xen/events/events_fifo.c b/drivers/xen/events/events_fifo.c
>> index 96109a9..bff9841 100644
>> --- a/drivers/xen/events/events_fifo.c
>> +++ b/drivers/xen/events/events_fifo.c
>> @@ -66,7 +66,9 @@ static DEFINE_PER_CPU(struct evtchn_fifo_queue, cpu_queue);
>>  static event_word_t *event_array[MAX_EVENT_ARRAY_PAGES] __read_mostly;
>>  static unsigned event_array_pages __read_mostly;
>>  
>> -#define BM(w) ((unsigned long *)(w))
>> +
>> +#define BM(w) (unsigned long *)((unsigned long)w & ~0x7UL)
>> +#define EVTCHN_FIFO_BIT(b, w) (((unsigned long)w & 0x4UL) ? (EVTCHN_FIFO_ ##b + 32) : EVTCHN_FIFO_ ##b)
> 
> A comment to describe why we jump through these hoops might be nice.
> Apart from that: Reviewed-by: Ian Campbell <ian.campbell@citrix.com>

I added a comment and made the fix conditional on !x86 and 64-bit (see below)
and applied to stable/for-linus-3.15.

Thanks.

David

8<----------------------------
xen/events/fifo: correctly align bitops

FIFO event channels require bitops on 32-bit aligned values (the event
words).  Linux's bitops require unsigned long alignment which may be
64-bits.

On arm64 an incorrectly unaligned access will fault.

Fix this by aligning the bitops along with an adjustment for bit
position and using an unsigned long for the local copy of the ready
word.

Cc: stable@vger.kernel.org
Signed-off-by: Vladimir Murzin <murzin.v@gmail.com>
Tested-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Reviewed-by: Ian Campbell <ian.campbell@citrix.com>
Signed-off-by: David Vrabel <david.vrabel@citrix.com>
---
 drivers/xen/events/events_fifo.c |   41 +++++++++++++++++++++++++++----------
 1 files changed, 30 insertions(+), 11 deletions(-)

diff --git a/drivers/xen/events/events_fifo.c b/drivers/xen/events/events_fifo.c
index 96109a9..84b4bfb 100644
--- a/drivers/xen/events/events_fifo.c
+++ b/drivers/xen/events/events_fifo.c
@@ -66,7 +66,22 @@ static DEFINE_PER_CPU(struct evtchn_fifo_queue, cpu_queue);
 static event_word_t *event_array[MAX_EVENT_ARRAY_PAGES] __read_mostly;
 static unsigned event_array_pages __read_mostly;
 
+/*
+ * sync_set_bit() and friends must be unsigned long aligned on non-x86
+ * platforms.
+ */
+#if !defined(CONFIG_X86) && BITS_PER_LONG > 32
+
+#define BM(w) (unsigned long *)((unsigned long)w & ~0x7UL)
+#define EVTCHN_FIFO_BIT(b, w) \
+    (((unsigned long)w & 0x4UL) ? (EVTCHN_FIFO_ ##b + 32) : EVTCHN_FIFO_ ##b)
+
+#else
+
 #define BM(w) ((unsigned long *)(w))
+#define EVTCHN_FIFO_BIT(b, w) EVTCHN_FIFO_ ##b
+
+#endif
 
 static inline event_word_t *event_word_from_port(unsigned port)
 {
@@ -161,33 +176,38 @@ static void evtchn_fifo_bind_to_cpu(struct irq_info *info, unsigned cpu)
 static void evtchn_fifo_clear_pending(unsigned port)
 {
 	event_word_t *word = event_word_from_port(port);
-	sync_clear_bit(EVTCHN_FIFO_PENDING, BM(word));
+	sync_clear_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word));
 }
 
 static void evtchn_fifo_set_pending(unsigned port)
 {
 	event_word_t *word = event_word_from_port(port);
-	sync_set_bit(EVTCHN_FIFO_PENDING, BM(word));
+	sync_set_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word));
 }
 
 static bool evtchn_fifo_is_pending(unsigned port)
 {
 	event_word_t *word = event_word_from_port(port);
-	return sync_test_bit(EVTCHN_FIFO_PENDING, BM(word));
+	return sync_test_bit(EVTCHN_FIFO_BIT(PENDING, word), BM(word));
 }
 
 static bool evtchn_fifo_test_and_set_mask(unsigned port)
 {
 	event_word_t *word = event_word_from_port(port);
-	return sync_test_and_set_bit(EVTCHN_FIFO_MASKED, BM(word));
+	return sync_test_and_set_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word));
 }
 
 static void evtchn_fifo_mask(unsigned port)
 {
 	event_word_t *word = event_word_from_port(port);
-	sync_set_bit(EVTCHN_FIFO_MASKED, BM(word));
+	sync_set_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word));
 }
 
+static bool evtchn_fifo_is_masked(unsigned port)
+{
+	event_word_t *word = event_word_from_port(port);
+	return sync_test_bit(EVTCHN_FIFO_BIT(MASKED, word), BM(word));
+}
 /*
  * Clear MASKED, spinning if BUSY is set.
  */
@@ -211,7 +231,7 @@ static void evtchn_fifo_unmask(unsigned port)
 	BUG_ON(!irqs_disabled());
 
 	clear_masked(word);
-	if (sync_test_bit(EVTCHN_FIFO_PENDING, BM(word))) {
+	if (evtchn_fifo_is_pending(port)) {
 		struct evtchn_unmask unmask = { .port = port };
 		(void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
 	}
@@ -243,7 +263,7 @@ static void handle_irq_for_port(unsigned port)
 
 static void consume_one_event(unsigned cpu,
 			      struct evtchn_fifo_control_block *control_block,
-			      unsigned priority, uint32_t *ready)
+			      unsigned priority, unsigned long *ready)
 {
 	struct evtchn_fifo_queue *q = &per_cpu(cpu_queue, cpu);
 	uint32_t head;
@@ -273,10 +293,9 @@ static void consume_one_event(unsigned cpu,
 	 * copy of the ready word.
 	 */
 	if (head == 0)
-		clear_bit(priority, BM(ready));
+		clear_bit(priority, ready);
 
-	if (sync_test_bit(EVTCHN_FIFO_PENDING, BM(word))
-	    && !sync_test_bit(EVTCHN_FIFO_MASKED, BM(word)))
+	if (evtchn_fifo_is_pending(port) && !evtchn_fifo_is_masked(port))
 		handle_irq_for_port(port);
 
 	q->head[priority] = head;
@@ -285,7 +304,7 @@ static void consume_one_event(unsigned cpu,
 static void evtchn_fifo_handle_events(unsigned cpu)
 {
 	struct evtchn_fifo_control_block *control_block;
-	uint32_t ready;
+	unsigned long ready;
 	unsigned q;
 
 	control_block = per_cpu(cpu_control_block, cpu);
-- 
1.7.2.5

Re: [PATCH] xen: workaround for 64-bit size/alignment bitops

[Ian Campbell]

On Mon, 2014-04-28 at 11:13 +0100, David Vrabel wrote:
> On 28/04/14 10:13, Ian Campbell wrote:
> > On Sun, 2014-04-27 at 10:09 +0100, Vladimir Murzin wrote:
> >> diff --git a/drivers/xen/events/events_fifo.c b/drivers/xen/events/events_fifo.c
> >> index 96109a9..bff9841 100644
> >> --- a/drivers/xen/events/events_fifo.c
> >> +++ b/drivers/xen/events/events_fifo.c
> >> @@ -66,7 +66,9 @@ static DEFINE_PER_CPU(struct evtchn_fifo_queue, cpu_queue);
> >>  static event_word_t *event_array[MAX_EVENT_ARRAY_PAGES] __read_mostly;
> >>  static unsigned event_array_pages __read_mostly;
> >>  
> >> -#define BM(w) ((unsigned long *)(w))
> >> +
> >> +#define BM(w) (unsigned long *)((unsigned long)w & ~0x7UL)
> >> +#define EVTCHN_FIFO_BIT(b, w) (((unsigned long)w & 0x4UL) ? (EVTCHN_FIFO_ ##b + 32) : EVTCHN_FIFO_ ##b)
> > 
> > A comment to describe why we jump through these hoops might be nice.
> > Apart from that: Reviewed-by: Ian Campbell <ian.campbell@citrix.com>
> 
> I added a comment and made the fix conditional on !x86 and 64-bit (see below)
> and applied to stable/for-linus-3.15.

Excellent, thanks!