From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "airlied@linux.ie" <airlied@linux.ie>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH v3 3/3] drm/i915/display: Configure HDMI2.1 Pcon for FRL only if Src-Ctl mode is available
Date: Mon, 22 Mar 2021 06:15:17 +0000 [thread overview]
Message-ID: <53662c38c348402b83ebde0e753fd5b2@intel.com> (raw)
In-Reply-To: <20210309043915.1921-4-ankit.k.nautiyal@intel.com>
> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> Sent: Tuesday, March 9, 2021 10:09 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; ville.syrjala@linux.intel.com; Shankar, Uma
> <uma.shankar@intel.com>; airlied@linux.ie; jani.nikula@linux.intel.com
> Subject: [PATCH v3 3/3] drm/i915/display: Configure HDMI2.1 Pcon for FRL only if
> Src-Ctl mode is available
>
> Currently we see only the MAX FRL BW from PCON before going for FRL.
> Also add the check if source control mode is supported by the PCON, before starting
> configuring PCON for FRL training.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 2e90359ce21f..8e401d3fd29d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2638,7 +2638,8 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>
> /* Always go for FRL training if supported */
> - if (!intel_dp_is_hdmi_2_1_sink(intel_dp) ||
> + if (!(intel_dp->dpcd[2] & DP_PCON_SOURCE_CTL_MODE) ||
Would be good to add spec reference as well here.
With that added, this is
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> + !intel_dp_is_hdmi_2_1_sink(intel_dp) ||
> intel_dp->frl.is_trained)
> return;
>
> --
> 2.29.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>
Cc: "airlied@linux.ie" <airlied@linux.ie>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>
Subject: RE: [PATCH v3 3/3] drm/i915/display: Configure HDMI2.1 Pcon for FRL only if Src-Ctl mode is available
Date: Mon, 22 Mar 2021 06:15:17 +0000 [thread overview]
Message-ID: <53662c38c348402b83ebde0e753fd5b2@intel.com> (raw)
In-Reply-To: <20210309043915.1921-4-ankit.k.nautiyal@intel.com>
> -----Original Message-----
> From: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>
> Sent: Tuesday, March 9, 2021 10:09 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; ville.syrjala@linux.intel.com; Shankar, Uma
> <uma.shankar@intel.com>; airlied@linux.ie; jani.nikula@linux.intel.com
> Subject: [PATCH v3 3/3] drm/i915/display: Configure HDMI2.1 Pcon for FRL only if
> Src-Ctl mode is available
>
> Currently we see only the MAX FRL BW from PCON before going for FRL.
> Also add the check if source control mode is supported by the PCON, before starting
> configuring PCON for FRL training.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 2e90359ce21f..8e401d3fd29d 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2638,7 +2638,8 @@ void intel_dp_check_frl_training(struct intel_dp *intel_dp)
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>
> /* Always go for FRL training if supported */
> - if (!intel_dp_is_hdmi_2_1_sink(intel_dp) ||
> + if (!(intel_dp->dpcd[2] & DP_PCON_SOURCE_CTL_MODE) ||
Would be good to add spec reference as well here.
With that added, this is
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
> + !intel_dp_is_hdmi_2_1_sink(intel_dp) ||
> intel_dp->frl.is_trained)
> return;
>
> --
> 2.29.2
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2021-03-22 6:15 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-09 4:39 [Intel-gfx] [PATCH v3 0/3] HDMI2.1 PCON Misc Fixes Ankit Nautiyal
2021-03-09 4:39 ` Ankit Nautiyal
2021-03-09 4:39 ` [Intel-gfx] [PATCH v3 1/3] drm/dp_helper: Define options for FRL training for HDMI2.1 PCON Ankit Nautiyal
2021-03-09 4:39 ` Ankit Nautiyal
2021-03-10 18:51 ` [Intel-gfx] " Ville Syrjälä
2021-03-10 18:51 ` Ville Syrjälä
2021-03-09 4:39 ` [Intel-gfx] [PATCH v3 2/3] drm/i915/display: Remove FRL related code from disable DP sequence for older platforms Ankit Nautiyal
2021-03-09 4:39 ` Ankit Nautiyal
2021-03-09 4:39 ` [Intel-gfx] [PATCH v3 3/3] drm/i915/display: Configure HDMI2.1 Pcon for FRL only if Src-Ctl mode is available Ankit Nautiyal
2021-03-09 4:39 ` Ankit Nautiyal
2021-03-22 6:15 ` Shankar, Uma [this message]
2021-03-22 6:15 ` Shankar, Uma
2021-03-22 7:01 ` [Intel-gfx] [PATCH v4 " Ankit Nautiyal
2021-03-22 7:01 ` Ankit Nautiyal
2021-03-09 5:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for HDMI2.1 PCON Misc Fixes (rev3) Patchwork
2021-03-09 5:44 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-09 7:53 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-03-22 10:53 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for HDMI2.1 PCON Misc Fixes (rev4) Patchwork
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