* [PATCH] metag: fix memory barriers
@ 2014-05-08 19:51 ` Mikulas Patocka
0 siblings, 0 replies; 6+ messages in thread
From: Mikulas Patocka @ 2014-05-08 19:51 UTC (permalink / raw)
To: James Hogan, linux-metag-u79uwXL29TY76Z2rM5mHXA
Cc: linux-kernel-u79uwXL29TY76Z2rM5mHXA, Peter Zijlstra
Volatile access doesn't really imply the compiler barrier. Volatile access
is only ordered with respect to other volatile accesses, it isn't ordered
with respect to general memory accesses. Gcc may reorder memory accesses
around volatile access, as we can see in this simple example (if we
compile it with optimization, both increments of *b will be collapsed to
just one):
void fn(volatile int *a, long *b)
{
(*b)++;
*a = 10;
(*b)++;
}
Consequently, we need the compiler barrier after a write to the volatile
variable, to make sure that the compiler doesn't reorder the volatile
write with something else.
Signed-off-by: Mikulas Patocka <mpatocka-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
---
arch/metag/include/asm/barrier.h | 3 +++
1 file changed, 3 insertions(+)
Index: linux-3.15-rc4/arch/metag/include/asm/barrier.h
===================================================================
--- linux-3.15-rc4.orig/arch/metag/include/asm/barrier.h 2014-05-08 16:23:17.000000000 +0200
+++ linux-3.15-rc4/arch/metag/include/asm/barrier.h 2014-05-08 16:24:01.000000000 +0200
@@ -15,6 +15,7 @@ static inline void wr_fence(void)
volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_FENCE;
barrier();
*flushptr = 0;
+ barrier();
}
#else /* CONFIG_METAG_META21 */
@@ -35,6 +36,7 @@ static inline void wr_fence(void)
*flushptr = 0;
*flushptr = 0;
*flushptr = 0;
+ barrier();
}
#endif /* !CONFIG_METAG_META21 */
@@ -68,6 +70,7 @@ static inline void fence(void)
volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_ATOMIC_UNLOCK;
barrier();
*flushptr = 0;
+ barrier();
}
#define smp_mb() fence()
#define smp_rmb() fence()
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^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH] metag: fix memory barriers
@ 2014-05-08 19:51 ` Mikulas Patocka
0 siblings, 0 replies; 6+ messages in thread
From: Mikulas Patocka @ 2014-05-08 19:51 UTC (permalink / raw)
To: James Hogan, linux-metag; +Cc: linux-kernel, Peter Zijlstra
Volatile access doesn't really imply the compiler barrier. Volatile access
is only ordered with respect to other volatile accesses, it isn't ordered
with respect to general memory accesses. Gcc may reorder memory accesses
around volatile access, as we can see in this simple example (if we
compile it with optimization, both increments of *b will be collapsed to
just one):
void fn(volatile int *a, long *b)
{
(*b)++;
*a = 10;
(*b)++;
}
Consequently, we need the compiler barrier after a write to the volatile
variable, to make sure that the compiler doesn't reorder the volatile
write with something else.
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: stable@vger.kernel.org
---
arch/metag/include/asm/barrier.h | 3 +++
1 file changed, 3 insertions(+)
Index: linux-3.15-rc4/arch/metag/include/asm/barrier.h
===================================================================
--- linux-3.15-rc4.orig/arch/metag/include/asm/barrier.h 2014-05-08 16:23:17.000000000 +0200
+++ linux-3.15-rc4/arch/metag/include/asm/barrier.h 2014-05-08 16:24:01.000000000 +0200
@@ -15,6 +15,7 @@ static inline void wr_fence(void)
volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_FENCE;
barrier();
*flushptr = 0;
+ barrier();
}
#else /* CONFIG_METAG_META21 */
@@ -35,6 +36,7 @@ static inline void wr_fence(void)
*flushptr = 0;
*flushptr = 0;
*flushptr = 0;
+ barrier();
}
#endif /* !CONFIG_METAG_META21 */
@@ -68,6 +70,7 @@ static inline void fence(void)
volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_ATOMIC_UNLOCK;
barrier();
*flushptr = 0;
+ barrier();
}
#define smp_mb() fence()
#define smp_rmb() fence()
^ permalink raw reply [flat|nested] 6+ messages in thread[parent not found: <alpine.LRH.2.02.1405081546110.4346-Hpncn10jQN4oNljnaZt3ZvA+iT7yCHsGwRM8/txMwJMAicBL8TP8PQ@public.gmane.org>]
* Re: [PATCH] metag: fix memory barriers
2014-05-08 19:51 ` Mikulas Patocka
@ 2014-05-09 9:11 ` Peter Zijlstra
-1 siblings, 0 replies; 6+ messages in thread
From: Peter Zijlstra @ 2014-05-09 9:11 UTC (permalink / raw)
To: Mikulas Patocka
Cc: James Hogan, linux-metag-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
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On Thu, May 08, 2014 at 03:51:37PM -0400, Mikulas Patocka wrote:
> Volatile access doesn't really imply the compiler barrier. Volatile access
> is only ordered with respect to other volatile accesses, it isn't ordered
> with respect to general memory accesses. Gcc may reorder memory accesses
> around volatile access, as we can see in this simple example (if we
> compile it with optimization, both increments of *b will be collapsed to
> just one):
>
> void fn(volatile int *a, long *b)
> {
> (*b)++;
> *a = 10;
> (*b)++;
> }
>
> Consequently, we need the compiler barrier after a write to the volatile
> variable, to make sure that the compiler doesn't reorder the volatile
> write with something else.
>
> Signed-off-by: Mikulas Patocka <mpatocka-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>
> Cc: stable-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Acked-by: Peter Zijlstra <peterz-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] metag: fix memory barriers
@ 2014-05-09 9:11 ` Peter Zijlstra
0 siblings, 0 replies; 6+ messages in thread
From: Peter Zijlstra @ 2014-05-09 9:11 UTC (permalink / raw)
To: Mikulas Patocka; +Cc: James Hogan, linux-metag, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 870 bytes --]
On Thu, May 08, 2014 at 03:51:37PM -0400, Mikulas Patocka wrote:
> Volatile access doesn't really imply the compiler barrier. Volatile access
> is only ordered with respect to other volatile accesses, it isn't ordered
> with respect to general memory accesses. Gcc may reorder memory accesses
> around volatile access, as we can see in this simple example (if we
> compile it with optimization, both increments of *b will be collapsed to
> just one):
>
> void fn(volatile int *a, long *b)
> {
> (*b)++;
> *a = 10;
> (*b)++;
> }
>
> Consequently, we need the compiler barrier after a write to the volatile
> variable, to make sure that the compiler doesn't reorder the volatile
> write with something else.
>
> Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
> Cc: stable@vger.kernel.org
Acked-by: Peter Zijlstra <peterz@infradead.org>
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^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH] metag: fix memory barriers
2014-05-08 19:51 ` Mikulas Patocka
@ 2014-05-09 13:58 ` James Hogan
-1 siblings, 0 replies; 6+ messages in thread
From: James Hogan @ 2014-05-09 13:58 UTC (permalink / raw)
To: Mikulas Patocka, linux-metag; +Cc: linux-kernel, Peter Zijlstra
[-- Attachment #1: Type: text/plain, Size: 1928 bytes --]
On 08/05/14 20:51, Mikulas Patocka wrote:
> Volatile access doesn't really imply the compiler barrier. Volatile access
> is only ordered with respect to other volatile accesses, it isn't ordered
> with respect to general memory accesses. Gcc may reorder memory accesses
> around volatile access, as we can see in this simple example (if we
> compile it with optimization, both increments of *b will be collapsed to
> just one):
>
> void fn(volatile int *a, long *b)
> {
> (*b)++;
> *a = 10;
> (*b)++;
> }
>
> Consequently, we need the compiler barrier after a write to the volatile
> variable, to make sure that the compiler doesn't reorder the volatile
> write with something else.
>
> Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
> Cc: stable@vger.kernel.org
Applied for v3.15, thanks!
Cheers
James
>
> ---
> arch/metag/include/asm/barrier.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> Index: linux-3.15-rc4/arch/metag/include/asm/barrier.h
> ===================================================================
> --- linux-3.15-rc4.orig/arch/metag/include/asm/barrier.h 2014-05-08 16:23:17.000000000 +0200
> +++ linux-3.15-rc4/arch/metag/include/asm/barrier.h 2014-05-08 16:24:01.000000000 +0200
> @@ -15,6 +15,7 @@ static inline void wr_fence(void)
> volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_FENCE;
> barrier();
> *flushptr = 0;
> + barrier();
> }
>
> #else /* CONFIG_METAG_META21 */
> @@ -35,6 +36,7 @@ static inline void wr_fence(void)
> *flushptr = 0;
> *flushptr = 0;
> *flushptr = 0;
> + barrier();
> }
>
> #endif /* !CONFIG_METAG_META21 */
> @@ -68,6 +70,7 @@ static inline void fence(void)
> volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_ATOMIC_UNLOCK;
> barrier();
> *flushptr = 0;
> + barrier();
> }
> #define smp_mb() fence()
> #define smp_rmb() fence()
>
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^ permalink raw reply [flat|nested] 6+ messages in thread* Re: [PATCH] metag: fix memory barriers
@ 2014-05-09 13:58 ` James Hogan
0 siblings, 0 replies; 6+ messages in thread
From: James Hogan @ 2014-05-09 13:58 UTC (permalink / raw)
To: Mikulas Patocka, linux-metag; +Cc: linux-kernel, Peter Zijlstra
[-- Attachment #1: Type: text/plain, Size: 1928 bytes --]
On 08/05/14 20:51, Mikulas Patocka wrote:
> Volatile access doesn't really imply the compiler barrier. Volatile access
> is only ordered with respect to other volatile accesses, it isn't ordered
> with respect to general memory accesses. Gcc may reorder memory accesses
> around volatile access, as we can see in this simple example (if we
> compile it with optimization, both increments of *b will be collapsed to
> just one):
>
> void fn(volatile int *a, long *b)
> {
> (*b)++;
> *a = 10;
> (*b)++;
> }
>
> Consequently, we need the compiler barrier after a write to the volatile
> variable, to make sure that the compiler doesn't reorder the volatile
> write with something else.
>
> Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
> Cc: stable@vger.kernel.org
Applied for v3.15, thanks!
Cheers
James
>
> ---
> arch/metag/include/asm/barrier.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> Index: linux-3.15-rc4/arch/metag/include/asm/barrier.h
> ===================================================================
> --- linux-3.15-rc4.orig/arch/metag/include/asm/barrier.h 2014-05-08 16:23:17.000000000 +0200
> +++ linux-3.15-rc4/arch/metag/include/asm/barrier.h 2014-05-08 16:24:01.000000000 +0200
> @@ -15,6 +15,7 @@ static inline void wr_fence(void)
> volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_FENCE;
> barrier();
> *flushptr = 0;
> + barrier();
> }
>
> #else /* CONFIG_METAG_META21 */
> @@ -35,6 +36,7 @@ static inline void wr_fence(void)
> *flushptr = 0;
> *flushptr = 0;
> *flushptr = 0;
> + barrier();
> }
>
> #endif /* !CONFIG_METAG_META21 */
> @@ -68,6 +70,7 @@ static inline void fence(void)
> volatile int *flushptr = (volatile int *) LINSYSEVENT_WR_ATOMIC_UNLOCK;
> barrier();
> *flushptr = 0;
> + barrier();
> }
> #define smp_mb() fence()
> #define smp_rmb() fence()
>
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^ permalink raw reply [flat|nested] 6+ messages in thread
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2014-05-08 19:51 [PATCH] metag: fix memory barriers Mikulas Patocka
2014-05-08 19:51 ` Mikulas Patocka
[not found] ` <alpine.LRH.2.02.1405081546110.4346-Hpncn10jQN4oNljnaZt3ZvA+iT7yCHsGwRM8/txMwJMAicBL8TP8PQ@public.gmane.org>
2014-05-09 9:11 ` Peter Zijlstra
2014-05-09 9:11 ` Peter Zijlstra
2014-05-09 13:58 ` James Hogan
2014-05-09 13:58 ` James Hogan
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