From: "Andreas Färber" <afaerber@suse.de>
To: Paolo Bonzini <pbonzini@redhat.com>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 7/8] pc: port 92 reset requires a low->high transition
Date: Mon, 12 May 2014 09:48:49 +0200 [thread overview]
Message-ID: <53707CE1.6010500@suse.de> (raw)
In-Reply-To: <1399041202-26184-8-git-send-email-pbonzini@redhat.com>
Am 02.05.2014 16:33, schrieb Paolo Bonzini:
> The PIIX datasheet says that "before another INIT pulse can be
> generated via [port 92h], [bit 0] must be written back to a
> zero.
>
> This bug is masked right now because a full reset will clear the
> value of port 92h. But once we implement soft reset correctly,
> the next attempt to enable the A20 line by setting bit 1 (and
> leaving the others untouched) will cause another reset.
>
> Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>
> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Andreas
--
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
next prev parent reply other threads:[~2014-05-12 7:49 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-02 14:33 [Qemu-devel] [PATCH v2 0/8] x86: correctly implement soft reset Paolo Bonzini
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 1/8] kvm: reset state from the CPU's reset method Paolo Bonzini
2014-05-12 7:15 ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 2/8] kvm: forward INIT signals coming from the chipset Paolo Bonzini
2014-05-12 7:59 ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 3/8] target-i386: fix set of registers zeroed on reset Paolo Bonzini
2014-05-12 7:56 ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 4/8] target-i386: preserve FPU and MSR state on INIT Paolo Bonzini
2014-05-12 7:23 ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 5/8] apic: do not accept SIPI on the bootstrap processor Paolo Bonzini
2014-05-12 7:36 ` Andreas Färber
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 6/8] cpu: make CPU_INTERRUPT_RESET available on all targets Paolo Bonzini
2014-05-12 7:47 ` Andreas Färber
2014-05-12 9:41 ` Peter Maydell
2014-05-12 10:31 ` Paolo Bonzini
2014-05-23 17:59 ` Peter Maydell
2014-05-23 18:10 ` Paolo Bonzini
2014-05-24 8:30 ` Peter Maydell
2014-05-24 12:59 ` Paolo Bonzini
2014-05-24 15:54 ` Peter Maydell
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 7/8] pc: port 92 reset requires a low->high transition Paolo Bonzini
2014-05-12 7:48 ` Andreas Färber [this message]
2014-05-02 14:33 ` [Qemu-devel] [PATCH v2 8/8] x86: correctly implement soft reset Paolo Bonzini
2014-05-05 12:13 ` Michael S. Tsirkin
2014-05-12 7:53 ` Andreas Färber
2014-05-12 9:12 ` Paolo Bonzini
2014-05-05 12:11 ` [Qemu-devel] [PATCH v2 0/8] " Michael S. Tsirkin
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