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From: sebastian.hesselbarth@gmail.com (Sebastian Hesselbarth)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 5/8] clk: berlin: add driver for BG2x complex divider cells
Date: Tue, 13 May 2014 10:40:32 +0200	[thread overview]
Message-ID: <5371DA80.2060603@gmail.com> (raw)
In-Reply-To: <1399839881-29895-6-git-send-email-sebastian.hesselbarth@gmail.com>

On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote:
> From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
>
> This is a driver for the complex divider cells found on Marvell Berlin2
> SoCs. The cells come in two flavors: single register cells and shared
> register cells. The single register cells are registered by using a DT
> node, while the shared ones will be taken care of in a SoC-specific
> core clock driver.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
[...]
> diff --git a/drivers/clk/berlin/berlin2-div.c b/drivers/clk/berlin/berlin2-div.c
> new file mode 100644
> index 000000000000..96513a6e8ca7
> --- /dev/null
> +++ b/drivers/clk/berlin/berlin2-div.c
> @@ -0,0 +1,326 @@
[...]
> +static void __init berlin2_div_of_setup(struct device_node *np)
> +{
> +	const char *parent_names[9] = {};
> +	char *mux_name = "mux0";
> +	int num_parents = 0;

num_parents is always zero...

> +	void __iomem *base;
> +	struct clk *iclk;
> +	struct clk *div;
> +	char *div_name;
> +	int n;
> +
> +	iclk = of_clk_get_by_name(np, "mux_bypass");
> +	if (IS_ERR(iclk)) {
> +		pr_err("%s: Missing mux bypass clock\n", np->full_name);
> +		return;
> +	}
> +	parent_names[0] = __clk_get_name(iclk);

.. and needs to be incremented here..

> +	clk_put(iclk);
> +
> +	/* collect mux input clock names */
> +	for (n = 0; n < 8; n++) {
> +		sprintf(mux_name, "mux%d", n);
> +		iclk = of_clk_get_by_name(np, mux_name);
> +		if (IS_ERR(iclk))
> +			continue;
> +		parent_names[1 + n] = __clk_get_name(iclk);

.. and here.

I'll fix it up for v2.

Sebastian

> +		clk_put(iclk);
> +	}
> +
> +	base = of_iomap(np, 0);
> +	if (!base) {
> +		pr_err("%s: Unable to map div register\n", np->full_name);
> +		return;
> +	}
> +
> +	div_name = of_clk_create_name(np);
> +	div = berlin2_div_register(&berlin2_single_div_map, base, div_name,
> +				   BERLIN2_DIV_HAS_GATE | BERLIN2_DIV_HAS_MUX,
> +				   parent_names, num_parents, 0, NULL);
> +	if (!IS_ERR(div))
> +		of_clk_add_provider(np, of_clk_src_simple_get, div);
> +
> +	kfree(div_name);
> +}
> +CLK_OF_DECLARE(berlin2_div, "marvell,berlin2-div", berlin2_div_of_setup);

WARNING: multiple messages have this Message-ID (diff)
From: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
To: unlisted-recipients:; (no To-header on input)
Cc: Alexandre Belloni <alexandre.belloni@free-electrons.com>,
	Mike Turquette <mturquette@linaro.org>,
	Antoine Tenart <antoine.tenart@free-electrons.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 5/8] clk: berlin: add driver for BG2x complex divider cells
Date: Tue, 13 May 2014 10:40:32 +0200	[thread overview]
Message-ID: <5371DA80.2060603@gmail.com> (raw)
In-Reply-To: <1399839881-29895-6-git-send-email-sebastian.hesselbarth@gmail.com>

On 05/11/2014 10:24 PM, Sebastian Hesselbarth wrote:
> From: Alexandre Belloni <alexandre.belloni@free-electrons.com>
>
> This is a driver for the complex divider cells found on Marvell Berlin2
> SoCs. The cells come in two flavors: single register cells and shared
> register cells. The single register cells are registered by using a DT
> node, while the shared ones will be taken care of in a SoC-specific
> core clock driver.
>
> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
> ---
[...]
> diff --git a/drivers/clk/berlin/berlin2-div.c b/drivers/clk/berlin/berlin2-div.c
> new file mode 100644
> index 000000000000..96513a6e8ca7
> --- /dev/null
> +++ b/drivers/clk/berlin/berlin2-div.c
> @@ -0,0 +1,326 @@
[...]
> +static void __init berlin2_div_of_setup(struct device_node *np)
> +{
> +	const char *parent_names[9] = {};
> +	char *mux_name = "mux0";
> +	int num_parents = 0;

num_parents is always zero...

> +	void __iomem *base;
> +	struct clk *iclk;
> +	struct clk *div;
> +	char *div_name;
> +	int n;
> +
> +	iclk = of_clk_get_by_name(np, "mux_bypass");
> +	if (IS_ERR(iclk)) {
> +		pr_err("%s: Missing mux bypass clock\n", np->full_name);
> +		return;
> +	}
> +	parent_names[0] = __clk_get_name(iclk);

.. and needs to be incremented here..

> +	clk_put(iclk);
> +
> +	/* collect mux input clock names */
> +	for (n = 0; n < 8; n++) {
> +		sprintf(mux_name, "mux%d", n);
> +		iclk = of_clk_get_by_name(np, mux_name);
> +		if (IS_ERR(iclk))
> +			continue;
> +		parent_names[1 + n] = __clk_get_name(iclk);

.. and here.

I'll fix it up for v2.

Sebastian

> +		clk_put(iclk);
> +	}
> +
> +	base = of_iomap(np, 0);
> +	if (!base) {
> +		pr_err("%s: Unable to map div register\n", np->full_name);
> +		return;
> +	}
> +
> +	div_name = of_clk_create_name(np);
> +	div = berlin2_div_register(&berlin2_single_div_map, base, div_name,
> +				   BERLIN2_DIV_HAS_GATE | BERLIN2_DIV_HAS_MUX,
> +				   parent_names, num_parents, 0, NULL);
> +	if (!IS_ERR(div))
> +		of_clk_add_provider(np, of_clk_src_simple_get, div);
> +
> +	kfree(div_name);
> +}
> +CLK_OF_DECLARE(berlin2_div, "marvell,berlin2-div", berlin2_div_of_setup);


  reply	other threads:[~2014-05-13  8:40 UTC|newest]

Thread overview: 93+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-11 20:24 [PATCH 0/8] Marvell Berlin full clock support Sebastian Hesselbarth
2014-05-11 20:24 ` Sebastian Hesselbarth
2014-05-11 20:24 ` [PATCH 1/8] clk: add helper for unique DT clock names Sebastian Hesselbarth
2014-05-11 20:24   ` Sebastian Hesselbarth
2014-05-11 20:24   ` Sebastian Hesselbarth
2014-05-13 19:49   ` Mike Turquette
2014-05-13 19:49     ` Mike Turquette
2014-05-13 19:49     ` Mike Turquette
2014-05-13 20:19     ` Sebastian Hesselbarth
2014-05-13 20:19       ` Sebastian Hesselbarth
2014-05-13 20:19       ` Sebastian Hesselbarth
2014-05-13 20:51       ` Mike Turquette
2014-05-13 20:51         ` Mike Turquette
2014-05-13 21:25         ` Sebastian Hesselbarth
2014-05-13 21:25           ` Sebastian Hesselbarth
2014-05-13 21:25           ` Sebastian Hesselbarth
2014-05-11 20:24 ` [PATCH 2/8] clk: berlin: add clock binding docs for Marvell Berlin2 SoCs Sebastian Hesselbarth
2014-05-11 20:24   ` Sebastian Hesselbarth
2014-05-13  8:38   ` Sebastian Hesselbarth
2014-05-13  8:38     ` Sebastian Hesselbarth
2014-05-13  8:38     ` Sebastian Hesselbarth
2014-05-13 14:47   ` Alexandre Belloni
2014-05-13 14:47     ` Alexandre Belloni
2014-05-14 22:32   ` Mike Turquette
2014-05-14 22:32     ` Mike Turquette
2014-05-14 22:32     ` Mike Turquette
2014-05-14 23:17     ` Sebastian Hesselbarth
2014-05-14 23:17       ` Sebastian Hesselbarth
2014-05-14 23:17       ` Sebastian Hesselbarth
2014-05-15  4:41       ` Mike Turquette
2014-05-15  4:41         ` Mike Turquette
2014-05-15  6:53         ` Sebastian Hesselbarth
2014-05-15  6:53           ` Sebastian Hesselbarth
2014-05-15  8:34         ` Alexandre Belloni
2014-05-15  8:34           ` Alexandre Belloni
2014-05-11 20:24 ` [PATCH 3/8] clk: berlin: add driver for BG2x audio/video PLL Sebastian Hesselbarth
2014-05-11 20:24   ` Sebastian Hesselbarth
2014-05-11 20:24 ` [PATCH 4/8] clk: berlin: add driver for BG2x simple PLLs Sebastian Hesselbarth
2014-05-11 20:24   ` Sebastian Hesselbarth
2014-05-11 20:24 ` [PATCH 5/8] clk: berlin: add driver for BG2x complex divider cells Sebastian Hesselbarth
2014-05-11 20:24   ` Sebastian Hesselbarth
2014-05-13  8:40   ` Sebastian Hesselbarth [this message]
2014-05-13  8:40     ` Sebastian Hesselbarth
2014-05-11 20:24 ` [PATCH 6/8] clk: berlin: add core clock driver for BG2/BG2CD Sebastian Hesselbarth
2014-05-11 20:24   ` Sebastian Hesselbarth
2014-05-14 11:43   ` Alexandre Belloni
2014-05-14 11:43     ` Alexandre Belloni
2014-05-14 11:48     ` Sebastian Hesselbarth
2014-05-14 11:48       ` Sebastian Hesselbarth
2014-05-11 20:24 ` [PATCH 7/8] ARM: dts: berlin: convert BG2CD to DT clock nodes Sebastian Hesselbarth
2014-05-11 20:24   ` Sebastian Hesselbarth
2014-05-12 19:55   ` Sebastian Hesselbarth
2014-05-12 19:55     ` Sebastian Hesselbarth
2014-05-12 19:55     ` Sebastian Hesselbarth
2014-05-13  8:42   ` Sebastian Hesselbarth
2014-05-13  8:42     ` Sebastian Hesselbarth
2014-05-13  8:42     ` Sebastian Hesselbarth
2014-05-11 20:24 ` [PATCH 8/8] ARM: dts: berlin: convert BG2 " Sebastian Hesselbarth
2014-05-11 20:24   ` Sebastian Hesselbarth
2014-05-14 20:15 ` [PATCH v2 00/10] Marvell Berlin full clock support Sebastian Hesselbarth
2014-05-14 20:15   ` Sebastian Hesselbarth
2014-05-14 20:15   ` [PATCH v2 01/10] dt-binding: clk: add clock binding docs for Marvell Berlin2 SoCs Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth
2014-05-14 20:15   ` [PATCH v2 02/10] clk: berlin: add binding include for BG2/BG2CD clock ids Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth
2014-05-14 20:15   ` [PATCH v2 03/10] clk: berlin: add driver for BG2x audio/video PLL Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth
2014-05-14 20:15   ` [PATCH v2 04/10] clk: berlin: add driver for BG2x simple PLLs Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth
2014-05-14 20:15   ` [PATCH v2 05/10] clk: berlin: add driver for BG2x complex divider cells Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth
2014-05-15  7:56     ` Alexandre Belloni
2014-05-15  7:56       ` Alexandre Belloni
2014-05-14 20:15   ` [PATCH v2 06/10] clk: berlin: add core clock driver for BG2/BG2CD Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth
2014-05-15  8:09     ` Alexandre Belloni
2014-05-15  8:09       ` Alexandre Belloni
2014-05-15 15:43       ` Sebastian Hesselbarth
2014-05-15 15:43         ` Sebastian Hesselbarth
2014-05-15 16:55         ` Alexandre Belloni
2014-05-15 16:55           ` Alexandre Belloni
2014-05-14 20:15   ` [PATCH v2 07/10] clk: berlin: add core clock driver for BG2Q Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth
2014-05-15  7:46     ` Alexandre Belloni
2014-05-15  7:46       ` Alexandre Belloni
2014-05-14 20:15   ` [PATCH v2 08/10] ARM: dts: berlin: convert BG2CD to DT clock nodes Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth
2014-05-14 20:15   ` [PATCH v2 09/10] ARM: dts: berlin: convert BG2 " Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth
2014-05-14 20:15   ` [PATCH v2 10/10] ARM: dts: berlin: convert BG2Q " Sebastian Hesselbarth
2014-05-14 20:15     ` Sebastian Hesselbarth

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