* [PATCH v4 0/6] add parallel NAND support for TI's new OMAPx and AMxx platforms (Part-2) @ 2014-05-09 20:40 Pekon Gupta 2014-05-09 20:40 ` [PATCH v4 1/6] ARM: dts: am335x-bone: add support for beaglebone NAND cape Pekon Gupta 2014-05-09 20:40 ` [PATCH v4 2/6] ARM: dts: am437x-gp-evm: add support for parallel NAND flash Pekon Gupta 0 siblings, 2 replies; 6+ messages in thread From: Pekon Gupta @ 2014-05-09 20:40 UTC (permalink / raw) To: Tony Lindgren, bcousson; +Cc: linux-omap, Pekon Gupta *changes v3 -> v4* fixed <reg> and <range> property for all GPMC DT nodes added fix for am335x-evm and am437x-epos-evm rebased on git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap +omap-for-v3.16/dt *changes v2 -> v3* rebased on git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap :master merged leftover patches (dra7-evm and am43x-epos-evm fix) from Part-1 series *changes v1 -> v2* [PATCH v2 1/2] created new DTS for memory-capes based on following feedbacks http://www.spinics.net/lists/linux-omap/msg104348.html from 'Nishanth Menon <nm@ti.com>' http://www.spinics.net/lists/linux-omap/msg104447.html from 'Tony Lindgren <tony@atomide.com>' [PATCH v2 2/2] <same as [PATCH v1 1/3]> *original v1* This patch-set adds parallel NAND support on following TI platforms - AM335x (am335x-bone LT, am335x-boneblack): <disabled by default> - AM43xx (am437x-gp-evm) Minal Shah (1): ARM: dts: dra7: add support for parallel NAND flash Pekon Gupta (5): ARM: dts: am335x-bone: add support for beaglebone NAND cape ARM: dts: am437x-gp-evm: add support for parallel NAND flash ARM: dts: am43xx: fix starting offset of NAND.filesystem MTD partition ARM: dts: am43x-epos-evm: fix reg and range property of GPMC NAND node ARM: dts: am335x-evm: fix reg and range property of GPMC NAND node arch/arm/boot/dts/am335x-bone-memory-cape.dts | 130 ++++++++++++++++++++++++++ arch/arm/boot/dts/am335x-bone.dts | 1 + arch/arm/boot/dts/am335x-boneblack.dts | 1 + arch/arm/boot/dts/am335x-evm.dts | 4 +- arch/arm/boot/dts/am437x-gp-evm.dts | 107 +++++++++++++++++++++ arch/arm/boot/dts/am43x-epos-evm.dts | 6 +- arch/arm/boot/dts/dra7-evm.dts | 117 +++++++++++++++++++++++ arch/arm/boot/dts/dra7.dtsi | 20 ++++ 8 files changed, 381 insertions(+), 5 deletions(-) create mode 100644 arch/arm/boot/dts/am335x-bone-memory-cape.dts -- 1.8.5.1.163.gd7aced9 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v4 1/6] ARM: dts: am335x-bone: add support for beaglebone NAND cape 2014-05-09 20:40 [PATCH v4 0/6] add parallel NAND support for TI's new OMAPx and AMxx platforms (Part-2) Pekon Gupta @ 2014-05-09 20:40 ` Pekon Gupta 2014-05-13 17:31 ` Tony Lindgren 2014-05-14 8:06 ` Roger Quadros 2014-05-09 20:40 ` [PATCH v4 2/6] ARM: dts: am437x-gp-evm: add support for parallel NAND flash Pekon Gupta 1 sibling, 2 replies; 6+ messages in thread From: Pekon Gupta @ 2014-05-09 20:40 UTC (permalink / raw) To: Tony Lindgren, bcousson; +Cc: linux-omap, Pekon Gupta Beaglebone Board can be connected to expansion boards to add devices to them. These expansion boards are called 'capes'. This patch adds support for following versions of Beaglebone(AM335x) NAND capes (a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64 (b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224 Further information and datasheets can be found at [1] and [2] * How to boot from NAND using Memory Expander + NAND Cape ? * - Important: As BOOTSEL values are sampled only at POR, so after changing any setting on SW2 (DIP switch), disconnect and reconnect all board power supply (including mini-USB console port) to POR the beaglebone. - Selection of ECC scheme for NAND cape(a), ROM code expects BCH8_HW ecc-scheme for NAND cape(b), ROM code expects BCH16_HW ecc-scheme - Selection of boot modes can be controlled via DIP switch(SW2) present on Memory Expander cape, so first boot via MMC or other sources to flash NAND device and then switch to SW2[SWITCH_BOOT]=ON to boot from NAND Cape. SW2[SWITCH_BOOT] == OFF follow default boot order MMC-> SPI -> UART -> USB SW2[SWITCH_BOOT] == ON boot mode selected via DIP switch(SW2) - For NAND boot following switch settings need to be followed SW2[ 0] = ON (SYSBOOT[ 0]==0: NAND boot mode selected ) SW2[ 1] = ON (SYSBOOT[ 1]==0: -- do -- ) SW2[ 2] = OFF (SYSBOOT[ 2]==1: -- do -- ) SW2[ 3] = OFF (SYSBOOT[ 3]==1: -- do -- ) SW2[ 4] = ON (SYSBOOT[ 4]==0: -- do -- ) SW2[ 8] = OFF (SYSBOOT[ 8]==1: 0:x8 device, 1:x16 device ) SW2[ 9] = ON (SYSBOOT[ 9]==0: ECC done by ROM ) SW2[10] = ON (SYSBOOT[10]==0: Non Muxed device ) SW2[11] = ON (SYSBOOT[11]==0: -- do -- ) [1] http://beagleboardtoys.info/index.php?title=BeagleBone_Memory_Expansion [2] http://beagleboardtoys.info/index.php?title=BeagleBone_4Gb_16-Bit_NAND_Module Signed-off-by: Pekon Gupta <pekon@ti.com> --- arch/arm/boot/dts/am335x-bone-memory-cape.dts | 130 ++++++++++++++++++++++++++ arch/arm/boot/dts/am335x-bone.dts | 1 + arch/arm/boot/dts/am335x-boneblack.dts | 1 + 3 files changed, 132 insertions(+) create mode 100644 arch/arm/boot/dts/am335x-bone-memory-cape.dts diff --git a/arch/arm/boot/dts/am335x-bone-memory-cape.dts b/arch/arm/boot/dts/am335x-bone-memory-cape.dts new file mode 100644 index 0000000..c59b3d7 --- /dev/null +++ b/arch/arm/boot/dts/am335x-bone-memory-cape.dts @@ -0,0 +1,130 @@ +/* + * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This DTS adds supports for capes using GPMC interface to connect external + * memory like NAND, NOR Flash to Beaglebone-LT (white) and Beaglebone-Black. + */ + + +&am33xx_pinmux { + nand_flash_x16: nand_flash_x16 { + pinctrl-single,pins = < + 0x00 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad0.gpmc_ad0 */ + 0x04 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad1.gpmc_ad1 */ + 0x08 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad2.gpmc_ad2 */ + 0x0c (MUX_MODE0 | PIN_INPUT) /* gpmc_ad3.gpmc_ad3 */ + 0x10 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad4.gpmc_ad4 */ + 0x14 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad5.gpmc_ad5 */ + 0x18 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad6.gpmc_ad6 */ + 0x1c (MUX_MODE0 | PIN_INPUT) /* gpmc_ad7.gpmc_ad7 */ + 0x20 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad8.gpmc_ad8 */ + 0x24 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad9.gpmc_ad9 */ + 0x28 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad10.gpmc_ad10 */ + 0x2c (MUX_MODE0 | PIN_INPUT) /* gpmc_ad11.gpmc_ad11 */ + 0x30 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad12.gpmc_ad12 */ + 0x34 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad13.gpmc_ad13 */ + 0x38 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad14.gpmc_ad14 */ + 0x3c (MUX_MODE0 | PIN_INPUT) /* gpmc_ad15.gpmc_ad15 */ + 0x70 (MUX_MODE0 | PIN_INPUT_PULLUP ) /* gpmc_wait0.gpmc_wait0 */ + 0x74 (MUX_MODE7 | PIN_OUTPUT_PULLUP) /* gpmc_wpn.gpio0_30 */ + 0x7c (MUX_MODE0 | PIN_OUTPUT_PULLUP) /* gpmc_csn0.gpmc_csn0 */ + 0x90 (MUX_MODE0 | PIN_OUTPUT) /* gpmc_advn_ale.gpmc_advn_ale */ + 0x94 (MUX_MODE0 | PIN_OUTPUT) /* gpmc_oen_ren.gpmc_oen_ren */ + 0x98 (MUX_MODE0 | PIN_OUTPUT) /* gpmc_wen.gpmc_wen */ + 0x9c (MUX_MODE0 | PIN_OUTPUT) /* gpmc_be0n_cle.gpmc_be0n_cle */ + >; + }; +}; + +&elm { + status = "disabled"; +}; + +&gpmc { + status = "disabled"; +}; + +&gpmc { + pinctrl-names = "default"; + pinctrl-0 = <&nand_flash_x16>; + ranges = <0 0 0 0x01000000>; /* CS0: NAND */ + nand@0,0 { + reg = <0 0 0x380>; /* CS0, offset=0x0, reg-map size=0x380 */ + ti,nand-ecc-opt = "bch8"; + ti,elm-id = <&elm>; + nand-bus-width = <16>; + gpmc,device-width = <2>; + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <80>; + gpmc,cs-wr-off-ns = <80>; + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <80>; + gpmc,adv-wr-off-ns = <80>; + gpmc,we-on-ns = <20>; + gpmc,we-off-ns = <60>; + gpmc,oe-on-ns = <20>; + gpmc,oe-off-ns = <60>; + gpmc,access-ns = <40>; + gpmc,rd-cycle-ns = <80>; + gpmc,wr-cycle-ns = <80>; + gpmc,wait-on-read = "true"; + gpmc,wait-on-write = "true"; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wait-monitoring-ns = <0>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + /* MTD partition table */ + /* All SPL-* partitions are sized to minimal length + * which can be independently programmable. For + * NAND flash this is equal to size of erase-block */ + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "NAND.SPL"; + reg = <0x00000000 0x00040000>; + }; + partition@1 { + label = "NAND.SPL.backup1"; + reg = <0x00040000 0x00040000>; + }; + partition@2 { + label = "NAND.SPL.backup2"; + reg = <0x00080000 0x00040000>; + }; + partition@3 { + label = "NAND.SPL.backup3"; + reg = <0x000C0000 0x00040000>; + }; + partition@4 { + label = "NAND.u-boot-spl-os"; + reg = <0x00100000 0x00080000>; + }; + partition@5 { + label = "NAND.u-boot"; + reg = <0x00180000 0x00100000>; + }; + partition@6 { + label = "NAND.u-boot-env"; + reg = <0x00280000 0x00040000>; + }; + partition@7 { + label = "NAND.u-boot-env.backup1"; + reg = <0x002C0000 0x00040000>; + }; + partition@8 { + label = "NAND.kernel"; + reg = <0x00300000 0x00700000>; + }; + partition@9 { + label = "NAND.file-system"; + reg = <0x00A00000 0x1F600000>; + }; + }; +}; diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts index 94ee427..f16bfcf 100644 --- a/arch/arm/boot/dts/am335x-bone.dts +++ b/arch/arm/boot/dts/am335x-bone.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am335x-bone-memory-cape.dts" &ldo3_reg { regulator-min-microvolt = <1800000>; diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts index 6b71ad9..c030b24 100644 --- a/arch/arm/boot/dts/am335x-boneblack.dts +++ b/arch/arm/boot/dts/am335x-boneblack.dts @@ -9,6 +9,7 @@ #include "am33xx.dtsi" #include "am335x-bone-common.dtsi" +#include "am335x-bone-memory-cape.dts" &ldo3_reg { regulator-min-microvolt = <1800000>; -- 1.8.5.1.163.gd7aced9 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v4 1/6] ARM: dts: am335x-bone: add support for beaglebone NAND cape 2014-05-09 20:40 ` [PATCH v4 1/6] ARM: dts: am335x-bone: add support for beaglebone NAND cape Pekon Gupta @ 2014-05-13 17:31 ` Tony Lindgren 2014-05-14 8:06 ` Roger Quadros 1 sibling, 0 replies; 6+ messages in thread From: Tony Lindgren @ 2014-05-13 17:31 UTC (permalink / raw) To: Pekon Gupta; +Cc: bcousson, linux-omap * Pekon Gupta <pekon@ti.com> [140509 13:41]: > +&gpmc { > + pinctrl-names = "default"; > + pinctrl-0 = <&nand_flash_x16>; > + ranges = <0 0 0 0x01000000>; /* CS0: NAND */ > + nand@0,0 { > + reg = <0 0 0x380>; /* CS0, offset=0x0, reg-map size=0x380 */ Just noticed this, can you please use the comments I suggested here too? That way we know which ones we've fixed up and can also grep easier eventually to unify the GPMC mappings a bit. Thanks, Tony ^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 1/6] ARM: dts: am335x-bone: add support for beaglebone NAND cape 2014-05-09 20:40 ` [PATCH v4 1/6] ARM: dts: am335x-bone: add support for beaglebone NAND cape Pekon Gupta 2014-05-13 17:31 ` Tony Lindgren @ 2014-05-14 8:06 ` Roger Quadros 2014-05-14 9:12 ` Gupta, Pekon 1 sibling, 1 reply; 6+ messages in thread From: Roger Quadros @ 2014-05-14 8:06 UTC (permalink / raw) To: Pekon Gupta, Tony Lindgren, bcousson; +Cc: linux-omap Hi Pekon, On 05/09/2014 11:40 PM, Pekon Gupta wrote: > Beaglebone Board can be connected to expansion boards to add devices to them. > These expansion boards are called 'capes'. This patch adds support for > following versions of Beaglebone(AM335x) NAND capes > (a) NAND Device with bus-width=16, block-size=128k, page-size=2k, oob-size=64 > (b) NAND Device with bus-width=16, block-size=256k, page-size=4k, oob-size=224 > Further information and datasheets can be found at [1] and [2] > > * How to boot from NAND using Memory Expander + NAND Cape ? * > - Important: As BOOTSEL values are sampled only at POR, so after changing any > setting on SW2 (DIP switch), disconnect and reconnect all board power supply > (including mini-USB console port) to POR the beaglebone. > > - Selection of ECC scheme > for NAND cape(a), ROM code expects BCH8_HW ecc-scheme > for NAND cape(b), ROM code expects BCH16_HW ecc-scheme > > - Selection of boot modes can be controlled via DIP switch(SW2) present on > Memory Expander cape, so first boot via MMC or other sources to flash NAND > device and then switch to SW2[SWITCH_BOOT]=ON to boot from NAND Cape. > SW2[SWITCH_BOOT] == OFF follow default boot order MMC-> SPI -> UART -> USB > SW2[SWITCH_BOOT] == ON boot mode selected via DIP switch(SW2) > > - For NAND boot following switch settings need to be followed > SW2[ 0] = ON (SYSBOOT[ 0]==0: NAND boot mode selected ) > SW2[ 1] = ON (SYSBOOT[ 1]==0: -- do -- ) > SW2[ 2] = OFF (SYSBOOT[ 2]==1: -- do -- ) > SW2[ 3] = OFF (SYSBOOT[ 3]==1: -- do -- ) > SW2[ 4] = ON (SYSBOOT[ 4]==0: -- do -- ) > SW2[ 8] = OFF (SYSBOOT[ 8]==1: 0:x8 device, 1:x16 device ) > SW2[ 9] = ON (SYSBOOT[ 9]==0: ECC done by ROM ) > SW2[10] = ON (SYSBOOT[10]==0: Non Muxed device ) > SW2[11] = ON (SYSBOOT[11]==0: -- do -- ) > > [1] http://beagleboardtoys.info/index.php?title=BeagleBone_Memory_Expansion > [2] http://beagleboardtoys.info/index.php?title=BeagleBone_4Gb_16-Bit_NAND_Module > > Signed-off-by: Pekon Gupta <pekon@ti.com> > --- > arch/arm/boot/dts/am335x-bone-memory-cape.dts | 130 ++++++++++++++++++++++++++ > arch/arm/boot/dts/am335x-bone.dts | 1 + > arch/arm/boot/dts/am335x-boneblack.dts | 1 + > 3 files changed, 132 insertions(+) > create mode 100644 arch/arm/boot/dts/am335x-bone-memory-cape.dts > > diff --git a/arch/arm/boot/dts/am335x-bone-memory-cape.dts b/arch/arm/boot/dts/am335x-bone-memory-cape.dts > new file mode 100644 > index 0000000..c59b3d7 > --- /dev/null > +++ b/arch/arm/boot/dts/am335x-bone-memory-cape.dts > @@ -0,0 +1,130 @@ > +/* > + * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/ > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This DTS adds supports for capes using GPMC interface to connect external > + * memory like NAND, NOR Flash to Beaglebone-LT (white) and Beaglebone-Black. > + */ > + > + > +&am33xx_pinmux { > + nand_flash_x16: nand_flash_x16 { > + pinctrl-single,pins = < > + 0x00 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad0.gpmc_ad0 */ > + 0x04 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad1.gpmc_ad1 */ > + 0x08 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad2.gpmc_ad2 */ > + 0x0c (MUX_MODE0 | PIN_INPUT) /* gpmc_ad3.gpmc_ad3 */ > + 0x10 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad4.gpmc_ad4 */ > + 0x14 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad5.gpmc_ad5 */ > + 0x18 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad6.gpmc_ad6 */ > + 0x1c (MUX_MODE0 | PIN_INPUT) /* gpmc_ad7.gpmc_ad7 */ > + 0x20 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad8.gpmc_ad8 */ > + 0x24 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad9.gpmc_ad9 */ > + 0x28 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad10.gpmc_ad10 */ > + 0x2c (MUX_MODE0 | PIN_INPUT) /* gpmc_ad11.gpmc_ad11 */ > + 0x30 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad12.gpmc_ad12 */ > + 0x34 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad13.gpmc_ad13 */ > + 0x38 (MUX_MODE0 | PIN_INPUT) /* gpmc_ad14.gpmc_ad14 */ > + 0x3c (MUX_MODE0 | PIN_INPUT) /* gpmc_ad15.gpmc_ad15 */ > + 0x70 (MUX_MODE0 | PIN_INPUT_PULLUP ) /* gpmc_wait0.gpmc_wait0 */ > + 0x74 (MUX_MODE7 | PIN_OUTPUT_PULLUP) /* gpmc_wpn.gpio0_30 */ > + 0x7c (MUX_MODE0 | PIN_OUTPUT_PULLUP) /* gpmc_csn0.gpmc_csn0 */ > + 0x90 (MUX_MODE0 | PIN_OUTPUT) /* gpmc_advn_ale.gpmc_advn_ale */ > + 0x94 (MUX_MODE0 | PIN_OUTPUT) /* gpmc_oen_ren.gpmc_oen_ren */ > + 0x98 (MUX_MODE0 | PIN_OUTPUT) /* gpmc_wen.gpmc_wen */ > + 0x9c (MUX_MODE0 | PIN_OUTPUT) /* gpmc_be0n_cle.gpmc_be0n_cle */ > + >; > + }; > +}; > + > +&elm { > + status = "disabled"; > +}; > + > +&gpmc { > + status = "disabled"; > +}; Why are you disabling the elm and gpmc modules here? Shouldn't they be disabled by default in the soc.dtsi file? cheers, -roger > + > +&gpmc { > + pinctrl-names = "default"; > + pinctrl-0 = <&nand_flash_x16>; > + ranges = <0 0 0 0x01000000>; /* CS0: NAND */ > + nand@0,0 { > + reg = <0 0 0x380>; /* CS0, offset=0x0, reg-map size=0x380 */ > + ti,nand-ecc-opt = "bch8"; > + ti,elm-id = <&elm>; > + nand-bus-width = <16>; > + gpmc,device-width = <2>; > + gpmc,sync-clk-ps = <0>; > + gpmc,cs-on-ns = <0>; > + gpmc,cs-rd-off-ns = <80>; > + gpmc,cs-wr-off-ns = <80>; > + gpmc,adv-on-ns = <0>; > + gpmc,adv-rd-off-ns = <80>; > + gpmc,adv-wr-off-ns = <80>; > + gpmc,we-on-ns = <20>; > + gpmc,we-off-ns = <60>; > + gpmc,oe-on-ns = <20>; > + gpmc,oe-off-ns = <60>; > + gpmc,access-ns = <40>; > + gpmc,rd-cycle-ns = <80>; > + gpmc,wr-cycle-ns = <80>; > + gpmc,wait-on-read = "true"; > + gpmc,wait-on-write = "true"; > + gpmc,bus-turnaround-ns = <0>; > + gpmc,cycle2cycle-delay-ns = <0>; > + gpmc,clk-activation-ns = <0>; > + gpmc,wait-monitoring-ns = <0>; > + gpmc,wr-access-ns = <40>; > + gpmc,wr-data-mux-bus-ns = <0>; > + /* MTD partition table */ > + /* All SPL-* partitions are sized to minimal length > + * which can be independently programmable. For > + * NAND flash this is equal to size of erase-block */ > + #address-cells = <1>; > + #size-cells = <1>; > + partition@0 { > + label = "NAND.SPL"; > + reg = <0x00000000 0x00040000>; > + }; > + partition@1 { > + label = "NAND.SPL.backup1"; > + reg = <0x00040000 0x00040000>; > + }; > + partition@2 { > + label = "NAND.SPL.backup2"; > + reg = <0x00080000 0x00040000>; > + }; > + partition@3 { > + label = "NAND.SPL.backup3"; > + reg = <0x000C0000 0x00040000>; > + }; > + partition@4 { > + label = "NAND.u-boot-spl-os"; > + reg = <0x00100000 0x00080000>; > + }; > + partition@5 { > + label = "NAND.u-boot"; > + reg = <0x00180000 0x00100000>; > + }; > + partition@6 { > + label = "NAND.u-boot-env"; > + reg = <0x00280000 0x00040000>; > + }; > + partition@7 { > + label = "NAND.u-boot-env.backup1"; > + reg = <0x002C0000 0x00040000>; > + }; > + partition@8 { > + label = "NAND.kernel"; > + reg = <0x00300000 0x00700000>; > + }; > + partition@9 { > + label = "NAND.file-system"; > + reg = <0x00A00000 0x1F600000>; > + }; > + }; > +}; > diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts > index 94ee427..f16bfcf 100644 > --- a/arch/arm/boot/dts/am335x-bone.dts > +++ b/arch/arm/boot/dts/am335x-bone.dts > @@ -9,6 +9,7 @@ > > #include "am33xx.dtsi" > #include "am335x-bone-common.dtsi" > +#include "am335x-bone-memory-cape.dts" > > &ldo3_reg { > regulator-min-microvolt = <1800000>; > diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts > index 6b71ad9..c030b24 100644 > --- a/arch/arm/boot/dts/am335x-boneblack.dts > +++ b/arch/arm/boot/dts/am335x-boneblack.dts > @@ -9,6 +9,7 @@ > > #include "am33xx.dtsi" > #include "am335x-bone-common.dtsi" > +#include "am335x-bone-memory-cape.dts" > > &ldo3_reg { > regulator-min-microvolt = <1800000>; > ^ permalink raw reply [flat|nested] 6+ messages in thread
* RE: [PATCH v4 1/6] ARM: dts: am335x-bone: add support for beaglebone NAND cape 2014-05-14 8:06 ` Roger Quadros @ 2014-05-14 9:12 ` Gupta, Pekon 0 siblings, 0 replies; 6+ messages in thread From: Gupta, Pekon @ 2014-05-14 9:12 UTC (permalink / raw) To: Quadros, Roger, Tony Lindgren, bcousson@baylibre.com; +Cc: linux-omap Hi Roger, >On 05/09/2014 11:40 PM, Pekon Gupta wrote: [...] >> + >> +&elm { >> + status = "disabled"; >> +}; >> + >> +&gpmc { >> + status = "disabled"; >> +}; > >Why are you disabling the elm and gpmc modules here? >Shouldn't they be disabled by default in the soc.dtsi file? > Yes both GPMC and ELM are 'disabled' by default in am33xx.dtsi. I'll remove these duplicates in next version. Thanks for pointing. Similar issue was also pointed out by Tony [1]. with regards, pekon >cheers, >-roger > [1] http://www.spinics.net/lists/linux-omap/msg106920.html ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v4 2/6] ARM: dts: am437x-gp-evm: add support for parallel NAND flash 2014-05-09 20:40 [PATCH v4 0/6] add parallel NAND support for TI's new OMAPx and AMxx platforms (Part-2) Pekon Gupta 2014-05-09 20:40 ` [PATCH v4 1/6] ARM: dts: am335x-bone: add support for beaglebone NAND cape Pekon Gupta @ 2014-05-09 20:40 ` Pekon Gupta 1 sibling, 0 replies; 6+ messages in thread From: Pekon Gupta @ 2014-05-09 20:40 UTC (permalink / raw) To: Tony Lindgren, bcousson; +Cc: linux-omap, Pekon Gupta Adds pinmux and DT node for Micron (MT29F4G08AB) x8 NAND device present on am437x-gp-evm board. (1) As NAND Flash data lines are muxed with eMMC, Thus at a given time either eMMC or NAND can be enabled. Selection between eMMC and NAND is controlled: (a) By dynamically driving following GPIO pin from software SPI2_CS0(GPIO) == 0 NAND is selected (default) SPI2_CS0(GPIO) == 1 eMMC is selected (b) By statically using Jumper (J89) on the board (2) As NAND device connnected to this board has page-size=4K and oob-size=224, So ROM code expects boot-loaders to be flashed in BCH16 ECC scheme for NAND boot. Signed-off-by: Pekon Gupta <pekon@ti.com> --- arch/arm/boot/dts/am437x-gp-evm.dts | 107 ++++++++++++++++++++++++++++++++++++ 1 file changed, 107 insertions(+) diff --git a/arch/arm/boot/dts/am437x-gp-evm.dts b/arch/arm/boot/dts/am437x-gp-evm.dts index 2e0c636..bfb2007 100644 --- a/arch/arm/boot/dts/am437x-gp-evm.dts +++ b/arch/arm/boot/dts/am437x-gp-evm.dts @@ -98,6 +98,27 @@ 0x264 (PIN_INPUT_PULLUP | MUX_MODE7) /* spi2_d0.gpio3_22 */ >; }; + + nand_flash_x8: nand_flash_x8 { + pinctrl-single,pins = < + 0x26C(PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* spi2_cs0.gpio/eMMCorNANDsel */ + 0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */ + 0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */ + 0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */ + 0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */ + 0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */ + 0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */ + 0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */ + 0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */ + 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */ + 0x74 (PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */ + 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */ + 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */ + 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */ + 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */ + 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */ + >; + }; }; &i2c0 { @@ -174,3 +195,89 @@ dr_mode = "host"; status = "okay"; }; + +&elm { + status = "okay"; +}; + +&gpmc { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&nand_flash_x8>; + ranges = <0 0 0 0x1000000>; /* CS0: NAND */ + nand@0,0 { + reg = <0 0 0x380>; /* CS0, offset=0, reg-map size=0x380 */ + ti,nand-ecc-opt = "bch8"; + ti,elm-id = <&elm>; + nand-bus-width = <8>; + gpmc,device-width = <1>; + gpmc,sync-clk-ps = <0>; + gpmc,cs-on-ns = <0>; + gpmc,cs-rd-off-ns = <40>; + gpmc,cs-wr-off-ns = <40>; + gpmc,adv-on-ns = <0>; + gpmc,adv-rd-off-ns = <25>; + gpmc,adv-wr-off-ns = <25>; + gpmc,we-on-ns = <0>; + gpmc,we-off-ns = <20>; + gpmc,oe-on-ns = <3>; + gpmc,oe-off-ns = <30>; + gpmc,access-ns = <30>; + gpmc,rd-cycle-ns = <40>; + gpmc,wr-cycle-ns = <40>; + gpmc,wait-on-read = "true"; + gpmc,wait-on-write = "true"; + gpmc,bus-turnaround-ns = <0>; + gpmc,cycle2cycle-delay-ns = <0>; + gpmc,clk-activation-ns = <0>; + gpmc,wait-monitoring-ns = <0>; + gpmc,wr-access-ns = <40>; + gpmc,wr-data-mux-bus-ns = <0>; + /* MTD partition table */ + /* All SPL-* partitions are sized to minimal length + * which can be independently programmable. For + * NAND flash this is equal to size of erase-block */ + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "NAND.SPL"; + reg = <0x00000000 0x00040000>; + }; + partition@1 { + label = "NAND.SPL.backup1"; + reg = <0x00040000 0x00040000>; + }; + partition@2 { + label = "NAND.SPL.backup2"; + reg = <0x00080000 0x00040000>; + }; + partition@3 { + label = "NAND.SPL.backup3"; + reg = <0x000c0000 0x00040000>; + }; + partition@4 { + label = "NAND.u-boot-spl-os"; + reg = <0x00100000 0x00080000>; + }; + partition@5 { + label = "NAND.u-boot"; + reg = <0x00180000 0x00100000>; + }; + partition@6 { + label = "NAND.u-boot-env"; + reg = <0x00280000 0x00040000>; + }; + partition@7 { + label = "NAND.u-boot-env.backup1"; + reg = <0x002c0000 0x00040000>; + }; + partition@8 { + label = "NAND.kernel"; + reg = <0x00300000 0x00700000>; + }; + partition@9 { + label = "NAND.file-system"; + reg = <0x00a00000 0x1f600000>; + }; + }; +}; -- 1.8.5.1.163.gd7aced9 ^ permalink raw reply related [flat|nested] 6+ messages in thread
end of thread, other threads:[~2014-05-14 9:12 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2014-05-09 20:40 [PATCH v4 0/6] add parallel NAND support for TI's new OMAPx and AMxx platforms (Part-2) Pekon Gupta 2014-05-09 20:40 ` [PATCH v4 1/6] ARM: dts: am335x-bone: add support for beaglebone NAND cape Pekon Gupta 2014-05-13 17:31 ` Tony Lindgren 2014-05-14 8:06 ` Roger Quadros 2014-05-14 9:12 ` Gupta, Pekon 2014-05-09 20:40 ` [PATCH v4 2/6] ARM: dts: am437x-gp-evm: add support for parallel NAND flash Pekon Gupta
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