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From: Arnd Bergmann <arnd@arndb.de>
To: Hauke Mehrtens <hauke@hauke-m.de>
Cc: devicetree@vger.kernel.org, f.fainelli@gmail.com,
	rjui@broadcom.com, zajec5@gmail.com, jogo@openwrt.org,
	bcm-kernel-feedback-list@broadcom.com,
	linux-mtd@lists.infradead.org, computersforpeace@gmail.com
Subject: Re: [RFC] ARM: BCM5301X: add NAND flash chip description
Date: Wed, 27 May 2015 09:37:53 +0200	[thread overview]
Message-ID: <5386954.hrl5VLbdYc@wuerfel> (raw)
In-Reply-To: <1432492349-18517-1-git-send-email-hauke@hauke-m.de>

On Sunday 24 May 2015 20:32:29 Hauke Mehrtens wrote:
> @@ -124,17 +124,7 @@
>                         <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
>  
>                         /* Ethernet Controller 3 */
> -                       <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
> -
> -                       /* NAND Controller */
> -                       <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> +                       <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
>  
>                 chipcommon: chipcommon@0 {
>                         reg = <0x00000000 0x1000>;
> @@ -143,4 +133,30 @@
>                         #gpio-cells = <2>;
>                 };
>         };
> +
> +       nand: nand@18028000 {
> +               compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
> +               reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
> +               reg-names = "nand", "iproc-idm", "iproc-ext";
> +               interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;

I think I'd rather leave the interrupt-map in the brcm node, and use

	interrupts = <0>;

here.

> +               status = "disabled";
> +
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               brcm,nand-has-wp;
> +
> +               nandcs@0 {
> +                       compatible = "brcm,nandcs";
> +                       reg = <0>;
> +                       #address-cells = <1>;
> +                       #size-cells = <1>;
> +
> +                       nand-ecc-strength = <8>;
> +                       nand-ecc-step-size = <512>;
> +
> +                       linux,part-probe = "ofpart", "bcm47xxpart";
> +               };
> +       };

This seems fine in principle, once the exact binding has been nailed down.

"bcm47xxpart" does not seem like an appropriate string here.

	Arnd

WARNING: multiple messages have this Message-ID (diff)
From: Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
To: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
Cc: computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	f.fainelli-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	rjui-dY08KVG/lbpWk0Htik3J/w@public.gmane.org,
	bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org,
	zajec5-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	jogo-p3rKhJxN3npAfugRpC6u6w@public.gmane.org
Subject: Re: [RFC] ARM: BCM5301X: add NAND flash chip description
Date: Wed, 27 May 2015 09:37:53 +0200	[thread overview]
Message-ID: <5386954.hrl5VLbdYc@wuerfel> (raw)
In-Reply-To: <1432492349-18517-1-git-send-email-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>

On Sunday 24 May 2015 20:32:29 Hauke Mehrtens wrote:
> @@ -124,17 +124,7 @@
>                         <0x00026000 0 &gic GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
>  
>                         /* Ethernet Controller 3 */
> -                       <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>,
> -
> -                       /* NAND Controller */
> -                       <0x00028000 0 &gic GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 1 &gic GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 2 &gic GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 3 &gic GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 4 &gic GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 5 &gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 6 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
> -                       <0x00028000 7 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> +                       <0x00027000 0 &gic GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
>  
>                 chipcommon: chipcommon@0 {
>                         reg = <0x00000000 0x1000>;
> @@ -143,4 +133,30 @@
>                         #gpio-cells = <2>;
>                 };
>         };
> +
> +       nand: nand@18028000 {
> +               compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
> +               reg = <0x18028000 0x600>, <0x1811a408 0x600>, <0x18028f00 0x20>;
> +               reg-names = "nand", "iproc-idm", "iproc-ext";
> +               interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;

I think I'd rather leave the interrupt-map in the brcm node, and use

	interrupts = <0>;

here.

> +               status = "disabled";
> +
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               brcm,nand-has-wp;
> +
> +               nandcs@0 {
> +                       compatible = "brcm,nandcs";
> +                       reg = <0>;
> +                       #address-cells = <1>;
> +                       #size-cells = <1>;
> +
> +                       nand-ecc-strength = <8>;
> +                       nand-ecc-step-size = <512>;
> +
> +                       linux,part-probe = "ofpart", "bcm47xxpart";
> +               };
> +       };

This seems fine in principle, once the exact binding has been nailed down.

"bcm47xxpart" does not seem like an appropriate string here.

	Arnd
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  parent reply	other threads:[~2015-05-27  7:38 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-05-24 18:32 [RFC] ARM: BCM5301X: add NAND flash chip description Hauke Mehrtens
2015-05-24 18:32 ` Hauke Mehrtens
2015-05-26 20:20 ` Rafał Miłecki
2015-05-26 20:20   ` Rafał Miłecki
2015-05-26 20:53   ` nick
2015-05-26 20:53     ` nick
2015-05-27  0:41 ` Brian Norris
2015-05-27  0:41   ` Brian Norris
2015-05-27  1:15   ` Brian Norris
2015-05-27  1:15     ` Brian Norris
2015-05-27 22:04   ` Hauke Mehrtens
2015-05-27 22:04     ` Hauke Mehrtens
2015-05-27  7:37 ` Arnd Bergmann [this message]
2015-05-27  7:37   ` Arnd Bergmann
2015-05-27 21:46   ` Hauke Mehrtens
2015-05-27 21:46     ` Hauke Mehrtens
2015-05-27 21:57     ` Brian Norris
2015-05-27 21:57       ` Brian Norris
2015-05-28  8:21     ` Arnd Bergmann
2015-05-28  8:21       ` Arnd Bergmann
2015-05-29 15:29       ` Hauke Mehrtens
2015-05-29 15:29         ` Hauke Mehrtens

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