From: Julien Grall <julien.grall@linaro.org>
To: Ian Campbell <Ian.Campbell@citrix.com>
Cc: vijay.kilari@gmail.com, stefano.stabellini@eu.citrix.com,
Prasun.Kapoor@caviumnetworks.com,
vijaya.kumar@caviumnetworks.com, xen-devel@lists.xen.org,
stefano.stabellini@citrix.com
Subject: Re: [PATCH] xen/arm: remove check for generic timer support for arm64
Date: Mon, 02 Jun 2014 14:39:35 +0100 [thread overview]
Message-ID: <538C7E97.30702@linaro.org> (raw)
In-Reply-To: <1401715834.21534.7.camel@kazak.uk.xensource.com>
On 06/02/2014 02:30 PM, Ian Campbell wrote:
> On Mon, 2014-06-02 at 14:23 +0100, Julien Grall wrote:
>> On 06/02/2014 02:03 PM, Ian Campbell wrote:
>>> On Mon, 2014-06-02 at 12:13 +0100, Julien Grall wrote:
>>>> On 06/02/2014 12:09 PM, Ian Campbell wrote:
>>>>> On Mon, 2014-06-02 at 14:07 +0530, vijay.kilari@gmail.com wrote:
>>>>>> From: Vijaya Kumar K <Vijaya.Kumar@caviumnetworks.com>
>>>>>>
>>>>>> arm64 always supports generic timer. So check is not required
>>>>>> for arm64. For platforms which supports only aarch64 mode this
>>>>>> check always passes and panics
>>>>>
>>>>> Ah, because the relevant feature flag/register is 32-bit only.
>>>>>
>>>>> I'd prefer to see this done in the cpufeature header as:
>>>>> #ifdef CONFIG_ARM_32
>>>>> #define cpu_has_gentimer (boot_cpu_feature32(gentimer) == 1)
>>>>> #else
>>>>> #define cpu_has_gentimer (1)
>>>>> #endif
>>>>> rather than adding #ifdef to the common code. Likewise for any similar
>>>>> "always on for aarch64" features.
>>>>
>>>> AFAIU, the feature flag exists on ARMv8 platform with aarch32 support.
>>>> So an ifdef may not be the correct solution here.
>>>
>>> The flag might exist in the AArch32 feature registers (for compat with
>>> v7) but AIUI the feature is not actually optional on v8.
>>
>> The manual says the ARM Generic Timer is an optional extension to an
>> ARMv8 implementation.
>
> So it does. In that case cpu_has_gentimer should turn into a check of
> ID_PFR1_EL1.GenTimer for arm64 builds.
This is already the case (without Vijay's patch). But on AArch64-only
implementation, this register is RAZ.
It looks like ID_PFR{0,1}_EL1 are only used for ARMv7 and ARMv8 which
support 32-bit.
Regards,
--
Julien Grall
next prev parent reply other threads:[~2014-06-02 13:39 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-02 8:37 [PATCH] xen/arm: remove check for generic timer support for arm64 vijay.kilari
2014-06-02 11:06 ` Julien Grall
2014-06-02 11:09 ` Ian Campbell
2014-06-02 11:13 ` Julien Grall
2014-06-02 13:03 ` Ian Campbell
2014-06-02 13:23 ` Julien Grall
2014-06-02 13:30 ` Ian Campbell
2014-06-02 13:39 ` Julien Grall [this message]
2014-06-02 13:59 ` Vijay Kilari
2014-06-02 14:02 ` Ian Campbell
2014-06-02 14:08 ` Vijay Kilari
2014-06-02 14:11 ` Ian Campbell
2014-06-02 14:13 ` Julien Grall
2014-06-02 14:21 ` Ian Campbell
2014-06-02 14:10 ` Julien Grall
2014-06-02 14:12 ` Ian Campbell
2014-06-02 14:01 ` Ian Campbell
2014-06-02 14:48 ` Ian Campbell
2014-06-02 14:50 ` Julien Grall
2014-06-02 14:53 ` Ian Campbell
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